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* hw/i386/pc: Clean up includesPhilippe Mathieu-Daudé2020-03-091-8/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various headers are not required by hw/i386/pc.h: - "qemu/range.h" - "qemu/bitmap.h" - "qemu/module.h" - "exec/memory.h" - "hw/pci/pci.h" - "hw/mem/pc-dimm.h" - "hw/mem/nvdimm.h" - "net/net.h" Remove them. Add 3 headers that were missing: - "hw/hotplug.h" PCMachineState::acpi_dev is of type HotplugHandler - "qemu/notify.h" PCMachineState::machine_done is of type Notifier - "qapi/qapi-types-common.h" PCMachineState::vmport/smm is of type OnOffAuto Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-19-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/pci-host/q35: Remove unused includesPhilippe Mathieu-Daudé2020-03-091-7/+0Star
| | | | | | | | | | | Only q35.c requires declarations from "hw/i386/pc.h", move it there. Remove all the includes not used by "q35.h". Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-18-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/pci-host/q35: Include "qemu/range.h"Philippe Mathieu-Daudé2020-03-091-0/+1
| | | | | | | | | | | | | | | | | | | | | The MCHPCIState structure uses the Range type which is declared in "qemu/range.h". Include it. This fixes (when modifying unrelated headers): In file included from hw/pci-host/q35.c:32: include/hw/pci-host/q35.h:57:11: error: field has incomplete type 'Range' (aka 'struct Range') Range pci_hole; ^ include/qemu/typedefs.h:116:16: note: forward declaration of 'struct Range' typedef struct Range Range; ^ Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-13-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/i386/intel_iommu: Remove unused includesPhilippe Mathieu-Daudé2020-03-091-4/+0Star
| | | | | | | | | | intel_iommu.h does not use any of these includes, remove them. Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-7-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/i386/ioapic_internal: Remove unused "hw/i386/ioapic.h" headerPhilippe Mathieu-Daudé2020-03-091-1/+0Star
| | | | | | | | | | | The "ioapic_internal.h" does not use anything from "hw/i386/ioapic.h", remove it. Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-4-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/southbridge/ich9: Removed unused headersPhilippe Mathieu-Daudé2020-03-091-1/+0Star
| | | | | | | | | | | | | The ICH9 chipset is not X86/PC specific. These files don't use anything declared by the "hw/i386/pc.h" or "hw/i386/ioapic.h" headers. Remove them. Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* pcie_root_port: Add hotplug disabling optionJulia Suvorova2020-03-082-1/+4
| | | | | | | | | | | | | | | | | | | | | | Make hot-plug/hot-unplug on PCIe Root Ports optional to allow libvirt manage it and restrict unplug for the whole machine. This is going to prevent user-initiated unplug in guests (Windows mostly). Hotplug is enabled by default. Usage: -device pcie-root-port,hotplug=off,... If you want to disable hot-unplug on some downstream ports of one switch, disable hot-unplug on PCIe Root Port connected to the upstream port as well as on the selected downstream ports. Discussion related: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20200226174607.205941-1-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Ján Tomko <jtomko@redhat.com>
* hw/arm: versal: Add support for the LPD ADMAsEdgar E. Iglesias2020-03-051-0/+6
| | | | | | | | | | Add support for the Versal LPD ADMAs. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf3' ↵Peter Maydell2020-03-031-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging RISC-V Patches for the 5.0 Soft Freeze, Part 3 This pull request is almost entirely an implementation of the draft hypervisor extension. This extension is still in draft and is expected to have incompatible changes before being frozen, but we've had good luck managing other RISC-V draft extensions in QEMU so far. Additionally, there's a fix to PCI addressing and some improvements to the M-mode timer. This boots linux and passes make check for me. # gpg: Signature made Tue 03 Mar 2020 00:23:20 GMT # gpg: using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmerdabbelt@google.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 # Subkey fingerprint: 2B3C 3747 4468 43B2 4A94 3A7A 2E13 19F3 5FBB 1889 * remotes/palmer/tags/riscv-for-master-5.0-sf3: (38 commits) hw/riscv: Provide rdtime callback for TCG in CLINT emulation target/riscv: Emulate TIME CSRs for privileged mode riscv: virt: Allow PCI address 0 target/riscv: Allow enabling the Hypervisor extension target/riscv: Add the MSTATUS_MPV_ISSET helper macro target/riscv: Add support for the 32-bit MSTATUSH CSR target/riscv: Set htval and mtval2 on execptions target/riscv: Raise the new execptions when 2nd stage translation fails target/riscv: Implement second stage MMU target/riscv: Allow specifying MMU stage target/riscv: Respect MPRV and SPRV for floating point ops target/riscv: Mark both sstatus and msstatus_hs as dirty target/riscv: Disable guest FP support based on virtual status target/riscv: Only set TB flags with FP status if enabled target/riscv: Remove the hret instruction target/riscv: Add hfence instructions target/riscv: Add Hypervisor trap return support target/riscv: Add hypvervisor trap support target/riscv: Generate illegal instruction on WFI when V=1 target/ricsv: Flush the TLB on virtulisation mode changes ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/riscv: Provide rdtime callback for TCG in CLINT emulationAnup Patel2020-02-271-1/+2
| | | | | | | | | | | | | | | | | | | | This patch extends CLINT emulation to provide rdtime callback for TCG. This rdtime callback will be called wheneven TIME CSRs are read in privileged modes. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
* | hw: Make MachineClass::is_default a boolean typePhilippe Mathieu-Daudé2020-02-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | There's no good reason for it to be type int, change it to bool. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200207161948.15972-3-philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | hw/nmi: Fix the NMI() macro, based on INTERFACE_CHECK()Philippe Mathieu-Daudé2020-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is no declaration of the 'NMI' type. INTERFACE_CHECK() returns an abstract type (see commit aa1b35b975d8). The abstract type corresponding to the TYPE_NMI interface is 'NMIState'. Fixes: 9cb805fd267 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191207094823.20707-1-philmd@redhat.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | arm_gic: Mask the un-supported priority bitsSai Pavan Boddu2020-02-282-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GICv2 allows the implementation to implement a variable number of priority bits; unimplemented bits in the priority registers are read as zeros, writes ignored. We were previously always implementing a full 8 bits of priority, which is allowed but not what the real hardware typically does (which is usually to have 4 or 5 bits of priority). Add a new device property to allow the number of implemented property bits to be specified. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Message-id: 1582537164-764-2-git-send-email-sai.pavan.boddu@xilinx.com Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: improved commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge remote-tracking branch ↵Peter Maydell2020-02-281-0/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/juanquintela/tags/pull-migration-pull-request' into staging Migration pull request # gpg: Signature made Fri 28 Feb 2020 09:21:31 GMT # gpg: using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full] # gpg: aka "Juan Quintela <quintela@trasno.org>" [full] # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723 * remotes/juanquintela/tags/pull-migration-pull-request: savevm: Don't call colo_init_ram_cache twice migration/colo: wrap incoming checkpoint process into new helper migration: fix COLO broken caused by a previous commit migration/block: rename BLOCK_SIZE macro migration/savevm: release gslist after dump_vmstate_json test-vmstate: Fix memleaks in test_load_qlist migration/vmstate: Remove redundant statement in vmstate_save_state_v() multifd: Add zstd compression multifd support multifd: Add multifd-zstd-level parameter configure: Enable test and libs for zstd multifd: Add zlib compression multifd support multifd: Add multifd-zlib-level parameter multifd: Make no compression operations into its own structure migration: Add support for modules multifd: Add multifd-compression parameter Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | multifd: Add multifd-compression parameterJuan Quintela2020-02-281-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | This will store the compression method to use. We start with none. Signed-off-by: Juan Quintela <quintela@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> --- Rename multifd-method to multifd-compression
* | Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20200227' into ↵Peter Maydell2020-02-281-1/+4
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Xen queue 2020-02-27 * fix for xen-block * fix in exec.c for migration of xen guest * one cleanup patch # gpg: Signature made Thu 27 Feb 2020 11:57:12 GMT # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: issuer "anthony.perard@citrix.com" # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20200227: Memory: Only call ramblock_ptr when needed in qemu_ram_writeback xen-bus/block: explicitly assign event channels to an AioContext hw/xen/xen_pt_load_rom: Remove unused includes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * xen-bus/block: explicitly assign event channels to an AioContextPaul Durrant2020-02-271-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not safe to close an event channel from the QEMU main thread when that channel's poller is running in IOThread context. This patch adds a new xen_device_set_event_channel_context() function to explicitly assign the channel AioContext, and modifies xen_device_bind_event_channel() to initially assign the channel's poller to the QEMU main thread context. The code in xen-block's dataplane is then modified to assign the channel to IOThread context during xen_block_dataplane_start() and de-assign it during in xen_block_dataplane_stop(), such that the channel is always assigned back to main thread context before it is closed. aio_set_fd_handler() already deals with all the necessary synchronization when moving an fd between AioContext-s so no extra code is needed to manage this. Reported-by: Julien Grall <jgrall@amazon.com> Signed-off-by: Paul Durrant <pdurrant@amazon.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20191216143451.19024-1-pdurrant@amazon.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
* | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2020-02-275-1/+68
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio, pc: fixes, features New virtio iommu. Unrealize memory leaks. In-band kick/call support. Bugfixes, documentation all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 27 Feb 2020 08:46:33 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (30 commits) Fixed assert in vhost_user_set_mem_table_postcopy vhost-user: only set slave channel for first vq acpi: cpuhp: document CPHP_GET_CPU_ID_CMD command libvhost-user: implement in-band notifications docs: vhost-user: add in-band kick/call messages libvhost-user: handle NOFD flag in call/kick/err better libvhost-user-glib: use g_main_context_get_thread_default() libvhost-user-glib: fix VugDev main fd cleanup libvhost-user: implement VHOST_USER_PROTOCOL_F_REPLY_ACK MAINTAINERS: add virtio-iommu related files hw/arm/virt: Add the virtio-iommu device tree mappings virtio-iommu-pci: Add virtio iommu pci support virtio-iommu: Support migration virtio-iommu: Implement fault reporting virtio-iommu: Implement translate virtio-iommu: Implement map/unmap virtio-iommu: Implement attach/detach command virtio-iommu: Decode the command payload virtio-iommu: Add skeleton virtio: gracefully handle invalid region caches ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Add the virtio-iommu device tree mappingsEric Auger2020-02-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the "virtio,pci-iommu" node in the host bridge node and the RID mapping, excluding the IOMMU RID. This is done in the virtio-iommu-pci hotplug handler which gets called only if no firmware is loaded or if -no-acpi is passed on the command line. As non DT integration is not yet supported by the kernel we must make sure we are in DT mode. This limitation will be removed as soon as the topology description feature gets supported. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200214132745.23392-10-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * virtio-iommu-pci: Add virtio iommu pci supportEric Auger2020-02-272-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds virtio-iommu-pci, which is the pci proxy for the virtio-iommu device. Currently non DT integration is not yet supported by the kernel. So the machine must implement a hotplug handler for the virtio-iommu-pci device that creates the device tree iommu-map bindings as documented in kernel documentation: Documentation/devicetree/bindings/virtio/iommu.txt Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20200214132745.23392-9-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * virtio-iommu: Implement attach/detach commandEric Auger2020-02-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the endpoint attach/detach to/from a domain. Domain and endpoint internal datatypes are introduced. Both are stored in RB trees. The domain owns a list of endpoints attached to it. Also helpers to get/put end points and domains are introduced. As for the IOMMU memory regions, a callback is called on PCI bus enumeration that initializes for a given device on the bus hierarchy an IOMMU memory region. The PCI bus hierarchy is stored locally in IOMMUPciBus and IOMMUDevice objects. At the time of the enumeration, the bus number may not be computed yet. So operations that will need to retrieve the IOMMUdevice and its IOMMU memory region from the bus number and devfn, once the bus number is garanteed to be frozen, use an array of IOMMUPciBus, lazily populated. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20200214132745.23392-4-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * virtio-iommu: Add skeletonEric Auger2020-02-271-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | This patchs adds the skeleton for the virtio-iommu device. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20200214132745.23392-2-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * vhost-user-blk: convert to new virtio_delete_queuePan Nengyuan2020-02-251-1/+2
| | | | | | | | | | | | | | | | | | | | use the new virtio_delete_queue function to cleanup. Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Message-Id: <20200224041336.30790-3-pannengyuan@huawei.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * vhost-user-fs: convert to the new virtio_delete_queue functionPan Nengyuan2020-02-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | use the new virtio_delete_queue function to cleanup. Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200225075554.10835-3-pannengyuan@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEADPaolo Bonzini2020-02-251-2/+1Star
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| * | hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argumentPhilippe Mathieu-Daudé2020-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | | The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
| * | hw/ide/internal: Remove unused DMARestartFunc typedefPhilippe Mathieu-Daudé2020-02-201-1/+0Star
| | | | | | | | | | | | | | | | | | | | | The IDE DMA restart callback has been removed in commit fe09c7c9f0. Fixes: fe09c7c9f0 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | | Merge tag 'patchew/20200219160953.13771-1-imammedo@redhat.com' of ↵Paolo Bonzini2020-02-253-38/+26Star
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/patchew-project/qemu into HEAD This series removes ad hoc RAM allocation API (memory_region_allocate_system_memory) and consolidates it around hostmem backend. It allows to * resolve conflicts between global -mem-prealloc and hostmem's "policy" option, fixing premature allocation before binding policy is applied * simplify complicated memory allocation routines which had to deal with 2 ways to allocate RAM. * reuse hostmem backends of a choice for main RAM without adding extra CLI options to duplicate hostmem features. A recent case was -mem-shared, to enable vhost-user on targets that don't support hostmem backends [1] (ex: s390) * move RAM allocation from individual boards into generic machine code and provide them with prepared MemoryRegion. * clean up deprecated NUMA features which were tied to the old API (see patches) - "numa: remove deprecated -mem-path fallback to anonymous RAM" - (POSTPONED, waiting on libvirt side) "forbid '-numa node,mem' for 5.0 and newer machine types" - (POSTPONED) "numa: remove deprecated implicit RAM distribution between nodes" Introduce a new machine.memory-backend property and wrapper code that aliases global -mem-path and -mem-alloc into automatically created hostmem backend properties (provided memory-backend was not set explicitly given by user). A bulk of trivial patches then follow to incrementally convert individual boards to using machine.memory-backend provided MemoryRegion. Board conversion typically involves: * providing MachineClass::default_ram_size and MachineClass::default_ram_id so generic code could create default backend if user didn't explicitly provide memory-backend or -m options * dropping memory_region_allocate_system_memory() call * using convenience MachineState::ram MemoryRegion, which points to MemoryRegion allocated by ram-memdev On top of that for some boards: * missing ram_size checks are added (typically it were boards with fixed ram size) * ram_size fixups are replaced by checks and hard errors, forcing user to provide correct "-m" values instead of ignoring it and continuing running. After all boards are converted, the old API is removed and memory allocation routines are cleaned up.
| * | remove no longer used memory_region_allocate_system_memory()Igor Mammedov2020-02-191-32/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | all boards were switched to using memdev backend for main RAM, so we can drop no longer used memory_region_allocate_system_memory() Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-73-imammedo@redhat.com>
| * | ppc/{ppc440_bamboo, sam460ex}: use memdev for RAMIgor Mammedov2020-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200219160953.13771-67-imammedo@redhat.com>
| * | ppc/{ppc440_bamboo, sam460ex}: drop RAM size fixupIgor Mammedov2020-02-191-5/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If user provided non-sense RAM size, board will complain and continue running with max RAM size supported or sometimes crash like this: %QEMU -M bamboo -m 1 exec.c:1926: find_ram_offset: Assertion `size != 0' failed. Aborted (core dumped) Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. That also fixes crash issue, since wrongly calculated size isn't used to allocate RAM Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200219160953.13771-66-imammedo@redhat.com>
| * | arm/aspeed: actually check RAM sizeIgor Mammedov2020-02-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's supposed that SOC will check if "-m" provided RAM size is valid by setting "ram-size" property and then board would read back valid (possibly corrected value) to map RAM MemoryReging with valid size. It isn't doing so, since check is called only indirectly from aspeed_sdmc_reset()->asc->compute_conf() or much later when guest writes to configuration register. So depending on "-m" value QEMU end-ups with a warning and an invalid MemoryRegion size allocated and mapped. (examples: -M ast2500-evb -m 1M 0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container 0000000080000000-00000000800fffff (prio 0, ram): ram 0000000080100000-00000000bfffffff (prio 0, i/o): max_ram -M ast2500-evb -m 3G 0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container 0000000080000000-000000013fffffff (prio 0, ram): ram [DETECTED OVERFLOW!] 0000000140000000-00000000bfffffff (prio 0, i/o): max_ram ) On top of that sdmc falls back and reports to guest "default" size, it thinks machine should have. This patch makes ram-size check actually work and changes behavior from a warning later on during machine reset to error_fatal at the moment SOC.ram-size is set so user will have to fix RAM size on CLI to start machine. It also gets out of the way mutable ram-size logic, so we could consolidate RAM allocation logic around pre-allocated hostmem backend (supplied by user or auto created by generic machine code depending on supplied -m/mem-path/mem-prealloc options. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200219160953.13771-10-imammedo@redhat.com>
| * | machine: introduce convenience MachineState::ramIgor Mammedov2020-02-191-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the new field will be used by boards to get access to main RAM memory region and will help to save boiler plate in boards which often introduce a field or variable just for this purpose. Memory region will be equivalent to what currently used memory_region_allocate_system_memory() is returning apart from that it will come from hostmem backend. Followup patches will incrementally switch boards to using RAM from MachineState::ram. Patch takes care of non-NUMA case and follow up patch will initialize MachineState::ram for NUMA case. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200219160953.13771-5-imammedo@redhat.com>
| * | machine: alias -mem-path and -mem-prealloc into memory-foo backendIgor Mammedov2020-02-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow machine to opt in for hostmem backend based initial RAM even if user uses old -mem-path/prealloc options by providing MachineClass::default_ram_id Follow up patches will incrementally convert machines to new API, by dropping memory_region_allocate_system_memory() and setting default_ram_id that board used to use before conversion to keep migration stream the same. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200219160953.13771-4-imammedo@redhat.com>
| * | machine: introduce memory-backend propertyIgor Mammedov2020-02-191-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Property will contain link to memory backend that will be used for backing initial RAM. Follow up commit will alias -mem-path and -mem-prealloc CLI options into memory backend options to make memory handling consistent (using only hostmem backend family for guest RAM allocation). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-3-imammedo@redhat.com>
* | arm: allwinner: Wire up USB portsGuenter Roeck2020-02-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instantiate EHCI and OHCI controllers on Allwinner A10. OHCI ports are modeled as companions of the respective EHCI ports. With this patch applied, USB controllers are discovered and instantiated when booting the cubieboard machine with a recent Linux kernel. ehci-platform 1c14000.usb: EHCI Host Controller ehci-platform 1c14000.usb: new USB bus registered, assigned bus number 1 ehci-platform 1c14000.usb: irq 26, io mem 0x01c14000 ehci-platform 1c14000.usb: USB 2.0 started, EHCI 1.00 ehci-platform 1c1c000.usb: EHCI Host Controller ehci-platform 1c1c000.usb: new USB bus registered, assigned bus number 2 ehci-platform 1c1c000.usb: irq 31, io mem 0x01c1c000 ehci-platform 1c1c000.usb: USB 2.0 started, EHCI 1.00 ohci-platform 1c14400.usb: Generic Platform OHCI controller ohci-platform 1c14400.usb: new USB bus registered, assigned bus number 3 ohci-platform 1c14400.usb: irq 27, io mem 0x01c14400 ohci-platform 1c1c400.usb: Generic Platform OHCI controller ohci-platform 1c1c400.usb: new USB bus registered, assigned bus number 4 ohci-platform 1c1c400.usb: irq 32, io mem 0x01c1c400 usb 2-1: new high-speed USB device number 2 using ehci-platform usb-storage 2-1:1.0: USB Mass Storage device detected scsi host1: usb-storage 2-1:1.0 usb 3-1: new full-speed USB device number 2 using ohci-platform input: QEMU QEMU USB Mouse as /devices/platform/soc/1c14400.usb/usb3/3-1/3-1:1.0/0003:0627:0001.0001/input/input0 Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200217204812.9857-4-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | spapr: Don't use spapr_drc_needed() in CAS codeGreg Kurz2020-02-201-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently don't support hotplug of devices between boot and CAS. If this happens a CAS reboot is triggered. We detect this during CAS using the spapr_drc_needed() function which is essentially a VMStateDescription .needed callback. Even if the condition for CAS reboot happens to be the same as for DRC migration, it looks wrong to piggyback a migration helper for this. Introduce a helper with slightly more explicit name and use it in both CAS and DRC migration code. Since a subsequent patch will enhance this helper to cover the case of hot unplug, let's go for spapr_drc_transient(). While here convert spapr_hotplugged_dev_before_cas() to the "transient" wording as well. This doesn't change any behaviour. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <158169248180.3465937.9531405453362718771.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | spapr: Allow changing offset for -kernel imageAlexey Kardashevskiy2020-02-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This allows moving the kernel in the guest memory. The option is useful for step debugging (as Linux is linked at 0x0); it also allows loading grub which is normally linked to run at 0x20000. This uses the existing kernel address by default. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20200203032943.121178-6-aik@ozlabs.ru> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | spapr: Add Hcalls to support PAPR NVDIMM deviceShivaprasad G Bhat2020-02-201-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements few of the necessary hcalls for the nvdimm support. PAPR semantics is such that each NVDIMM device is comprising of multiple SCM(Storage Class Memory) blocks. The guest requests the hypervisor to bind each of the SCM blocks of the NVDIMM device using hcalls. There can be SCM block unbind requests in case of driver errors or unplug(not supported now) use cases. The NVDIMM label read/writes are done through hcalls. Since each virtual NVDIMM device is divided into multiple SCM blocks, the bind, unbind, and queries using hcalls on those blocks can come independently. This doesn't fit well into the qemu device semantics, where the map/unmap are done at the (whole)device/object level granularity. The patch doesnt actually bind/unbind on hcalls but let it happen at the device_add/del phase itself instead. The guest kernel makes bind/unbind requests for the virtual NVDIMM device at the region level granularity. Without interleaving, each virtual NVDIMM device is presented as a separate guest physical address range. So, there is no way a partial bind/unbind request can come for the vNVDIMM in a hcall for a subset of SCM blocks of a virtual NVDIMM. Hence it is safe to do bind/unbind everything during the device_add/del. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Message-Id: <158131059899.2897.11515211602702956854.stgit@lep8c.aus.stglabs.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | spapr: Add NVDIMM device supportShivaprasad G Bhat2020-02-202-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for NVDIMM devices for sPAPR. Piggyback on existing nvdimm device interface in QEMU to support virtual NVDIMM devices for Power. Create the required DT entries for the device (some entries have dummy values right now). The patch creates the required DT node and sends a hotplug interrupt to the guest. Guest is expected to undertake the normal DR resource add path in response and start issuing PAPR SCM hcalls. The device support is verified based on the machine version unlike x86. This is how it can be used .. Ex : For coldplug, the device to be added in qemu command line as shown below -object memory-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896 -device nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0 For hotplug, the device to be added from monitor as below object_add memory-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896 device_add nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0 Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> [Early implementation] Message-Id: <158131058078.2897.12767731856697459923.stgit@lep8c.aus.stglabs.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | nvdimm: add uuid property to nvdimmShivaprasad G Bhat2020-02-201-0/+7
|/ | | | | | | | | | | For ppc64, PAPR requires the nvdimm device to have UUID property set in the device tree. Add an option to get it from the user. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <158131056931.2897.14057087440721445976.stgit@lep8c.aus.stglabs.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf2' ↵Peter Maydell2020-02-142-0/+48
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging RISC-V Patches for the 5.0 Soft Freeze, Part 2 This is a fairly light-weight pull request, but I wanted to send it out to avoid the Goldfish stuff getting buried as the next PR should contain the H extension implementation. As far as this PR goes, it contains: * The addition of syscon device tree nodes for reboot and poweroff, which allows Linux to control QEMU without an additional driver. The existing device was already compatible with the syscon interface. * A fix to our GDB stub to avoid confusing XLEN and FLEN, specifically useful for rv32id-based systems. * A device emulation for the Goldfish RTC device, a simple memory-mapped RTC. * The addition of the Goldfish RTC device to the RISC-V virt board. This passes "make check" and boots buildroot for me. # gpg: Signature made Mon 10 Feb 2020 21:28:04 GMT # gpg: using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmerdabbelt@google.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 # Subkey fingerprint: 2B3C 3747 4468 43B2 4A94 3A7A 2E13 19F3 5FBB 1889 * remotes/palmer/tags/riscv-for-master-5.0-sf2: MAINTAINERS: Add maintainer entry for Goldfish RTC riscv: virt: Use Goldfish RTC device hw: rtc: Add Goldfish RTC device riscv: Separate FPU register size from core register size in gdbstub [v2] riscv/virt: Add syscon reboot and poweroff DT nodes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * riscv: virt: Use Goldfish RTC deviceAnup Patel2020-02-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | We extend QEMU RISC-V virt machine by adding Goldfish RTC device to it. This will allow Guest Linux to sync it's local date/time with Host date/time via RTC device. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
| * hw: rtc: Add Goldfish RTC deviceAnup Patel2020-02-101-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds model for Google Goldfish virtual platform RTC device. We will be adding Goldfish RTC device to the QEMU RISC-V virt machine for providing real date-time to Guest Linux. The corresponding Linux driver for Goldfish RTC device is already available in upstream Linux. For now, VM migration support is available but untested for Goldfish RTC device. It will be hardened in-future when we implement VM migration for KVM RISC-V. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
* | hw/arm: ast2400/ast2500: Wire up EHCI controllersGuenter Roeck2020-02-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize EHCI controllers on AST2400 and AST2500 using the existing TYPE_PLATFORM_EHCI. After this change, booting ast2500-evb into Linux successfully instantiates a USB interface. ehci-platform 1e6a3000.usb: EHCI Host Controller ehci-platform 1e6a3000.usb: new USB bus registered, assigned bus number 1 ehci-platform 1e6a3000.usb: irq 21, io mem 0x1e6a3000 ehci-platform 1e6a3000.usb: USB 2.0 started, EHCI 1.00 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.05 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: EHCI Host Controller Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200206183437.3979-1-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | i.MX: Add support for WDT on i.MX6Roman Kapl2020-02-131-0/+3
|/ | | | | | | | | | Uses the i.MX2 rudimentary watchdog driver. Signed-off-by: Roman Kapl <rka@sysgo.com> Message-id: 20200207095529.11309-1-rka@sysgo.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: removed accidental duplicate #include line] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/pci/pci_bridge: Fix typo in commentJulia Suvorova2020-02-061-1/+1
| | | | | | | Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200205185123.210209-1-jusual@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* migration: Include migration support for machine check handlingAravinda Prasad2020-02-031-0/+2
| | | | | | | | | | | | | | This patch includes migration support for machine check handling. Especially this patch blocks VM migration requests until the machine check error handling is complete as these errors are specific to the source hardware and is irrelevant on the target hardware. Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com> [Do not set FWNMI cap in post_load, now its done in .apply hook] Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com> Message-Id: <20200130184423.20519-7-ganeshgr@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS callsAravinda Prasad2020-02-031-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support in QEMU to handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls. The machine check notification address is saved when the OS issues "ibm,nmi-register" RTAS call. This patch also handles the case when multiple processors experience machine check at or about the same time by handling "ibm,nmi-interlock" call. In such cases, as per PAPR, subsequent processors serialize waiting for the first processor to issue the "ibm,nmi-interlock" call. The second processor that also received a machine check error waits till the first processor is done reading the error log. The first processor issues "ibm,nmi-interlock" call when the error log is consumed. Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com> [Register fwnmi RTAS calls in core_rtas_register_types() where other RTAS calls are registered] Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com> Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* target/ppc: Build rtas error log upon an MCEAravinda Prasad2020-02-031-1/+5
| | | | | | | | | | | | | | | | | | | | | | Upon a machine check exception (MCE) in a guest address space, KVM causes a guest exit to enable QEMU to build and pass the error to the guest in the PAPR defined rtas error log format. This patch builds the rtas error log, copies it to the rtas_addr and then invokes the guest registered machine check handler. The handler in the guest takes suitable action(s) depending on the type and criticality of the error. For example, if an error is unrecoverable memory corruption in an application inside the guest, then the guest kernel sends a SIGBUS to the application. For recoverable errors, the guest performs recovery actions and logs the error. Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com> [Assume SLOF has allocated enough room for rtas error log] Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200130184423.20519-5-ganeshgr@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-11-12 21:37:49 +0100