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* Hexagon (linux-user/hexagon) Linux user emulationTaylor Simpson2021-02-181-0/+16
| | | | | | | | | | | | Implementation of Linux user emulation for Hexagon Some common files modified in addition to new files in linux-user/hexagon Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-31-git-send-email-tsimpson@quicinc.com> [rth: Fix termbits.h on review by Laurent] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Use cpu_untagged_addr in access_ok; split out *_untaggedRichard Henderson2021-02-161-1/+1
| | | | | | | | | | | Provide both tagged and untagged versions of access_ok. In a few places use thread_cpu, as the user is several callees removed from do_syscall1. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-17-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* exec: Use cpu_untagged_addr in g2h; split out g2h_untaggedRichard Henderson2021-02-161-6/+6
| | | | | | | | | | | | | | | | | | | | | | | Use g2h_untagged in contexts that have no cpu, e.g. the binary loaders that operate before the primary cpu is created. As a colollary, target_mmap and friends must use untagged addresses, since they are used by the loaders. Use g2h_untagged on values returned from target_mmap, as the kernel never applies a tag itself. Use g2h_untagged on all pc values. The only current user of tags, aarch64, removes tags from code addresses upon branch, so "pc" is always untagged. Use g2h with the cpu context on hand wherever possible. Use g2h_untagged in lock_user, which will be updated soon. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* exec: Use uintptr_t for guest_baseRichard Henderson2021-02-161-2/+2
| | | | | | | | | | | This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210212184902.1251044-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: Fix loading of BSS segmentsGiuseppe Musacchio2021-02-131-10/+20
| | | | | | | | | | | | | | | | | | | | | | | Some ELF binaries encode the .bss section as an extension of the data ones by setting the segment p_memsz > p_filesz. Some other binaries take a different route and encode it as a stand-alone PT_LOAD segment with p_filesz = 0 and p_memsz > 0. Both the encodings are actually correct per ELF specification but the ELF loader had some troubles in handling the former: with the old logic it was very likely to get Qemu to crash in zero_bss when trying to access unmapped memory. zero_bss isn't meant to allocate whole zero-filled segments but to "complete" a previously mapped segment with the needed zero bits. The fix is pretty simple, if the segment is completely zero-filled we simply allocate one or more pages (according to p_memsz) and avoid calling zero_bss altogether. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <c9106487-dc4d-120a-bd48-665b3c617287@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add support for MIPS Loongson 2F/3APhilippe Mathieu-Daudé2020-12-171-0/+2
| | | | | | | | | | | | | | | Userland ELF binaries using Loongson SIMD instructions have the HWCAP_LOONGSON_MMI bit set [1]. Binaries compiled for Loongson 3A [2] have the HWCAP_LOONGSON_EXT bit set for the LQ / SQ instructions. [1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags") [2] commit af868995e1b ("target/mips: Add Loongson-3 CPU definition") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-7-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Update HWCAP bits from linux 5.7Philippe Mathieu-Daudé2020-12-171-0/+13
| | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-6-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macroPhilippe Mathieu-Daudé2020-12-171-1/+11
| | | | | | | | | | | | | | | ISA features are usually denoted in read-only bits from CPU registers. Add the GET_FEATURE_REG_EQU() macro which checks if a CPU register has bits set to a specific value. Use the macro to check the 'Architecture Revision' level of the Config0 register, which is '2' when the Release 6 ISA is implemented. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-5-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macroPhilippe Mathieu-Daudé2020-12-171-1/+5
| | | | | | | | | | | | | | ISA features are usually denoted in read-only bits from CPU registers. Add the GET_FEATURE_REG_SET() macro which checks if a CPU register has bits set. Use the macro to check for MSA (which sets the MSAP bit of the Config3 register when the ASE implementation is present). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()Philippe Mathieu-Daudé2020-12-171-4/+4
| | | | | | | | | | | We want to add macros similar to GET_FEATURE(). As this one use the 'insn_flags' field, rename it GET_FEATURE_INSN(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() bodyPhilippe Mathieu-Daudé2020-12-171-5/+5
| | | | | | | | | As we are going to add more macros, keep the function body clear. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Check copy_from_user() return value in vma_dump_size()Peter Maydell2020-11-041-1/+3
| | | | | | | | | | | | | | Coverity points out that we don't check the return value from copy_from_user() in vma_dump_size(). This is to some extent a "can't happen" error since we've already checked the page with an access_ok() call earlier, but it's simple enough to handle the error anyway. Fixes: Coverity CID 1432362 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201103141532.19912-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Use "!= 0" when checking if MAP_FIXED_NOREPLACE is non-zeroPeter Maydell2020-11-041-1/+2
| | | | | | | | | | | | | | | | | | | In pgd_find_hole_fallback(), Coverity doesn't like the use of "if (MAP_FIXED_NOREPLACE || ...)" because it's using a logical operator on a constant other than 0 or 1 and its heuristic thinks we might have intended a bitwise operator instead. The logic is correct (we are checking whether the host really has a MAP_FIXED_NOREPLACE or whether we fell back to the "#define as 0 to ignore" from osdep.h); make Coverity happier by explicitly writing out the comparison with zero. Fixes: Coverity CID 1431059 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201103142636.21125-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Parse GNU_PROPERTY_AARCH64_FEATURE_1_ANDRichard Henderson2020-10-271-2/+46
| | | | | | | | | Use the new generic support for NT_GNU_PROPERTY_TYPE_0. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-12-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Parse NT_GNU_PROPERTY_TYPE_0 notesRichard Henderson2020-10-271-0/+157
| | | | | | | | | This is generic support, with the code disabled for all targets. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-11-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Use Error for load_elf_interpRichard Henderson2020-10-271-7/+8
| | | | | | | | | | | This is slightly clearer than just using strerror, though the different forms produced by error_setg_file_open and error_setg_errno isn't entirely convenient. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-10-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Use Error for load_elf_imageRichard Henderson2020-10-271-17/+20
| | | | | | | | | | This is a bit clearer than open-coding some of this with a bare c string. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-9-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Move PT_INTERP detection to first loopRichard Henderson2020-10-271-29/+31
| | | | | | | | | | For BTI, we need to know if the executable is static or dynamic, which means looking for PT_INTERP earlier. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Adjust iteration over phdrRichard Henderson2020-10-271-4/+5
| | | | | | | | | | | The second loop uses a loop induction variable, and the first does not. Transform the first to match the second, to simplify a following patch moving code between them. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-7-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Fix coding style in load_elf_imageRichard Henderson2020-10-271-3/+9
| | | | | | | | | Fixing this now will clarify following patches. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-6-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload: Avoid leaking interp_name using GLib memory APIPhilippe Mathieu-Daudé2020-10-271-4/+4
| | | | | | | | | | | | | Fix an unlikely memory leak in load_elf_image(). Fixes: bf858897b7 ("linux-user: Re-use load_elf_image for the main binary.") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-5-richard.henderson@linaro.org Message-Id: <20201003174944.1972444-1-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: test, don't assert addr != test in pgb_reserved_vaAlex Bennée2020-09-161-5/+4Star
| | | | | | | | | | | | | | | | On older kernels which don't implement MAP_FIXED_NOREPLACE the kernel may still fail to give us the address we asked for despite having already probed the map for a valid hole. Asserting isn't particularly useful to the user so let us move the check up and expand the error_report a little to give them a fighting chance of working around the problem. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Bug 1895080 <1895080@bugs.launchpad.net> Ameliorates: ee94743034 Message-Id: <20200915134317.11110-2-alex.bennee@linaro.org>
* linux-user: Correctly start brk after executableTimothy E Baldwin2020-09-051-4/+3Star
| | | | | | | | | | | | | info->brk was erroneously set to the end of highest addressed writable segment which could result it in overlapping the executable. As per load_elf_binary in fs/binfmt_elf.c in Linux, it should be set to end of highest addressed segment. Signed-off-by: Timothy E Baldwin <T.E.Baldwin99@members.leeds.ac.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200728224615.326675-1-T.E.Baldwin99@members.leeds.ac.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/microblaze: Split out MSR[C] to its own variableRichard Henderson2020-09-011-1/+1
| | | | | | | | | | Having the MSR[C] bit separate will improve arithmetic that operates on the carry bit. Having mb_cpu_read_msr() populate MSR[CC] will prevent the carry copy not matching the carry bit. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/microblaze: Split out EDR from env->sregsRichard Henderson2020-09-011-3/+6
| | | | | | | | | Finish eliminating the sregs array in favor of individual members. Does not correct the width of EDR, yet. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: detect mismatched ELF ABI in qemu-mips[n32][el]Carlo Marcelo Arenas Belón2020-08-271-0/+11
| | | | | | | | | | | | | | | | | | | | | | | MIPS provides 2 ILP32 ABIs, and therefore 4 possible qemu-mips binaries with 2 pairs using the same endianess and bitness. This could lead to an O32 image loading in the N32 binary or vice versa and in cryptic errors (if lucky that the CPU doesn't match the FPU used) like : qemu: Unexpected FPU mode (o32 ELF loaded to qemu-mipsn32[el]) ELF binary's NaN mode not supported by CPU (n32 -> qemu-mips[el]) Add an ABI check macro that could be used while checking the ELF header that relies in the ABI2 flag to identify n32 binaries and abort instead early with a more descriptive error : Invalid ELF image for this architecture Signed-off-by: Carlo Marcelo Arenas Belón <carenas@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200823101703.18451-1-carenas@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: don't use MAP_FIXED in pgd_find_hole_fallbackAlex Bennée2020-07-271-4/+6
| | | | | | | | | | | | | Plain MAP_FIXED has the undesirable behaviour of splatting exiting maps so we don't actually achieve what we want when looking for gaps. We should be using MAP_FIXED_NOREPLACE. As this isn't always available we need to potentially check the returned address to see if the kernel gave us what we asked for. Fixes: ad592e37dfc ("linux-user: provide fallback pgd_find_hole for bare chroots") Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200724064509.331-9-alex.bennee@linaro.org>
* linux-user/elfload: use MAP_FIXED_NOREPLACE in pgb_reserved_vaAlex Bennée2020-07-111-3/+7
| | | | | | | | | | | | | Given we assert the requested address matches what we asked we should also make that clear in the mmap flags. Otherwise we see failures in the GitLab environment for some currently unknown but allowable reason. We use MAP_FIXED_NOREPLACE if we can so we don't just clobber an existing mapping. Also include the strerror string for a bit more info on failure. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200701135652.1366-34-alex.bennee@linaro.org>
* linux-user: deal with address wrap for ARM_COMMPAGE on 32 bitAlex Bennée2020-06-081-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | We rely on the pointer to wrap when accessing the high address of the COMMPAGE so it lands somewhere reasonable. However on 32 bit hosts we cannot afford just to map the entire 4gb address range. The old mmap trial and error code handled this by just checking we could map both the guest_base and the computed COMMPAGE address. We can't just manipulate loadaddr to get what we want so we introduce an offset which pgb_find_hole can apply when looking for a gap for guest_base that ensures there is space left to map the COMMPAGE afterwards. This is arguably a little inefficient for the one 32 bit value (kuser_helper_version) we need to keep there given all the actual code entries are picked up during the translation phase. Fixes: ee94743034b Bug: https://bugs.launchpad.net/qemu/+bug/1880225 Cc: Bug 1880225 <1880225@bugs.launchpad.net> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200605154929.26910-13-alex.bennee@linaro.org>
* linux-user: provide fallback pgd_find_hole for bare chrootsAlex Bennée2020-06-081-0/+48
| | | | | | | | | | | | | | | | | | | When running QEMU out of a chroot environment we may not have access to /proc/self/maps. As there is no other "official" way to introspect our memory map we need to fall back to the original technique of repeatedly trying to mmap an address range until we find one that works. Fortunately it's not quite as ugly as the original code given we already re-factored the complications of dealing with the ARM_COMMPAGE. We do make an attempt to skip over brk() which is about the only concrete piece of information we have about the address map at this moment. Fixes: ee9474303 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200605154929.26910-12-alex.bennee@linaro.org>
* linux-user: limit check to HOST_LONG_BITS < TARGET_ABI_BITSAlex Bennée2020-05-281-0/+2
| | | | | | | | | | | | | | | | | | | | | Newer clangs rightly spot that you can never exceed the full address space of 64 bit hosts with: linux-user/elfload.c:2076:41: error: result of comparison 'unsigned long' > 18446744073709551615 is always false [-Werror,-Wtautological-type-limit-compare] 4685 if ((guest_hiaddr - guest_base) > ~(uintptr_t)0) { 4686 ~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~ 4687 1 error generated. So lets limit the check to 32 bit hosts only. Fixes: ee94743034bf Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200525131823.715-8-thuth@redhat.com> [thuth: Use HOST_LONG_BITS < TARGET_ABI_BITS instead of HOST_LONG_BITS == 32] Signed-off-by: Thomas Huth <thuth@redhat.com>
* linux-user: completely re-write init_guest_spaceAlex Bennée2020-05-151-253/+250Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | First we ensure all guest space initialisation logic comes through probe_guest_base once we understand the nature of the binary we are loading. The convoluted init_guest_space routine is removed and replaced with a number of pgb_* helpers which are called depending on what requirements we have when loading the binary. We first try to do what is requested by the host. Failing that we try and satisfy the guest requested base address. If all those options fail we fall back to finding a space in the memory map using our recently written read_self_maps() helper. There are some additional complications we try and take into account when looking for holes in the address space. We try not to go directly after the system brk() space so there is space for a little growth. We also don't want to have to use negative offsets which would result in slightly less efficient code on x86 when it's unable to use the segment offset register. Less mind-binding gotos and hopefully clearer logic throughout. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200513175134.19619-5-alex.bennee@linaro.org>
* linux-user: more debug for init_guest_spaceAlex Bennée2020-04-071-1/+7
| | | | | | | | | | | | Searching for memory space can cause problems so lets extend the CPU_LOG_PAGE output so you can watch init_guest_space fail to allocate memory. A more involved fix is actually required to make this function play nicely with the large guard pages the sanitiser likes to use. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200403191150.863-5-alex.bennee@linaro.org>
* linux-user: Add AT_EXECFN auxvalLirong Yuan2020-03-201-1/+2
| | | | | | | | | This change adds the support for AT_EXECFN auxval. Signed-off-by: Lirong Yuan <yuanzi@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200302193153.66415-1-yuanzi@google.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/arm: Implement v8.4-RCPCPeter Maydell2020-02-281-0/+1
| | | | | | | | | | | | | | | | | The v8.4-RCPC extension implements some new instructions: * LDAPUR, LDAPURB, LDAPURH, LDAPRSB, LDAPRSH, LDAPRSW * STLUR, STLURB, STLURH These are all in a new subgroup of encodings that sits below the top-level "Loads and Stores" group in the Arm ARM. The STLUR* instructions have standard store-release semantics; the LDAPUR* have Load-AcquirePC semantics, but (as with LDAPR*) we choose to implement them as the slightly stronger Load-Acquire. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200224172846.13053-4-peter.maydell@linaro.org
* target/arm: Implement v8.3-RCPCPeter Maydell2020-02-281-0/+1
| | | | | | | | | | | The v8.3-RCPC extension implements three new load instructions which provide slightly weaker consistency guarantees than the existing load-acquire operations. For QEMU we choose to simply implement them with a full LDAQ barrier. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200224172846.13053-3-peter.maydell@linaro.org
* linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAPRichard Henderson2020-02-281-10/+13
| | | | | | | | | | | | | | Use isar feature tests instead of feature bit tests. Although none of QEMUs current cpus have VFPv3 without D32, replace the large comment explaining why with one line that sets ARM_HWCAP_ARM_VFPv3D16 under the correct conditions. Mirror the test sequence used in the linux kernel. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200224222232.13807-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registersPeter Maydell2020-02-211-2/+2
| | | | | | | | | | | | | | | | | | Enforce a convention that an isar_feature function that tests a 32-bit ID register always has _aa32_ in its name, and one that tests a 64-bit ID register always has _aa64_ in its name. We already follow this except for three cases: thumb_div, arm_div and jazelle, which all need _aa32_ adding. (As noted in the comment, isar_feature_aa32_fp16_arith() is an exception in that it currently tests ID_AA64PFR0_EL1, but will switch to MVFR1 once we've properly implemented FP16 for AArch32.) Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200214175116.9164-2-peter.maydell@linaro.org
* linux-user: Reserve space for brkRichard Henderson2020-01-221-17/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | With bad luck, we can wind up with no space at all for brk, which will generally cause the guest malloc to fail. This bad luck is easier to come by with ET_DYN (PIE) binaries, where either the stack or the interpreter (ld.so) gets placed immediately after the main executable. But there's nothing preventing this same thing from happening with ET_EXEC (normal) binaries, during probe_guest_base(). In both cases, reserve some extra space via mmap and release it back to the system after loading the interpreter and allocating the stack. The choice of 16MB is somewhat arbitrary. It's enough for libc to get going, but without being so large that 32-bit guests or 32-bit hosts are in danger of running out of virtual address space. It is expected that libc will be able to fall back to mmap arenas after the limited brk space is exhausted. Launchpad: https://bugs.launchpad.net/qemu/+bug/1749393 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200117230245.5040-1-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user:Fix align mistake when mmap guest spaceXinyu Li2020-01-221-1/+1
| | | | | | | | | | | | | | | | | | | In init_guest_space, we need to mmap guest space. If the return address of first mmap is not aligned with align, which was set to MAX(SHMLBA, qemu_host_page_size), we need unmap and a new mmap(space is larger than first size). The new size is named real_size, which is aligned_size + qemu_host_page_size. alugned_size is the guest space size. And add a qemu_host_page_size to avoid memory error when we align real_start manually (ROUND_UP(real_start, align)). But when SHMLBA > qemu_host_page_size, the added size will smaller than the size to align, which can make a mistake(in a mips machine, it appears). So change real_size from aligned_size +qemu_host_page_size to aligned_size + align will solve it. Signed-off-by: Xinyu Li <precinct@mail.ustc.edu.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191213022919.5934-1-precinct@mail.ustc.edu.cn> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/arm: Add support for DC CVAP & DC CVADP insBeata Michalska2019-12-161-0/+2
| | | | | | | | | | | | | | | | ARMv8.2 introduced support for Data Cache Clean instructions to PoP (point-of-persistence) - DC CVAP and PoDP (point-of-deep-persistence) - DV CVADP. Both specify conceptual points in a memory system where all writes that are to reach them are considered persistent. The support provided considers both to be actually the same so there is no distinction between the two. If none is available (there is no backing store for given memory) both will result in Data Cache Clean up to the point of coherency. Otherwise sync for the specified range shall be performed. Signed-off-by: Beata Michalska <beata.michalska@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191121000843.24844-5-beata.michalska@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: Support gdb 'qOffsets' query for ELFJosh Kunz2019-09-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | This is needed to support debugging PIE ELF binaries running under QEMU user mode. Currently, `code_offset` and `data_offset` remain unset for all ELF binaries, so GDB is unable to correctly locate the position of the binary's text and data. The fields `code_offset`, and `data_offset` were originally added way back in 2006 to support debugging of bFMT executables (978efd6aac6), and support was just never added for ELF. Since non-PIE binaries are loaded at exactly the address specified in the binary, GDB does not need to relocate any symbols, so the buggy behavior is not normally observed. http://sourceware.org/gdb/onlinedocs/gdb/General-Query-Packets.html#index-qOffsets-packet Buglink: https://bugs.launchpad.net/qemu/+bug/1528239 Signed-off-by: Josh Kunz <jkz@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190816233422.16715-1-jkz@google.com> [lv: added link to documentation] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add AT_HWCAP2 for aarch64-linux-userRichard Henderson2019-09-101-4/+27
| | | | | | | | | | Add the HWCAP2_* bits from kernel version v5.3-rc3. Enable the bits corresponding to ARMv8.5-CondM and ARMv8.5-FRINT. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20190809171156.3476-1-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* Include qemu/queue.h slightly lessMarkus Armbruster2019-08-161-0/+1
| | | | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-20-armbru@redhat.com>
* linux-user: update PPC64 HWCAP2 feature listLaurent Vivier2019-06-241-2/+10
| | | | | | | | | | | | | QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use of VSX instructions in libcrypto that are accelerated by the TCG vector instructions now. QEMU_PPC_FEATURE2_DARN allows to use the new builtin qemu_guest_getrandom() function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609143521.19374-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-3/+3
| | | | | | | | | Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: elf: ELF_HWCAP for s390xDavid Hildenbrand2019-06-071-0/+28
| | | | | | | | | | | | | | Let's add all HWCAPs that we can support under TCG right now, when the respective CPU facilities are enabled. Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Laurent Vivier <laurent@vivier.eu> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Laurent Vivier <laurent@vivier.eu> Cc: Richard Henderson <richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2019-05-241-7/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging Add /proc/hardware and /proc/cpuinfo, update SIOCXXX ioctls, fix shmat emulation, add nanoseconds in stat, init field fp_abi on mips # gpg: Signature made Fri 24 May 2019 12:24:36 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-4.1-pull-request: linux-user: Pass through nanosecond timestamp components for stat syscalls linux-user: Align mmap_find_vma to host page size linux-user: Fix shmat emulation by honoring host SHMLBA linux-user: Sanitize interp_info and, for mips only, init field fp_abi linux-user: Add support for SIOC<G|S>IFPFLAGS ioctls for all targets linux-user: Add support for SIOCSPGRP ioctl for all targets linux-user: Fix support for SIOCATMARK and SIOCGPGRP ioctls for xtensa linux-user: add pseudo /proc/hardware for m68k linux-user: add pseudo /proc/cpuinfo for sparc Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user: Fix shmat emulation by honoring host SHMLBARichard Henderson2019-05-241-7/+10
| | | | | | | | | | | | | | | | | | | | | | For those hosts with SHMLBA > getpagesize, we don't automatically select a guest address that is compatible with the host. We can achieve this by boosting the alignment of guest_base and by adding an extra alignment argument to mmap_find_vma. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190519201953.20161-13-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Sanitize interp_info and, for mips only, init field fp_abiDaniel Santos2019-05-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sanitize interp_info structure in load_elf_binary() and, for MIPS only, init its field fp_abi to MIPS_ABI_FP_UNKNOWN. This fixes appearances of "Unexpected FPU mode" message in some MIPS use cases. Currently, this bug is a complete stopper for some MIPS binaries. In load_elf_binary(), struct image_info interp_info is used without being properly initialized. One result is that when the ELF's program header doesn't contain an entry for the ABI flags, then the value of the struct image_info's fp_abi field is set to whatever happened to be in stack memory at the time. Backporting to 4.0 and, if possible, to 3.1 is recommended. Fixes: https://bugs.launchpad.net/qemu/+bug/1825002 Signed-off-by: Daniel Santos <daniel.santos@pobox.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1558282527-22183-6-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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