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* linux user: Fix Lesser GPL version numberChetan Pant2020-11-153-3/+3
| | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023122455.19417-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* linux-user: Correct definition of stack_tLemonBoy2020-11-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Some platforms used the wrong definition of stack_t where the flags and size fields were swapped or where the flags field had type ulong instead of int. Due to the presence of padding space in the structure and the prevalence of little-endian machines this problem went unnoticed for a long time. The type definitions have been cross-checked with the ones defined in the Linux kernel v5.9, plus some older versions for a few architecture that have been removed and Xilinx's kernel fork for NiosII [1]. The bsd-user headers remain unchanged as I don't know if they are wrong or not. [1] https://github.com/Xilinx/linux-xlnx/blob/master/arch/nios2/include/uapi/asm/signal.h Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <e9d47692-ee92-009f-6007-0abc3f502b97@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: update syscall.tbl to Linux 5.9-rc7Laurent Vivier2020-10-261-10/+20
| | | | | | | | | Updated running scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930003033.554124-4-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: fix ppc/termbits.hLaurent Vivier2020-09-061-1/+1
| | | | | | | | | | On ppc, in termios, c_line is after c_cc, not before . Fixes: c218b4ede4f9 ("linux-user: Add missing termbits types and values definitions") Cc: Filip.Bozuta@syrmia.com Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200830181620.422036-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add missing termbits types and values definitionsFilip Bozuta2020-08-271-8/+13
| | | | | | | | | | | | | | | | This patch introduces missing target types ('target_flag_t', 'target_cc_t', 'target_speed_t') in a few 'termibts.h' header files. Also, two missing values ('TARGET_IUTF8' and 'TARGET_EXTPROC') were also added. These values were also added in file 'syscall.c' in bitmask tables 'iflag_tbl[]' and 'lflag_tbl[]' which are used to convert values of 'struct termios' between target and host. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200723210233.349690-3-Filip.Bozuta@syrmia.com> [lv: keep TARGET_NCCS definition in xtensa/termbits.h] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add strace support for printing arguments of syscalls used to ↵Filip Bozuta2020-08-271-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lock and unlock memory This patch implements strace argument printing functionality for following syscalls: * mlock, munlock, mlockall, munlockall - lock and unlock memory int mlock(const void *addr, size_t len) int munlock(const void *addr, size_t len) int mlockall(int flags) int munlockall(void) man page: https://man7.org/linux/man-pages/man2/mlock.2.html Implementation notes: Syscall mlockall() takes an argument that is composed of predefined values which represent flags that determine the type of locking operation that is to be performed. For that reason, a printing function "print_mlockall" was stated in file "strace.list". This printing function uses an already existing function "print_flags()" to print the "flags" argument. These flags are stated inside an array "mlockall_flags" that contains values of type "struct flags". These values are instantiated using an existing macro "FLAG_TARGET()" that crates aproppriate target flag values based on those defined in files '/target_syscall.h'. These target flag values were changed from "TARGET_MLOCKALL_MCL*" to "TARGET_MCL_*" so that they can be aproppriately set and recognised in "strace.c" with "FLAG_TARGET()". Value for "MCL_ONFAULT" was added in this patch. This value was also added in "syscall.c" in function "target_to_host_mlockall_arg()". Because this flag value was added in kernel version 4.4, it is enwrapped in an #ifdef directive (both in "syscall.c" and in "strace.c") as to support older kernel versions. The other syscalls have only primitive argument types, so the rest of the implementation was handled by stating an appropriate printing format in file "strace.list". Syscall mlock2() is not implemented in "syscall.c" and thus it's argument printing is not implemented in this patch. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200811164553.27713-4-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* meson: linux-userMarc-André Lureau2020-08-212-6/+5Star
| | | | | | | | | | | | | | The most interesting or most complicated part here is the syscall_nr.h generators. In order to keep the generation logic all in meson.build, I am adding to config_target the name of the .tbl file, and making the generated file syscall<SUFFIX>_nr.h for input file syscall<SUFFIX>.tbl. For architectures where the input file is not named syscall_nr.tbl, syscall_nr.h has to be a source file; it's just a forwarder for x86 (i386/x86_64), while for MIPS64 it chooses between N32 and N64 ABIs. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/ppc: Add support for scv and rfscv instructionsNicholas Piggin2020-05-271-0/+1
| | | | | | | | | | | POWER9 adds scv and rfscv instructions and the system call vectored interrupt. Linux does not support this instruction yet but it has been tested with a modified kernel that runs on real hardware. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20200507115328.789175-1-npiggin@gmail.com> [dwg: Corrected an overlong line] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user/ppc: Fix padding in mcontext_t for ppc64Richard Henderson2020-04-171-40/+29Star
| | | | | | | | | | | | | | | | The padding that was added in 95cda4c44ee was added to a union, and so it had no effect. This fixes misalignment errors detected by clang sanitizers for ppc64 and ppc64le. In addition, only ppc64 allocates space for VSX registers, so do not save them for ppc32. The kernel only has references to CONFIG_SPE in signal_32.c, so do not attempt to save them for ppc64. Fixes: 95cda4c44ee Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200407032105.26711-1-richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* target/ppc: don't byte swap ELFv2 signal handlerVincent Fazio2020-03-241-4/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | Previously, the signal handler would be byte swapped if the target and host CPU used different endianness. This would cause a SIGSEGV when attempting to translate the opcode pointed to by the swapped address. Thread 1 "qemu-ppc64" received signal SIGSEGV, Segmentation fault. 0x00000000600a9257 in ldl_he_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:351 351 __builtin_memcpy(&r, ptr, sizeof(r)); #0 0x00000000600a9257 in ldl_he_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:351 #1 0x00000000600a92fe in ldl_be_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:449 #2 0x00000000600c0790 in translator_ldl_swap at qemu/include/exec/translator.h:201 #3 0x000000006011c1ab in ppc_tr_translate_insn at qemu/target/ppc/translate.c:7856 #4 0x000000006005ae70 in translator_loop at qemu/accel/tcg/translator.c:102 The signal handler will be byte swapped as a result of the __get_user() call in sigaction() if it is necessary, no additional swap is required. Signed-off-by: Vincent Fazio <vfazio@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200319133244.8818-1-vfazio@xes-inc.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user: update syscall.tbl from linux 0bf999f9c5e7Laurent Vivier2020-03-201-0/+2
| | | | | | | | | Run scripts/update-syscalltbl.sh with linux commit 0bf999f9c5e7 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20200310103403.3284090-20-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user, ppc: add syscall table generation supportLaurent Vivier2020-03-205-403/+560
| | | | | | | | | | | | | Copy syscall.tbl and syscallhdr.sh from linux/arch/ppc/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h and to not generate the entry if entry point is sys_ni_syscall. Fix ppc/signal.c to define do_sigreturn() for TARGET_ABI32. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20200310103403.3284090-10-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/ppc: Implement the VTB for HV accessSuraj Jitindar Singh2019-12-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | The virtual timebase register (VTB) is a 64-bit register which increments at the same rate as the timebase register, present on POWER8 and later processors. The register is able to be read/written by the hypervisor and read by the supervisor. All other accesses are illegal. Currently the VTB is just an alias for the timebase (TB) register. Implement the VTB so that is can be read/written independent of the TB. Make use of the existing method for accessing timebase facilities where by the compensation is stored and used to compute the value on reads/is updated on writes. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> [ clg: rebased on current ppc tree ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191128134700.16091-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user: Introduce cpu_clone_regs_parentRichard Henderson2019-11-061-0/+4
| | | | | | | | | | | | We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Rename cpu_clone_regs to cpu_clone_regs_childRichard Henderson2019-11-061-1/+2
| | | | | | | | | | | | | | | We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/ppc: fix signal delivery for ppc64abi32Alex Bennée2019-09-261-1/+3
| | | | | | | | | We were incorrectly using the 64-bit AIX ABI instead of the 32-bit SYSV ABI for setting NIP for the signal handler. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: set default PPC64 CPULaurent Vivier2019-06-241-1/+1
| | | | | | | | | The default CPU for pseries has been set to POWER9 by default. We can use the same default for linux-user Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609143521.19374-2-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* Supply missing header guardsMarkus Armbruster2019-06-122-0/+11
| | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com>
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-0/+1
| | | | | | | | | | | | | | | | No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
* target/ppc: Use env_cpu, env_archcpuRichard Henderson2019-06-101-1/+1
| | | | | | | | | | | Cleanup in the boilerplate that each target must define. Replace ppc_env_get_cpu with env_archcpu. The combination CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/ppc: move FP and VMX registers into aligned vsr register arrayMark Cave-Ayland2019-01-081-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VSX register array is a block of 64 128-bit registers where the first 32 registers consist of the existing 64-bit FP registers extended to 128-bit using new VSR registers, and the last 32 registers are the VMX 128-bit registers as show below: 64-bit 64-bit +--------------------+--------------------+ | FP0 | | VSR0 +--------------------+--------------------+ | FP1 | | VSR1 +--------------------+--------------------+ | ... | ... | ... +--------------------+--------------------+ | FP30 | | VSR30 +--------------------+--------------------+ | FP31 | | VSR31 +--------------------+--------------------+ | VMX0 | VSR32 +-----------------------------------------+ | VMX1 | VSR33 +-----------------------------------------+ | ... | ... +-----------------------------------------+ | VMX30 | VSR62 +-----------------------------------------+ | VMX31 | VSR63 +-----------------------------------------+ In order to allow for future conversion of VSX instructions to use TCG vector operations, recreate the same layout using an aligned version of the existing vsr register array. Since the old fpr and avr register arrays are removed, the existing callers must also be updated to use the correct offset in the vsr register array. This also includes switching the relevant VMState fields over to using subarrays to make sure that migration is preserved. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user: Don't call gdb_handlesig() before queue_signal()Peter Maydell2018-11-121-10/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The CPU main-loop routines for linux-user generally call gdb_handlesig() when they're about to queue a SIGTRAP signal. This is wrong, because queue_signal() will cause us to pend a signal, and process_pending_signals() will then call gdb_handlesig() itself. So the effect is that we notify gdb of the SIGTRAP, and then if gdb says "OK, continue with signal X" we will incorrectly notify gdb of the signal X as well. We don't do this double-notify for anything else, only SIGTRAP. Remove this unnecessary and incorrect code from all the targets except for nios2 (whose main loop is doing something different and broken, and will be handled in a separate patch). This bug only manifests if the user responds to the reported SIGTRAP using "signal SIGFOO" rather than "continue"; since the latter is the overwhelmingly common thing to do after a breakpoint most people won't have hit this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20181019174958.26616-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/ppc: Implement swapcontext syscallRichard Henderson2018-07-221-0/+56
| | | | | | | | | | | | | | | | This allows the tests generated by debian-powerpc-user-cross to function properly, especially tests/test-coroutine. Technically this syscall is available to both ppc32 and ppc64, but only ppc32 glibc actually uses it. Thus the ppc64 path is untested. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180718200648.22529-1-richard.henderson@linaro.org>
* target/ppc: Remove POWERPC_EXCP_STCXRichard Henderson2018-07-031-99/+22Star
| | | | | | | | | Always use the gen_conditional_store implementation that uses atomic_cmpxchg. Make sure and clear reserve_addr across most interrupts crossing the cpu_loop. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user: move generic signal definitions to generic/signal.hLaurent Vivier2018-06-041-0/+2
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-10-laurent@vivier.eu>
* linux-user: move get_sp_from_cpustate() to target_cpu.hLaurent Vivier2018-06-043-9/+4Star
| | | | | | | | | Remove useless includes Fix HPPA include guard. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-9-laurent@vivier.eu>
* linux-user: move ppc fcntl definitions to ppc/target_fcntl.hLaurent Vivier2018-06-041-0/+6
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-7-laurent@vivier.eu>
* linux-user: move generic fcntl definitions to generic/fcntl.hLaurent Vivier2018-06-041-0/+11
| | | | | | | | | add a per target target_fcntl.h and include the generic one from them No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-2-laurent@vivier.eu>
* linux-user: move ppc socket.h definitions to ppc/sockbits.hLaurent Vivier2018-05-251-0/+25
| | | | | | | | | Change conditional #ifdef part by #undef of the symbols redefined for PPC relative to generic/socket.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-6-laurent@vivier.eu>
* linux-user: move socket.h generic definitions to generic/sockbits.hLaurent Vivier2018-05-251-0/+1
| | | | | | | | and include the file from architectures without specific definitions Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-5-laurent@vivier.eu>
* linux-user: introduce target_sigsp() and target_save_altstack()Laurent Vivier2018-05-031-13/+2Star
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411192347.30228-1-laurent@vivier.eu>
* linux-user: move ppc/ppc64 cpu loop to ppc directoryLaurent Vivier2018-04-301-0/+553
| | | | | | | | | No code change, only move code from main.c to ppc/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-7-laurent@vivier.eu>
* linux-user: create a dummy per arch cpu_loop.cLaurent Vivier2018-04-301-0/+26
| | | | | | | | | | | | | | | Create a cpu_loop-common.h for future use by these new files and use it in the existing main.c Introduce target_cpu_copy_regs(): declare the function in cpu_loop-common.h and an empty function for each target, to move all the cpu_loop prologues to this function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-2-laurent@vivier.eu>
* linux-user: define TARGET_ARCH_HAS_SETUP_FRAMELaurent Vivier2018-04-301-5/+1Star
| | | | | | | | | | | | | Instead of calling setup_frame() conditionally to a list of known targets, define TARGET_ARCH_HAS_SETUP_FRAME if the target provides the function and call it only if the macro is defined. Move declarations of setup_frame() and setup_rt_frame() to linux-user/signal-common.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-21-laurent@vivier.eu>
* linux-user: move ppc/ppc64 signal.c parts to ppc directoryLaurent Vivier2018-04-302-1/+678
| | | | | | | | | | | No code change, only move code from signal.c to ppc/signal.c, except adding includes and exporting setup_frame() and setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-20-laurent@vivier.eu>
* linux-user: create a dummy per arch signal.cLaurent Vivier2018-04-301-0/+18
| | | | | | | | | | Create a signal-common.h for future use by these new files and use it in the existing signal.c Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-2-laurent@vivier.eu>
* linux-user: Move CPU type name selection to a functionLaurent Vivier2018-02-251-0/+18
| | | | | | | | | | | | | | | | | Instead of a sequence of "#if ... #endif" move the selection to a function in linux-user/*/target_elf.h We can't add them in linux-user/*/target_cpu.h because we will need to include "elf.h" to use ELF flags with eflags, and including "elf.h" in "target_cpu.h" introduces some conflicts in elfload.c Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180220173307.25125-2-laurent@vivier.eu>
* linux-user: Implement ioctl cmd TIOCGPTPEERAndreas Schwab2018-02-181-0/+1
| | | | | | | | | With glibc 2.27 the openpty function prefers the TIOCGPTPEER ioctl. Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <mvmbmhdosb9.fsf_-_@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* ppc: Fix signal delivery in ppc-user and ppc64-userBenjamin Herrenschmidt2016-09-231-0/+2
| | | | | | | | | | | | | | | | | | | | | There were a number of bugs in the implementation: - The structure alignment was wrong for 64-bit. - Also 64-bit only does RT signals. - On 64-bit, we need to put a pointer to the (aligned) vector registers in the frame and use it for restoring - We had endian bugs when saving/restoring vector registers - My recent fixes for exception NIP broke sigreturn in user mode causing us to resume one instruction too far. - Add VSR second halves Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* linux-user: fix TARGET_NR_selectLaurent Vivier2016-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TARGET_NR_select can have three different implementations: 1- to always return -ENOSYS microblaze, ppc, ppc64 -> TARGET_WANT_NI_OLD_SELECT 2- to take parameters from a structure pointed by arg1 (kernel sys_old_select) i386, arm, m68k -> TARGET_WANT_OLD_SYS_SELECT 3- to take parameters from arg[1-5] (kernel sys_select) x86_64, alpha, s390x, cris, sparc, sparc64 Some (new) architectures don't define NR_select, 4- but only NR__newselect with sys_select: mips, mips64, sh 5- don't define NR__newselect, and use pselect6 syscall: aarch64, openrisc, tilegx, unicore32 Reported-by: Timothy Pearson <tpearson@raptorengineering.com> Reported-by: Allan Wirth <awirth@akamai.com> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Clean up target_structs.h header guardsMarkus Armbruster2016-07-121-2/+2
| | | | | | | | | | | | These headers all use TARGET_STRUCTS_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_STRUCTS_H for linux-user/$target/target_structs.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* linux-user: Clean up target_signal.h header guardsMarkus Armbruster2016-07-121-3/+3
| | | | | | | | | | | | These headers all use TARGET_SIGNAL_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_SIGNAL_H for linux-user/$target/target_signal.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* linux-user: Clean up target_cpu.h header guardsMarkus Armbruster2016-07-121-2/+2
| | | | | | | | | | | | These headers all use TARGET_CPU_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_CPU_H for linux-user/$target/target_cpu.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* linux-user: Clean up target_syscall.h header guardsMarkus Armbruster2016-07-121-3/+3
| | | | | | | | | | | | | | | | | | | | Some of them use guard symbol TARGET_SYSCALL_H, but we also have CRIS_SYSCALL_H, MICROBLAZE_SYSCALLS_H, TILEGX_SYSCALLS_H and __UC32_SYSCALL_H__. They all upset scripts/clean-header-guards.pl. Reuse of the same guard symbol TARGET_SYSCALL_H in multiple headers is okay as long as they cannot be included together. The script can't tell, so it warns. The script dislikes the other guard symbols, too. They don't match their file name (they should, to make guard collisions less likely), and __UC32_SYSCALL_H__ is a reserved identifier. Clean them all up: use guard symbol $target_TARGET_SYSCALL_H for linux-user/$target/target_sycall.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* linux-user: Support for restarting system calls for PPC targetsTimothy E Baldwin2016-05-271-0/+1
| | | | | | | | | | | | | | Update the PPC main loop code: * on TARGET_ERESTARTSYS, wind guest PC backwards to repeat syscall insn (We already handle TARGET_QEMU_ESIGRETURN.) Signed-off-by: Timothy Edward Baldwin <T.E.Baldwin99@members.leeds.ac.uk> Message-id: 1441497448-32489-8-git-send-email-T.E.Baldwin99@members.leeds.ac.uk Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweak commit message; drop TARGET_USE_ERESTARTSYS define] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Renumber TARGET_QEMU_ESIGRETURN, make it not arch-specificTimothy E Baldwin2016-05-271-2/+0Star
| | | | | | | | | | | | | | | | | Currently we define a QEMU-internal errno TARGET_QEMU_ESIGRETURN only on the MIPS and PPC targets; move this to errno_defs.h so it is available for all architectures, and renumber it to 513. We pick 513 because this is safe from future use as a system call return value: Linux uses it as ERESTART_NOINTR internally and never allows that errno to escape to userspace. Signed-off-by: Timothy Edward Baldwin <T.E.Baldwin99@members.leeds.ac.uk> Message-id: 1441497448-32489-4-git-send-email-T.E.Baldwin99@members.leeds.ac.uk [PMM: TARGET_ERESTARTSYS split out into preceding patch, add comment] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: correct timerfd_create syscall numbersRiku Voipio2016-02-231-1/+1
| | | | | | | | | | | | x86, m68k, ppc, sh4 and sparc failed to enable timerfd, because they didn't have timerfd_create system call defined. Instead QEMU defined timerfd syscall. Checking with kernel sources, it appears kernel developers reused timerfd syscall number with timerfd_create, presumably since no userspace called the old syscall number. Reported-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: sync syscall numbers with kernelRiku Voipio2016-02-231-0/+24
| | | | | | | Sync syscall numbers to match the linux v4.5-rc1 kernel. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* build: [linux-user] Rename "syscall.h" to "target_syscall.h" in target ↵Lluís Vilanova2016-02-231-0/+5
| | | | | | | | | | | directories This fixes double-definitions in linux-user builds when using the UST tracing backend (which indirectly includes the system's "syscall.h"). Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Support target-to-host translation of mlockall argumentTom Musta2014-08-221-0/+2
| | | | | | | | | | | | | The argument to the mlockall system call is not necessarily the same on all platforms and thus may require translation prior to passing to the host. For example, PowerPC 64 bit platforms define values for MCL_CURRENT (0x2000) and MCL_FUTURE (0x4000) which are different from Intel platforms (0x1 and 0x2, respectively) Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
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