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* Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180703' ↵Peter Maydell2018-07-031-99/+22Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ppc patch queue 2018-07-03 Here's a last minue pull request before today's soft freeze. Ideally I would have sent this earlier, but I was waiting for a couple of extra fixes I knew were close. And the freeze crept up on me, like always. Most of the changes here are bugfixes in any case. There are some cleanups as well, which have been in my staging tree for a little while. There are a couple of truly new features (some extensions to the sam460ex platform), but these are low risk, since they only affect a new and not really stabilized machine type anyway. Higlights are: * Mac platform improvements from Mark Cave-Ayland * Sam460ex improvements from BALATON Zoltan et al. * XICS interrupt handler cleanups from Cédric Le Goater * TCG improvements for atomic loads and stores from Richard Henderson * Assorted other bugfixes # gpg: Signature made Tue 03 Jul 2018 06:55:22 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.0-20180703: (35 commits) ppc: Include vga cirrus card into the compiling process target/ppc: Relax reserved bitmask of indexed store instructions target/ppc: set is_jmp on ppc_tr_breakpoint_check spapr: compute default value of "hpt-max-page-size" later target/ppc/kvm: don't pass cpu to kvm_get_smmu_info() target/ppc/kvm: get rid of kvm_get_fallback_smmu_info() ppc440_uc: Basic emulation of PPC440 DMA controller sam460ex: Add RTC device hw/timer: Add basic M41T80 emulation ppc4xx_i2c: Rewrite to model hardware more closely hw/ppc: Give sam46ex its own config option fpu_helper.c: fix setting FPSCR[FI] bit target/ppc: Implement the rest of gen_st_atomic target/ppc: Implement the rest of gen_ld_atomic target/ppc: Use atomic min/max helpers target/ppc: Use MO_ALIGN for EXIWX and ECOWX target/ppc: Split out gen_st_atomic target/ppc: Split out gen_ld_atomic target/ppc: Split out gen_load_locked target/ppc: Tidy gen_conditional_store ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/ppc/spapr.c
| * target/ppc: Remove POWERPC_EXCP_STCXRichard Henderson2018-07-031-99/+22Star
| | | | | | | | | | | | | | | | | | Always use the gen_conditional_store implementation that uses atomic_cmpxchg. Make sure and clear reserve_addr across most interrupts crossing the cpu_loop. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | linux-user: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé2018-07-021-2/+3
|/ | | | | | | | | | | | | | | It eases code review, unit is explicit. Patch generated using: $ git grep -n '[<>][<>]= ?[1-5]0' and modified manually. Suggested-by: Eric Blake <eblake@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180625124238.25339-46-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/arm: Implement ARMv8.2-DotProdRichard Henderson2018-06-291-0/+1
| | | | | | | | | | | We've already added the helpers with an SVE patch, all that remains is to wire up the aa64 and aa32 translators. Enable the feature within -cpu max for CONFIG_USER_ONLY. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180627043328.11531-36-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Enable SVE for aarch64-linux-userRichard Henderson2018-06-291-0/+1
| | | | | | | | | | Enable ARM_FEATURE_SVE for the generic "max" cpu. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180627043328.11531-35-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* move public invalidate APIs out of translate-all.{c,h}, clean upPaolo Bonzini2018-06-281-1/+0Star
| | | | | | | | | Place them in exec.c, exec-all.h and ram_addr.h. This removes knowledge of translate-all.h (which is an internal header) from several files outside accel/tcg and removes knowledge of AddressSpace from translate-all.c (as it only operates on ram_addr_t). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: remove tb_lockEmilio G. Cota2018-06-151-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mmap_lock in user-mode to protect TCG state and the page descriptors. In !user-mode, each vCPU has its own TCG state, so no locks needed. Per-page locks are used to protect the page descriptors. Per-TB locks are used in both modes to protect TB jumps. Some notes: - tb_lock is removed from notdirty_mem_write by passing a locked page_collection to tb_invalidate_phys_page_fast. - tcg_tb_lookup/remove/insert/etc have their own internal lock(s), so there is no need to further serialize access to them. - do_tb_flush is run in a safe async context, meaning no other vCPU threads are running. Therefore acquiring mmap_lock there is just to please tools such as thread sanitizer. - Not visible in the diff, but tb_invalidate_phys_page already has an assert_memory_lock. - cpu_io_recompile is !user-only, so no mmap_lock there. - Added mmap_unlock()'s before all siglongjmp's that could be called in user-mode while mmap_lock is held. + Added an assert for !have_mmap_lock() after returning from the longjmp in cpu_exec, just like we do in cpu_exec_step_atomic. Performance numbers before/after: Host: AMD Opteron(tm) Processor 6376 ubuntu 17.04 ppc64 bootup+shutdown time 700 +-+--+----+------+------------+-----------+------------*--+-+ | + + + + + *B | | before ***B*** ** * | |tb lock removal ###D### *** | 600 +-+ *** +-+ | ** # | | *B* #D | | *** * ## | 500 +-+ *** ### +-+ | * *** ### | | *B* # ## | | ** * #D# | 400 +-+ ** ## +-+ | ** ### | | ** ## | | ** # ## | 300 +-+ * B* #D# +-+ | B *** ### | | * ** #### | | * *** ### | 200 +-+ B *B #D# +-+ | #B* * ## # | | #* ## | | + D##D# + + + + | 100 +-+--+----+------+------------+-----------+------------+--+-+ 1 8 16 Guest CPUs 48 64 png: https://imgur.com/HwmBHXe debian jessie aarch64 bootup+shutdown time 90 +-+--+-----+-----+------------+------------+------------+--+-+ | + + + + + + | | before ***B*** B | 80 +tb lock removal ###D### **D +-+ | **### | | **## | 70 +-+ ** # +-+ | ** ## | | ** # | 60 +-+ *B ## +-+ | ** ## | | *** #D | 50 +-+ *** ## +-+ | * ** ### | | **B* ### | 40 +-+ **** # ## +-+ | **** #D# | | ***B** ### | 30 +-+ B***B** #### +-+ | B * * # ### | | B ###D# | 20 +-+ D ##D## +-+ | D# | | + + + + + + | 10 +-+--+-----+-----+------------+------------+------------+--+-+ 1 8 16 Guest CPUs 48 64 png: https://imgur.com/iGpGFtv The gains are high for 4-8 CPUs. Beyond that point, however, unrelated lock contention significantly hurts scalability. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/sparc64: Add inotify_rm_watch and tee syscallsRichard Henderson2018-06-111-2/+2
| | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180607184844.30126-5-richard.henderson@linaro.org>
* linux-user/microblaze: Fix typo in accept4 syscallRichard Henderson2018-06-111-1/+1
| | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180607184844.30126-4-richard.henderson@linaro.org> [lv: replace tabs by spaces] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/hppa: Fix typo in mknodat syscallRichard Henderson2018-06-111-1/+1
| | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180607184844.30126-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/alpha: Fix epoll syscallsRichard Henderson2018-06-112-12/+3Star
| | | | | | | | | | These were named incorrectly, going so far as to invade strace.list. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180607184844.30126-2-richard.henderson@linaro.org> [lv: replace tabs by spaces] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Use is_error() to avoid warnings and make the code clearerPhilippe Mathieu-Daudé2018-06-111-6/+9
| | | | | | | | | | | | | | This fixes: linux-user/flatload.c:740:9: warning: Loss of sign in implicit conversion if (res > (unsigned long)-4096) ^~~ Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180604153722.24956-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Export use is_error(), use it to avoid warningsPhilippe Mathieu-Daudé2018-06-112-5/+5
| | | | | | | | | | | | | | This fixes: linux-user/flatload.c:740:9: warning: Loss of sign in implicit conversion if (res > (unsigned long)-4096) ^~~ Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180604153722.24956-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: remove useless #ifLaurent Vivier2018-06-041-10/+0Star
| | | | | | | | Remove a "#if defined(XX) || defined(YY) || ..." with all available targets Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-16-laurent@vivier.eu>
* linux-user: move hppa signal definitions to hppa/target_signal.hLaurent Vivier2018-06-042-52/+46Star
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-15-laurent@vivier.eu>
* linux-user: move alpha signal definitions to alpha/target_signal.hLaurent Vivier2018-06-042-49/+47Star
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-14-laurent@vivier.eu>
* linux-user: move openrisc signal definitions to openrisc/target_signal.hLaurent Vivier2018-06-042-9/+9
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-13-laurent@vivier.eu>
* linux-user: move mips signal definitions to mips/target_signal.hLaurent Vivier2018-06-043-55/+100
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-12-laurent@vivier.eu>
* linux-user: move sparc signal definitions to sparc/target_signal.hLaurent Vivier2018-06-044-75/+50Star
| | | | | | | Remove sparc64/target_signal.h, use sparc/target_signal.h instead. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-11-laurent@vivier.eu>
* linux-user: move generic signal definitions to generic/signal.hLaurent Vivier2018-06-0417-50/+87
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-10-laurent@vivier.eu>
* linux-user: move get_sp_from_cpustate() to target_cpu.hLaurent Vivier2018-06-0460-177/+83Star
| | | | | | | | | Remove useless includes Fix HPPA include guard. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-9-laurent@vivier.eu>
* linux-user: move sparc/sparc64 fcntl definitions to sparc/target_fcntl.hLaurent Vivier2018-06-042-39/+34Star
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-8-laurent@vivier.eu>
* linux-user: move ppc fcntl definitions to ppc/target_fcntl.hLaurent Vivier2018-06-042-6/+7
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-7-laurent@vivier.eu>
* linux-user: move mips/mips64 fcntl definitions to mips/target_fcntl.hLaurent Vivier2018-06-042-29/+29
| | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-6-laurent@vivier.eu>
* linux-user: move arm/aarch64/m68k fcntl definitions to ↵Laurent Vivier2018-06-044-6/+18
| | | | | | | | | | [arm|aarch64|m68k]/target_fcntl.h No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-5-laurent@vivier.eu>
* linux-user: move hppa fcntl definitions to hppa/target_fcntl.hLaurent Vivier2018-06-042-33/+32Star
| | | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-4-laurent@vivier.eu>
* linux-user: move alpha fcntl definitions to alpha/target_fcntl.hLaurent Vivier2018-06-042-30/+31
| | | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-3-laurent@vivier.eu>
* linux-user: move generic fcntl definitions to generic/fcntl.hLaurent Vivier2018-06-0423-128/+363
| | | | | | | | | add a per target target_fcntl.h and include the generic one from them No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-2-laurent@vivier.eu>
* syscall: replace strcpy() by g_strlcpy()Philippe Mathieu-Daudé2018-06-041-1/+2
| | | | | | | | | | | | linux-user/syscall.c:9860:17: warning: Call to function 'strcpy' is insecure as it does not provide bounding of the memory buffer. Replace unbounded copy functions with analogous functions that support length arguments such as 'strlcpy'. CWE-119 strcpy (buf->machine, cpu_to_uname_machine(cpu_env)); ^~~~~~ Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20170724182751.18261-32-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target-microblaze: Make special registers 64-bitEdgar E. Iglesias2018-05-291-2/+2
| | | | | | | | Extend special registers to 64-bits. This is in preparation for MFSE/MTSE, moves to and from extended special registers. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* linux-user: define TARGET_SO_REUSEPORTLaurent Vivier2018-05-253-5/+2Star
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180519092956.15134-9-laurent@vivier.eu>
* linux-user: copy sparc/sockbits.h definitions from linuxLaurent Vivier2018-05-251-39/+92
| | | | | | | | | | Values defined for sparc are not correct. Copy the content of "arch/sparc/include/uapi/asm/socket.h" to fix them. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-8-laurent@vivier.eu>
* linux-user: update ARCH_HAS_SOCKET_TYPES useLaurent Vivier2018-05-255-132/+44Star
| | | | | | | | to be like in the kernel and rename it TARGET_ARCH_HAS_SOCKET_TYPES Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-7-laurent@vivier.eu>
* linux-user: move ppc socket.h definitions to ppc/sockbits.hLaurent Vivier2018-05-252-9/+25
| | | | | | | | | Change conditional #ifdef part by #undef of the symbols redefined for PPC relative to generic/socket.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-6-laurent@vivier.eu>
* linux-user: move socket.h generic definitions to generic/sockbits.hLaurent Vivier2018-05-2517-61/+82
| | | | | | | | and include the file from architectures without specific definitions Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-5-laurent@vivier.eu>
* linux-user: move sparc/sparc64 socket.h definitions to sparc/sockbits.hLaurent Vivier2018-05-253-42/+97
| | | | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180519092956.15134-4-laurent@vivier.eu>
* linux-user: move alpha socket.h definitions to alpha/sockbits.hLaurent Vivier2018-05-252-105/+114
| | | | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180519092956.15134-3-laurent@vivier.eu>
* linux-user: move mips socket.h definitions to mips/sockbits.hLaurent Vivier2018-05-253-104/+113
| | | | | | | | | No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180519092956.15134-2-laurent@vivier.eu>
* linux-user: Fix payload size logic in host_to_target_cmsg()Peter Maydell2018-05-251-1/+2
| | | | | | | | | | | | | | | | | | | | Coverity points out that there's a missing break in the switch in host_to_target_cmsg() where we update tgt_len for cmsg_level/cmsg_type combinations which require a different length for host and target (CID 1385425). To avoid duplicating the default case (target length same as host) in both switches, set that before the switch so that only the cases which want to override it need any code. This fixes a bug where we would have used the wrong length for SOL_SOCKET/SO_TIMESTAMP messages where the target and host have differently sized 'struct timeval' (ie one is 32 bit and the other is 64 bit). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180518184715.29833-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: update comments to point to tcg_exec_init()Igor Mammedov2018-05-251-3/+2Star
| | | | | | | | | | | | | cpu_init() was replaced by cpu_create() since 2.12 but comments weren't updated. So update stale comments to point that page sizes arei actually initialized by tcg_exec_init(). Also move another qemu_host_page_size related comment before tcg_exec_init() where it belongs. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1526557877-293151-1-git-send-email-imammedo@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: update netlink emulationLaurent Vivier2018-05-251-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | Update enums with entries from linux 4.17 Translate entries that generate logs with iproute2 4.9.0 and host kernel 4.15: # ip address show Unknown host QEMU_IFLA type: 43 Unknown host QEMU_IFLA type: 43 Unknown host QEMU_IFLA type: 43 Unknown QEMU_IFLA_BR type 41 Unknown QEMU_IFLA_BR type 42 Unknown QEMU_IFLA_BR type 43 Unknown QEMU_IFLA_BR type 44 Unknown host QEMU_IFLA type: 43 Unknown QEMU_IFLA_BR type 41 Unknown QEMU_IFLA_BR type 42 Unknown QEMU_IFLA_BR type 43 Unknown QEMU_IFLA_BR type 44 Unknown host QEMU_IFLA type: 43 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180516221213.11111-1-laurent@vivier.eu>
* Merge remote-tracking branch ↵Peter Maydell2018-05-157-33/+326
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/linux-user-for-2.13-pull-request' into staging # gpg: Signature made Mon 14 May 2018 19:15:02 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-2.13-pull-request: linux-user: correctly align types in thunking code linux-user: fix UNAME_MACHINE for sparc/sparc64 linux-user: add sparc/sparc64 specific errno linux-user: fix conversion of flock/flock64 l_type field linux-user: update sparc/syscall_nr.h to linux header 4.16 linux-user: fix flock/flock64 padding linux-user: define correct fcntl() values for sparc Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user: fix UNAME_MACHINE for sparc/sparc64Laurent Vivier2018-05-112-2/+2
| | | | | | | | | | | | | | | | | | | | "sun4" is not recognized by config.guess. linux defines sparc and sparc64 in arch/sparc/Makefile. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-7-laurent@vivier.eu>
| * linux-user: add sparc/sparc64 specific errnoLaurent Vivier2018-05-113-1/+211
| | | | | | | | | | | | | | | | Copied from linux/arch/sparc/include/uapi/asm/errno.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-6-laurent@vivier.eu>
| * linux-user: fix conversion of flock/flock64 l_type fieldLaurent Vivier2018-05-111-18/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | As l_type values (F_RDLCK, F_WRLCK, F_UNLCK, F_EXLCK, F_SHLCK) are not bitmasks, we can't use target_to_host_bitmask() and host_to_target_bitmask() to convert them. Introduce target_to_host_flock() and host_to_target_flock() to convert values between host and target. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-5-laurent@vivier.eu>
| * linux-user: update sparc/syscall_nr.h to linux header 4.16Laurent Vivier2018-05-112-9/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | And kill sys_aplib, add sys_sync_file_range: on sparc, since linux 2.6.17, aplib syscall has been replaced by sync_file_range syscall. (289eee6fa78e ["SPARC]: Wire up sys_sync_file_range() into syscall tables.") The syscall has been removed in linux v2.5.71 (6196166fad "[SPARC64]: Kill sys_aplib.") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-4-laurent@vivier.eu>
| * linux-user: fix flock/flock64 paddingLaurent Vivier2018-05-111-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | include/uapi/asm-generic/fcntl.h insert a padding macro at the end of the structures flock and flock64. This macro is defined to "short __unused;" on sparc, and "long pad[4]" on mips. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-3-laurent@vivier.eu>
| * linux-user: define correct fcntl() values for sparcLaurent Vivier2018-05-111-0/+9
| | | | | | | | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180509231123.20864-2-laurent@vivier.eu>
* | target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decodeRichard Henderson2018-05-101-0/+1
|/ | | | | | | | | | | | | The insns in the ARMv8.1-Atomics are added to the existing load/store exclusive and load/store reg opcode spaces. Rearrange the top-level decoders for these to accomodate. The Atomics insns themselves still generate Unallocated. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180508151437.4232-8-richard.henderson@linaro.org [PMM: Drop the ARM_FEATURE_V8_1 feature flag] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: remove useless padding in flock64 structureLaurent Vivier2018-05-033-28/+18Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 8efb2ed5ec ("linux-user: Correct signedness of target_flock l_start and l_len fields"), flock64 structure uses abi_llong for l_start and l_len in place of "unsigned long long" this should force them to be aligned accordingly to the target rules. So we can remove the padding field and the QEMU_PACKED attribute. I have compared the result of the following program before and after the change: cat -> flock64_dump <<EOF p/d sizeof(struct target_flock64) p/d &((struct target_flock64 *)0)->l_type p/d &((struct target_flock64 *)0)->l_whence p/d &((struct target_flock64 *)0)->l_start p/d &((struct target_flock64 *)0)->l_len p/d &((struct target_flock64 *)0)->l_pid quit EOF for file in build/all/*-linux-user/qemu-* ; do echo $file gdb -batch -nx -x flock64_dump $file 2> /dev/null done The sizeof() changes because we remove the QEMU_PACKED. The new size is 32 (except for i386 and m68k) and this is the real size of "struct flock64" on the target architecture. The following architectures differ: aarch64_be, aarch64, alpha, armeb, arm, cris, hppa, nios2, or1k, riscv32, riscv64, s390x. For a subset of these architectures, I have checked with the following program the new structure is the correct one: #include <stdio.h> #define __USE_LARGEFILE64 #include <fcntl.h> int main(void) { printf("struct flock64 %d\n", sizeof(struct flock64)); printf("l_type %d\n", &((struct flock64 *)0)->l_type); printf("l_whence %d\n", &((struct flock64 *)0)->l_whence); printf("l_start %d\n", &((struct flock64 *)0)->l_start); printf("l_len %d\n", &((struct flock64 *)0)->l_len); printf("l_pid %d\n", &((struct flock64 *)0)->l_pid); } [I have checked aarch64, alpha, hppa, s390x] For ARM, the target_flock64 becomes the EABI definition, so we need to define the OABI one in place of the EABI one and use it when it is needed. I have also fixed the alignment value for sh4 (to align llong on 4 bytes) (see c2e3dee6e0 "linux-user: Define target alignment size") [We should check alignment properties for cris, nios2 and or1k] Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180502215730.28162-1-laurent@vivier.eu>
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