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* riscv: Add semihosting supportKeith Packard2021-01-182-5/+7
| | | | | | | | | | | | | | Adapt the arm semihosting support code for RISCV. This implementation is based on the standard for RISC-V semihosting version 0.2 as documented in https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2 Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-6-keithp@keithp.com> Message-Id: <20210108224256.2321-17-alex.bennee@linaro.org>
* semihosting: Change common-semi API to be architecture-independentKeith Packard2021-01-182-2/+4
| | | | | | | | | | | | | | The public API is now defined in hw/semihosting/common-semi.h. do_common_semihosting takes CPUState * instead of CPUARMState *. All internal functions have been renamed common_semi_ instead of arm_semi_ or arm_. Aside from the API change, there are no functional changes in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-3-keithp@keithp.com> Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
* semihosting: Move ARM semihosting code to shared directoriesKeith Packard2021-01-183-3/+1Star
| | | | | | | | | | | | | | | | | | | | | This commit renames two files which provide ARM semihosting support so that they can be shared by other architectures: 1. target/arm/arm-semi.c -> hw/semihosting/common-semi.c 2. linux-user/arm/semihost.c -> linux-user/semihost.c The build system was modified use a new config variable, CONFIG_ARM_COMPATIBLE_SEMIHOSTING, which has been added to the ARM softmmu and linux-user default configs. The contents of the source files has not been changed in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> [AJB: rename arm-compat-semi, select SEMIHOSTING] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210107170717.2098982-2-keithp@keithp.com> Message-Id: <20210108224256.2321-13-alex.bennee@linaro.org>
* gdbstub: drop CPUEnv from gdb_exit()Alex Bennée2021-01-181-1/+1
| | | | | | | | | | | gdb_exit() has never needed anything from env and I doubt we are going to start now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210108224256.2321-8-alex.bennee@linaro.org>
* target/mips: Extract FPU helpers to 'fpu_helper.h'Philippe Mathieu-Daudé2021-01-141-0/+1
| | | | | | | | Extract FPU specific helpers from "internal.h" to "fpu_helper.h". Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201120210844.2625602-2-f4bug@amsat.org>
* target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6Philippe Mathieu-Daudé2021-01-141-1/+1
| | | | | | | | | | | The MIPS ISA release 6 is common to 32/64-bit CPUs. To avoid holes in the insn_flags type, update the definition with the next available bit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-16-f4bug@amsat.org>
* target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2Philippe Mathieu-Daudé2021-01-141-1/+1
| | | | | | | | The MIPS ISA release 2 is common to 32/64-bit CPUs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
* target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6Philippe Mathieu-Daudé2021-01-141-2/+1Star
| | | | | | | | | | | | Use the single ISA_MIPS32R6 definition to check if the Release 6 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R6 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-11-f4bug@amsat.org>
* target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2Philippe Mathieu-Daudé2021-01-141-1/+0Star
| | | | | | | | | | | | Use the single ISA_MIPS32R2 definition to check if the Release 2 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R2 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-8-f4bug@amsat.org>
* tcg: Add --accel tcg,split-wx propertyRichard Henderson2021-01-071-1/+1
| | | | | | | | | Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error. Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Conditionalize TUNSETVNETLERichard Henderson2021-01-071-0/+2
| | | | | | | | | This fixes the build for older ppc64 kernel headers. Fixes: 6addf06a3c4 Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/sparc: Handle tstate in sparc64_get/set_context()Peter Maydell2020-12-181-4/+3Star
| | | | | | | | | | | | | | | | | | Correctly implement save/restore of the tstate field in sparc64_get_context() and sparc64_set_context(): * Don't use the CWP value from the guest in set_context * Construct and save a tstate value rather than leaving it as zero in get_context To do this we factor out the "calculate TSTATE value from CPU state" code from sparc_cpu_do_interrupt() into its own sparc64_tstate() function; that in turn requires us to move some of the function prototypes out from inside a CPU_NO_IO_DEFS ifdef guard. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201106152738.26026-5-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/sparc: Don't restore %g7 in sparc64_set_context()Peter Maydell2020-12-181-1/+1
| | | | | | | | | | The kernel does not restore the g7 register in sparc64_set_context(); neither should we. (We still save it in sparc64_get_context().) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201106152738.26026-4-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/sparc: Remove unneeded checks of 'err' from sparc64_get_context()Peter Maydell2020-12-181-4/+0Star
| | | | | | | | | | | | | | | Unlike the kernel macros, our __get_user() and __put_user() do not return a failure code. Kernel code typically has a style of err |= __get_user(...); err |= __get_user(...); and then checking err at the end. In sparc64_get_context() our version of the code dropped the accumulating into err but left the "if (err) goto do_sigsegv" checks, which will never be taken. Delete unnecessary if()s. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201106152738.26026-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/sparc: Correct sparc64_get/set_context() FPU handlingPeter Maydell2020-12-181-31/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The handling of the FPU state in sparc64_get_context() and sparc64_set_context() is not the same as what the kernel actually does: we unconditionally read and write the FP registers and the FSR, GSR and FPRS, but the kernel logic is more complicated: * in get_context the kernel has code for saving FPU registers, but it is hidden inside an "if (fenab) condition and the fenab flag is always set to 0 (inside an "#if 1" which has been in the kernel for over 15 years). So the effect is that the FPU state part is always written as zeroes. * in set_context the kernel looks at the fenab field in the structure from the guest, and only restores the state if it is set; it also looks at the structure's FPRS to see whether either the upper or lower or both halves of the register file have valid data. Bring our implementations into line with the kernel: * in get_context: - clear the entire target_ucontext at the top of the function (as the kernel does) - then don't write the FPU state, so those fields remain zero - this fixes Coverity issue CID 1432305 by deleting the code it was complaining about * in set_context: - check the fenab and the fpsr to decide which parts of the FPU data to restore, if any - instead of setting the FPU registers by doing two 32-bit loads and filling in the .upper and .lower parts of the CPU_Double union separately, just do a 64-bit load of the whole register at once. This fixes Coverity issue CID 1432303 because we now access the dregs[] part of the mcfpu_fregs union rather than the sregs[] part (which is not large enough to actually cover the whole of the data, so we were accessing off the end of sregs[]) We change both functions in a single commit to avoid potentially breaking bisection. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201106152738.26026-2-peter.maydell@linaro.org> [lv: fix FPRS_DU loop s/31/32/] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add most IFTUN ioctlsShu-Chun Weng2020-12-183-0/+115
| | | | | | | | | | | | | The three options handling `struct sock_fprog` (TUNATTACHFILTER, TUNDETACHFILTER, and TUNGETFILTER) are not implemented. Linux kernel keeps a user space pointer in them which we cannot correctly handle. Signed-off-by: Josh Kunz <jkz@google.com> Signed-off-by: Shu-Chun Weng <scw@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200929014801.655524-1-scw@google.com> [lv: use 0 size in unlock_user()] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Implement copy_file_rangeAndreas Schwab2020-12-181-0/+42
| | | | | | | | Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <mvm361eer3n.fsf@suse.de> [lv: copy back offset only if there is no error] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Add support for MIPS Loongson 2F/3APhilippe Mathieu-Daudé2020-12-171-0/+2
| | | | | | | | | | | | | | | Userland ELF binaries using Loongson SIMD instructions have the HWCAP_LOONGSON_MMI bit set [1]. Binaries compiled for Loongson 3A [2] have the HWCAP_LOONGSON_EXT bit set for the LQ / SQ instructions. [1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags") [2] commit af868995e1b ("target/mips: Add Loongson-3 CPU definition") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-7-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Update HWCAP bits from linux 5.7Philippe Mathieu-Daudé2020-12-171-0/+13
| | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-6-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macroPhilippe Mathieu-Daudé2020-12-171-1/+11
| | | | | | | | | | | | | | | ISA features are usually denoted in read-only bits from CPU registers. Add the GET_FEATURE_REG_EQU() macro which checks if a CPU register has bits set to a specific value. Use the macro to check the 'Architecture Revision' level of the Config0 register, which is '2' when the Release 6 ISA is implemented. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-5-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macroPhilippe Mathieu-Daudé2020-12-171-1/+5
| | | | | | | | | | | | | | ISA features are usually denoted in read-only bits from CPU registers. Add the GET_FEATURE_REG_SET() macro which checks if a CPU register has bits set. Use the macro to check for MSA (which sets the MSAP bit of the Config3 register when the ASE implementation is present). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()Philippe Mathieu-Daudé2020-12-171-4/+4
| | | | | | | | | | | We want to add macros similar to GET_FEATURE(). As this one use the 'insn_flags' field, rename it GET_FEATURE_INSN(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() bodyPhilippe Mathieu-Daudé2020-12-171-5/+5
| | | | | | | | | As we are going to add more macros, keep the function body clear. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214003215.344522-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/mmap.c: check range of mremap result in target address spaceTobias Koch2020-12-171-9/+12
| | | | | | | | | | | | | | | | If mremap succeeds, an additional check is performed to ensure that the new address range fits into the target address space. This check was previously perfomed in host address space, with the upper bound fixed to abi_ulong. This patch replaces the static check with a call to `guest_range_valid`, performing the range check against the actual size of the target address space. It also moves the corresponding block to prevent it from being called incorrectly when the mapping itself fails. Signed-off-by: Tobias Koch <tobias.koch@nonterra.com> Message-Id: <20201028213833.26592-1-tobias.koch@nonterra.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: remove GNUC checkMarc-André Lureau2020-12-151-4/+0Star
| | | | | | | | | | QEMU requires Clang or GCC, that define and support __GNUC__ extensions. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201210134752.780923-13-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* plugin: propagate errorsPaolo Bonzini2020-12-151-3/+1Star
| | | | | | | | | | | | qemu_finish_machine_init currently can only exit QEMU if it fails. Prepare for giving it proper error propagation, and possibly for adding a plugin_add monitor command that calls an accelerator method. While at it, make all errors from plugin_load look the same. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* configure / meson: Move check for linux/btrfs.h to meson.buildThomas Huth2020-12-132-2/+2
| | | | | | | | | | | | This check can be done in a much shorter way in meson.build. And while we're at it, rename the #define to HAVE_BTRFS_H to match the other HAVE_someheader_H symbols that we already have. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201118171052.308191-7-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* configure / meson: Move check for sys/kcov.h to meson.buildThomas Huth2020-12-132-2/+2
| | | | | | | | | | | | | This check can be done in a much shorter way in meson.build. And while we're at it, rename the #define to HAVE_SYS_KCOV_H to match the other HAVE_someheader_H symbols that we already have. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201118171052.308191-6-thuth@redhat.com> [lv: s/signal/kcov/] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpointsPeter Maydell2020-11-231-0/+28
| | | | | | | | | | | | | | | | | | | The Linux kernel doesn't use the official bkpt insn for breakpoints; instead it uses three instructions in the guaranteed-to-UNDEF space, and generates SIGTRAP for these rather than the SIGILL that most UNDEF insns generate: https://elixir.bootlin.com/linux/v5.9.8/source/arch/arm/kernel/ptrace.c#L197 Make QEMU treat these insns specially too. The main benefit of this is that if you're running a debugger on a guest program that runs into a GCC __builtin_trap() or LLVM "trap because execution should never reach here" then you'll get the expected signal rather than a SIGILL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201117155634.6924-1-peter.maydell@linaro.org
* linux-user,netlink: add IFLA_BRPORT_MRP_RING_OPEN, IFLA_BRPORT_MRP_IN_OPENLaurent Vivier2020-11-171-0/+11
| | | | | | | | | | | | | | Fix "-d unimp" trace results: Unknown QEMU_IFLA_BRPORT type 35 Unknown QEMU_IFLA_BRPORT type 36 Also process IFLA_EXT_MASK to fix: Unknown target QEMU_IFLA type: 29 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201117111905.843925-1-laurent@vivier.eu>
* linux-user,netlink: fix message translation with ip commandLaurent Vivier2020-11-171-4/+3Star
| | | | | | | | | | | | | | | | | | | | With iproute2-5.8.0, the route, link and addr show commands fail: root@sid:~# ip addr show RTNETLINK answers: Unknown error 352321537 Dump terminated root@sid:~# ip link show RTNETLINK answers: Unknown error 352321537 Dump terminated root@sid:~# ip route show RTNETLINK answers: Unknown error 352321537 Dump terminated This patch correctly decodes the GETROUTE and GETLINK commands and adds the RTA_TABLE message. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201116163622.791442-1-laurent@vivier.eu>
* linux user: Fix Lesser GPL version numberChetan Pant2020-11-1529-29/+29
| | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023122455.19417-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2020-11-1116-49/+56
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/linux-user-for-5.2-pull-request' into staging Fixes for epoll_ctl and stack_t # gpg: Signature made Wed 11 Nov 2020 21:40:16 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.2-pull-request: linux-user: Prevent crash in epoll_ctl linux-user: Correct definition of stack_t Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user: Prevent crash in epoll_ctlLemonBoy2020-11-111-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From 894bb5172705e46a3a04c93b4962c0f0cafee814 Mon Sep 17 00:00:00 2001 From: Giuseppe Musacchio <thatlemon@gmail.com> Date: Fri, 17 Apr 2020 17:25:07 +0200 Subject: [PATCH] linux-user: Prevent crash in epoll_ctl The `event` parameter is ignored by the kernel if `op` is EPOLL_CTL_DEL, do the same and avoid returning EFAULT if garbage is passed instead of a valid pointer. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <a244fa67-dace-abdb-995a-3198bd80fee8@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Correct definition of stack_tLemonBoy2020-11-1115-40/+39Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms used the wrong definition of stack_t where the flags and size fields were swapped or where the flags field had type ulong instead of int. Due to the presence of padding space in the structure and the prevalence of little-endian machines this problem went unnoticed for a long time. The type definitions have been cross-checked with the ones defined in the Linux kernel v5.9, plus some older versions for a few architecture that have been removed and Xilinx's kernel fork for NiosII [1]. The bsd-user headers remain unchanged as I don't know if they are wrong or not. [1] https://github.com/Xilinx/linux-xlnx/blob/master/arch/nios2/include/uapi/asm/signal.h Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <e9d47692-ee92-009f-6007-0abc3f502b97@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | trace: remove argument from trace_init_filePaolo Bonzini2020-11-111-4/+2Star
|/ | | | | | | | | | It is not needed, all the callers are just saving what was retrieved from -trace and trace_init_file can retrieve it on its own. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20201102115841.4017692-1-pbonzini@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* linux-user/sparc: Don't zero high half of PC, NPC, PSR in sigreturnPeter Maydell2020-11-101-1/+1
| | | | | | | | | | | | | | | | | | | | The function do_sigreturn() tries to store the PC, NPC and PSR in uint32_t local variables, which implicitly drops the high half of these fields for 64-bit guests. The usual effect was that a guest which used signals would crash on return from a signal unless it was lucky enough to take it while the PC was in the low 4GB of the address space. In particular, Debian /bin/dash and /bin/bash would segfault after executing external commands. Use abi_ulong, which is the type these fields all have in the __siginfo_t struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201105212314.9628-4-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/sparc: Correct set/get_context handling of fp and i7Peter Maydell2020-11-101-25/+22Star
| | | | | | | | | | | | | | | | | | | | | | | | | Because QEMU's user-mode emulation just directly accesses guest CPU state, for SPARC the guest register window state is not the same in the sparc64_get_context() and sparc64_set_context() functions as it is for the real kernel's versions of those functions. Specifically, for the kernel it has saved the user space state such that the O* registers go into a pt_regs struct as UREG_I*, and the I* registers have been spilled onto the userspace stack. For QEMU, we haven't done that, so the guest's O* registers are still in WREG_O* and the I* registers in WREG_I*. The code was already accessing the O* registers correctly for QEMU, but had copied the kernel code for accessing the I* registers off the userspace stack. Replace this with direct accesses to fp and i7 in the CPU state, and add a comment explaining why we differ from the kernel code here. This fix is sufficient to get bash to a shell prompt. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201105212314.9628-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/sparc: Fix errors in target_ucontext structuresPeter Maydell2020-11-101-4/+9
| | | | | | | | | | | | | | | | | | | | | | The various structs that make up the SPARC target_ucontext had some errors: * target structures must not include fields which are host pointers, which might be the wrong size. These should be abi_ulong instead * because we don't have the 'long double' part of the mcfpu_fregs union in our version of the target_mc_fpu struct, we need to manually force it to be 16-aligned In particular, the lack of 16-alignment caused sparc64_get_context() and sparc64_set_context() to read and write all the registers at the wrong offset, which triggered a guest glibc stack check in siglongjmp: *** longjmp causes uninitialized stack frame ***: terminated when trying to run bash. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201105212314.9628-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Check copy_from_user() return value in vma_dump_size()Peter Maydell2020-11-041-1/+3
| | | | | | | | | | | | | | Coverity points out that we don't check the return value from copy_from_user() in vma_dump_size(). This is to some extent a "can't happen" error since we've already checked the page with an access_ok() call earlier, but it's simple enough to handle the error anyway. Fixes: Coverity CID 1432362 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201103141532.19912-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/syscall: Fix missing target_to_host_timespec64() checkAlistair Francis2020-11-041-1/+3
| | | | | | | | | | | Coverity pointed out (CID 1432339) that target_to_host_timespec64() can fail with -TARGET_EFAULT but we never check the return value. This patch checks the return value and handles the error. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <cad74fae734d2562746b94acd9c34b00081c89bf.1604432881.git.alistair.francis@wdc.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user: Use "!= 0" when checking if MAP_FIXED_NOREPLACE is non-zeroPeter Maydell2020-11-041-1/+2
| | | | | | | | | | | | | | | | | | | In pgd_find_hole_fallback(), Coverity doesn't like the use of "if (MAP_FIXED_NOREPLACE || ...)" because it's using a logical operator on a constant other than 0 or 1 and its heuristic thinks we might have intended a bitwise operator instead. The logic is correct (we are checking whether the host really has a MAP_FIXED_NOREPLACE or whether we fell back to the "#define as 0 to ignore" from osdep.h); make Coverity happier by explicitly writing out the comparison with zero. Fixes: Coverity CID 1431059 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201103142636.21125-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/mips/cpu_loop: silence the compiler warningsChen Qun2020-11-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: linux-user/mips/cpu_loop.c: In function ‘cpu_loop’: linux-user/mips/cpu_loop.c:104:24: warning: this statement may fall through [-Wimplicit-fallthrough=] 104 | if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) { | ^ linux-user/mips/cpu_loop.c:107:17: note: here 107 | case 7: | ^~~~ linux-user/mips/cpu_loop.c:108:24: warning: this statement may fall through [-Wimplicit-fallthrough=] 108 | if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) { | ^ linux-user/mips/cpu_loop.c:111:17: note: here 111 | case 6: | ^~~~ linux-user/mips/cpu_loop.c:112:24: warning: this statement may fall through [-Wimplicit-fallthrough=] 112 | if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) { | ^ linux-user/mips/cpu_loop.c:115:17: note: here 115 | case 5: | ^~~~ Add the corresponding "fall through" comment to fix it. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201030004046.2191790-5-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* Merge remote-tracking branch ↵Peter Maydell2020-10-295-58/+302
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging target-arm queue: * raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer # gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits) hw/timer/armv7m_systick: Rewrite to use ptimers hw/core/ptimer: Support ptimer being disabled by timer callback hw/arm/sbsa-ref: add SBSA watchdog device hw/watchdog: Implement SBSA watchdog device hw/arm/bcm2835_peripherals: connect the UART clock hw/char/pl011: add a clock input hw/misc/bcm2835_cprman: add sane reset values to the registers hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer hw/misc/bcm2835_cprman: implement clock mux behaviour hw/misc/bcm2835_cprman: add a clock mux skeleton implementation hw/misc/bcm2835_cprman: implement PLL channels behaviour hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation hw/misc/bcm2835_cprman: implement PLLs behaviour hw/misc/bcm2835_cprman: add a PLL skeleton implementation hw/arm/raspi: add a skeleton implementation of the CPRMAN hw/arm/raspi: fix CPRMAN base address hw/core/clock: trace clock values in Hz instead of ns hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro arm/trace: Fix hex printing hw/arm/raspi: Add the Raspberry Pi 3 model A+ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Parse GNU_PROPERTY_AARCH64_FEATURE_1_ANDRichard Henderson2020-10-271-2/+46
| | | | | | | | | | | | | | | | | | Use the new generic support for NT_GNU_PROPERTY_TYPE_0. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-12-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Parse NT_GNU_PROPERTY_TYPE_0 notesRichard Henderson2020-10-272-0/+161
| | | | | | | | | | | | | | | | | | This is generic support, with the code disabled for all targets. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-11-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Use Error for load_elf_interpRichard Henderson2020-10-271-7/+8
| | | | | | | | | | | | | | | | | | | | | | This is slightly clearer than just using strerror, though the different forms produced by error_setg_file_open and error_setg_errno isn't entirely convenient. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-10-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Use Error for load_elf_imageRichard Henderson2020-10-271-17/+20
| | | | | | | | | | | | | | | | | | | | This is a bit clearer than open-coding some of this with a bare c string. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-9-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Move PT_INTERP detection to first loopRichard Henderson2020-10-271-29/+31
| | | | | | | | | | | | | | | | | | | | For BTI, we need to know if the executable is static or dynamic, which means looking for PT_INTERP earlier. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user/elfload: Adjust iteration over phdrRichard Henderson2020-10-271-4/+5
| | | | | | | | | | | | | | | | | | | | | | The second loop uses a loop induction variable, and the first does not. Transform the first to match the second, to simplify a following patch moving code between them. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-7-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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