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* Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl2012-09-151-45/+27Star
| | | | | | | | | | | | | Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets, remove dead code and support for !CONFIG_TCG_PASS_AREG0 case. Remove dyngen-exec.h and all references to it. Although included by hw/spapr_hcall.c, it does not seem to use it. Remove unused HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* w64: Fix data types in softmmu*.hStefan Weil2012-04-151-10/+12
| | | | | | w64 requires uintptr_t. Signed-off-by: Stefan Weil <sw@weilnetz.de>
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-10/+10
| | | | | | | | | Use uintptr_t instead of void * or unsigned long in several op related functions, env->mem_io_pc and GETPC() macro. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl2012-03-181-27/+57
| | | | | | | | | | | Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: Remove REGPARMBlue Swirl2012-03-181-5/+3Star
| | | | | | | Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* memory: dispatch directly via MemoryRegionAvi Kivity2012-03-081-24/+24
| | | | | | | Instead of indirecting via io_mem_region, dispatch directly through the MemoryRegion obtained from the iotlb or phys_page_find(). Signed-off-by: Avi Kivity <avi@redhat.com>
* memory: store section indices in iotlb instead of io indicesAvi Kivity2012-03-081-4/+4
| | | | | | A step towards eliminating io indices. Signed-off-by: Avi Kivity <avi@redhat.com>
* Remove IO_MEM_SHIFTAvi Kivity2012-01-041-2/+2
| | | | | | | | | We no longer use any of the lower bits of a ram_addr, so we might as well use them for the io table index. This increases the number of potential I/O handlers by a factor of 8. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* Convert IO_MEM_{RAM,ROM,UNASSIGNED,NOTDIRTY} to MemoryRegionsAvi Kivity2012-01-041-4/+7
| | | | | | | | | | Convert the fixed-address IO_MEM_RAM, IO_MEM_ROM, IO_MEM_UNASSIGNED, and IO_MEM_NOTDIRTY io handlers to MemoryRegions. These aren't real regions, since they are never added to the memory hierarchy, but they allow reuse of the dispatch functionality. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* Avoid range comparisons on io index typesAvi Kivity2012-01-041-2/+4
| | | | | | | | The code sometimes uses range comparisons on io indexes (e.g. index =< IO_MEM_ROM). Avoid these as they make moving to objects harder. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* memory: move mmio access to functionsAvi Kivity2012-01-041-10/+10
| | | | | | | | Currently mmio access goes directly to the io_mem_{read,write} arrays. In preparation for eliminating them, add indirection via a function. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* softmmu_header: pass CPUState to tlb_fillBlue Swirl2011-10-011-4/+4
| | | | | | | Pass CPUState pointer to tlb_fill() instead of architecture local cpu_single_env hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Document softmmu templatesBlue Swirl2011-10-011-0/+5
| | | | | | Add some comments to describe each file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Split TLB addend and target_phys_addr_tPaul Brook2010-04-051-12/+16
| | | | | | | | | | | | | | Historically the qemu tlb "addend" field was used for both RAM and IO accesses, so needed to be able to hold both host addresses (unsigned long) and guest physical addresses (target_phys_addr_t). However since the introduction of the iotlb field it has only been used for RAM accesses. This means we can change the type of addend to unsigned long, and remove associated hacks in the big-endian TCG backends. We can also remove the host dependence from target_phys_addr_t. Signed-off-by: Paul Brook <paul@codesourcery.com>
* Compile qemu-timer only onceBlue Swirl2010-03-291-0/+2
| | | | | | | | | Arrange various declarations so that also non-CPU code can access them, adjust users. Move CPU specific code to cpus.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softmmu: Dont clobber retaddr in slow_ldx().Edgar E. Iglesias2010-01-281-1/+0Star
| | | | | | | | | | When splitting up unaligned IO accesses, ld calls slow_ld which was clobbering retaddr. AFAIK the problem only shows up when running emulations with -icount that may abort TB execution on IO accesses. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-6/+6
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-6/+6
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* Unbreak large mem support by removing kqemuAnthony Liguori2009-08-241-6/+0Star
| | | | | | | | | | | | | | | | | | | | | | kqemu introduces a number of restrictions on the i386 target. The worst is that it prevents large memory from working in the default build. Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on the TSC as a time source which will not be reliable on a multiple processor system in userspace. Since most modern processors are multicore, this severely limits the utility of kqemu. kvm is a viable alternative for people looking to accelerate qemu and has the benefit of being supported by the upstream Linux kernel. If someone can implement work arounds to remove the restrictions introduced by kqemu, I'm happy to avoid and/or revert this patch. N.B. kqemu will still function in the 0.11 series but this patch removes it from the 0.12 series. Paul, please Ack or Nack this patch. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1Star
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* kqemu: merge CONFIG_KQEMU and USE_KQEMUblueswir12009-04-191-2/+2
| | | | | | | | | | Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g". Signed-off-by: Paul Bolle <pebolle@tiscali.nl> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Set mem_io_vaddr on io_read (Jan Kiszka)aliguori2008-11-181-0/+1
| | | | | | | | | | | | Analogously to write accesses, we have to save the memory address also on read accesses in order to support read watchpoints. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5739 c046a42c-6fe2-441c-8c8c-71466251a162
* Add instruction counter.pbrook2008-06-291-5/+17
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up MMIO TLB handling.pbrook2008-06-091-21/+27
| | | | | | | | | | The IO index is now stored in its own field, instead of being wedged into the vaddr field. This eliminates the ROMD and watchpoint host pointer weirdness. The IO index space is expanded by 1 bit, and several additional bits are made available in the TLB vaddr field. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4704 c046a42c-6fe2-441c-8c8c-71466251a162
* use simpler REGPARM convention - make CPUTLBEntry size a power of twobellard2008-01-311-5/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3935 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't compare '\0' against pointers.balrog2007-11-171-0/+2
| | | | | | | Add a note from Fabrice in slow_st template. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3669 c046a42c-6fe2-441c-8c8c-71466251a162
* Check permissions for the last byte first in unaligned slow_st accesses ↵balrog2007-11-171-1/+1
| | | | | | (patch from TeLeMan). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3665 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-30/+30
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths2007-09-171-2/+2
| | | | | | the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-17/+17
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
* added last_io_time fieldbellard2006-02-081-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1752 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS unaligned accesses exceptions (Daniel Jacobowitz)bellard2005-12-051-1/+27
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1688 c046a42c-6fe2-441c-8c8c-71466251a162
* PAGE_EXEC support in TLBsbellard2005-11-281-8/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1676 c046a42c-6fe2-441c-8c8c-71466251a162
* use TARGET_PAGE_SIZE (Paul Brook)bellard2005-11-261-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1659 c046a42c-6fe2-441c-8c8c-71466251a162
* allow more than 32 bit of physical memorybellard2005-07-241-10/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1526 c046a42c-6fe2-441c-8c8c-71466251a162
* 64 bit target supportbellard2005-01-041-12/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
* removed access_type hackbellard2004-10-031-30/+40
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1095 c046a42c-6fe2-441c-8c8c-71466251a162
* support for opaque data on memory I/Osbellard2004-06-031-10/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@874 c046a42c-6fe2-441c-8c8c-71466251a162
* precise self modifying code supportbellard2004-04-251-8/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
* added generic physical memory dirty bit supportbellard2004-02-061-5/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@601 c046a42c-6fe2-441c-8c8c-71466251a162
* cast to return typebellard2004-01-181-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@556 c046a42c-6fe2-441c-8c8c-71466251a162
* soft mmu fix (aka debian random seg fault fix)bellard2003-11-091-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@443 c046a42c-6fe2-441c-8c8c-71466251a162
* full softmmu supportbellard2003-10-271-32/+50
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@410 c046a42c-6fe2-441c-8c8c-71466251a162
* pop ss, mov ss, x and sti disable irqs for the next instruction - began ↵bellard2003-08-211-4/+4
| | | | | | dispatch optimization by adding new x86 cpu 'hidden' flags git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162
* removed warningsbellard2003-08-111-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@360 c046a42c-6fe2-441c-8c8c-71466251a162
* Software MMU support (used for memory mapped devices such as VGA)bellard2003-08-091-0/+241
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@347 c046a42c-6fe2-441c-8c8c-71466251a162
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