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* target-alpha: Fix load-locked/store-conditional.Richard Henderson2010-04-271-76/+126
| | | | | | | | Use an exception plus start_exclusive to implement the compare-and-swap. This follows the example set by the MIPS and PPC ports. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Indicate NORETURN status when raising exception.Richard Henderson2010-04-271-11/+14
| | | | | | | | When (indirectly) calling raise_exception, don't emit cleanup code at the end of the TB, as it is unused. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Update commentary for opcode 0x1A.Richard Henderson2010-04-271-4/+7
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Emit goto_tb opcodes.Richard Henderson2010-04-271-145/+191
| | | | | | | | | Use an ExitStatus enumeration instead of magic numbers as the return value from translate_one. Emit goto_tb opcodes when ending a TB via a direct branch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement cvtlq inline.Richard Henderson2010-04-271-1/+22
| | | | | | | It's a simple shift and mask sequence. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement rs/rc properly.Richard Henderson2010-04-271-4/+15
| | | | | | | | | | | This is a per-cpu flag; there's no need for a spinlock of any kind. We were also failing to manipulate the flag with $31 as a target reg and failing to clear the flag on execution of a return-from-interrupt instruction. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement cpys{, n, e} inline.Richard Henderson2010-04-271-4/+75
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* alpha: remove dead assignments, spotted by clang analyzerBlue Swirl2010-04-251-7/+4Star
| | | | | | Value stored is never read. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Use non-inverted arguments to gen_{f}cmov.Richard Henderson2010-04-101-18/+19
| | | | | | | | | The inverted conditions as argument to the function looks wrong at a glance inside translate_one. Since we have an easy function to produce the inversion now, use it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Use setcond for int comparisons.Richard Henderson2010-04-101-21/+22
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement cvtql inline.Richard Henderson2010-04-101-6/+39
| | | | | | | | It's a simple mask and shift sequence. Also, fix a typo in the actual masks used. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* alpha-linux-user: Implement signals.Richard Henderson2010-02-281-1/+2
| | | | | | | | | | Move userland PALcode handling into linux-user main loop so that we can send signals from there. This also makes alpha_palcode.c system-level only, so don't build it for userland. Add defines for GENTRAP PALcall mapping to signals. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement IEEE FP qualifiers.Richard Henderson2010-02-281-88/+433
| | | | | | | | | | | | | | | | IEEE FP instructions are split up so that the rounding mode coming from the instruction and exceptions (both masking and delivery) are handled external to the base FP operation. FP exceptions are properly raised for non-finite inputs to instructions that do not indicate software completion. A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined at the top of translate.c: data is loaded and stored into FP_STATUS directly instead of using the functional interface defined by "softfloat.h". Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Reduce internal processor registers for user-mode.Richard Henderson2010-02-231-18/+27
| | | | | | | | | | | | The existing set of IPRs is totally irrelevant to user-mode emulation. Indeed, they most are irrelevant to implementing kernel-mode emulation, and would only be relevant to PAL-mode emulation, which I suspect that no one will ever attempt. Reducing the set of processor registers reduces the size of the CPU state. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Initialize fpcrRichard Henderson2009-12-231-0/+2
| | | | | | | Linux, at least, disables exceptions by default. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Emit tcg debug_insn_start.Richard Henderson2009-12-211-0/+5
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement fp branch/cmov inline.Richard Henderson2009-12-171-87/+110
| | | | | | | | | | | The old fcmov implementation had a typo: - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); which moved the condition, not the second source, to the destination. But it's also easy to implement the simplified fp comparison inline. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix double log_cpu_state.Richard Henderson2009-12-131-1/+0Star
| | | | | | | The proper logging is handled by generic code. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix FMOV.Richard Henderson2009-12-131-3/+7
| | | | | | | Properly handle move from the zero register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*h inline.Richard Henderson2009-12-131-6/+45
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*h inline.Richard Henderson2009-12-131-14/+49
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*l inline.Richard Henderson2009-12-131-8/+30
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*l inline.Richard Henderson2009-12-131-28/+59
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement RD/WRUNIQUE in the translatorRichard Henderson2009-12-131-10/+29
| | | | | | | | | When emulating user-mode only, there's no reason to exit the translation block to effect a call_pal. We can generate a move to/from the unique slot directly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix fbcond branch offset.Richard Henderson2009-12-131-5/+4Star
| | | | | | | | The instructions use a disp21 like all other branch insns, not the disp16 that was being passed. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Rewrite gen_ext_[hl] in terms of zapnot.Richard Henderson2009-12-131-32/+25Star
| | | | | | | | | The architecture manual specifies the EXT instructions in terms of the ZAPNOT operation; writing it that way in the translator makes things a bit clearer. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand zap/zapnot with immediate inline.Richard Henderson2009-12-131-2/+59
| | | | | | | | The vast majority of zap instructions have an immediate operand, since zapnot is the canonical method to zero-extend from u16 or u32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix -d in_asmRichard Henderson2009-12-131-15/+4Star
| | | | | | | | | | Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS rather than the generic DEBUG_DISAS. Use qemu_log_mask for additional LOG_DISAS output. Delete some random insn_count logging noise from gen_intermediate_code_internal. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement missing MVI instructions.Richard Henderson2009-12-131-30/+49
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Honor the -cpu command line argument.Richard Henderson2009-12-131-2/+42
| | | | | | | Also change the default cpu to ev67. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Remove bogus DO_TB_FLUSH code from translator.Richard Henderson2009-12-131-7/+1Star
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: fix extlh instructionVince Weaver2009-09-181-5/+6
| | | | | | | | | The extlh instruction on Alpha currently doesn't work properly. It's a combination of a cut/paste bug (16 where it should be 32) as well as a "shift by 64" bug. Signed-off-by: Vince Weaver <vince@csl.cornell.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
| | | | | | | | | | | | | | | Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Replace always_inline with inlineBlue Swirl2009-08-161-47/+43Star
| | | | | | We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1Star
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori2009-04-241-0/+1
| | | | | | | | Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix emulation of ecbaurel322009-04-151-6/+0Star
| | | | | | | | | | | As ECB is a hint, it can be safely emulated as a nop. This change is necessary to boot Tru64. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7111 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: remove amask helperaurel322009-04-101-2/+13
| | | | | | | | | | The direct use of helper_amask in translate.c was bogus (as env is not assigned). Directly code amask in tcg and remove the helper. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: remove helper_load_implveraurel322009-04-101-1/+3
| | | | | | | | | There is no need to use an helper. Directly load the value with tcg code. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix palcode mask for user pal callsaurel322009-04-081-1/+1
| | | | | | | | | (Also 6 bits for unprivileged calls) Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7033 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: stop translation if too longaurel322009-04-071-5/+9
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7027 c046a42c-6fe2-441c-8c8c-71466251a162
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-4/+4
| | | | | | | | | | | | | | This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: bug fix: avoid nop to override next instructionaurel322009-03-291-3/+3
| | | | | | | | | | | While searching PC, always store the pc of a new instruction. Instructions that didn't generate tcg code (such as nop) prevented the next one to be referenced. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6930 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: add instruction name in comments for hw_ld opcode.aurel322009-03-291-20/+20
| | | | | | | | | | Make code slightly easier to read. Also unused hw_ld opcodes now generate an invalid opc fault. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6928 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix temp free for hw_staurel322009-03-291-2/+1Star
| | | | | | | | | No need to stop translation after hw_st. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6925 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix bug: integer conditional branch offset is 21 bits wide.aurel322009-03-291-10/+10
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6924 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: Fix bug: do not mask address LSBs for ldwu.aurel322009-03-291-1/+1
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6923 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: Fix bug: palcode is at least 6 bits.aurel322009-03-291-1/+1
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6922 c046a42c-6fe2-441c-8c8c-71466251a162
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0Star
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-1/+1
| | | | | | | | | | | | These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
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