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* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | disas does not need to access the CPU env for any reason. Change the APIs to accept CPU pointers instead. Small change pattern needs to be applied to all target translate.c. This brings us closer to making disas.o a common-obj and less architecture specific in general. Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
* Revert "target-alpha: Add vector implementation for CMPBGE"Peter Maydell2015-05-221-37/+0Star
| | | | | | | | | | | This reverts commit 32ad48abd74a997220b841e4e913edeb267aa362. Unfortunately the SSE2 code here fails to compile on some versions of gcc: target-alpha/int_helper.c:77:24: error: invalid operands to binary >= (have '__vector(16) unsigned char' and '__vector(16) unsigned char') Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target-alpha: Add vector implementation for CMPBGERichard Henderson2015-05-211-0/+37
| | | | | | | While conditionalized on SSE2, it's a "portable" gcc generic vector implementation, which could be enabled on other hosts. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Rewrite helper_zapnotRichard Henderson2015-05-211-18/+12Star
| | | | | | This form produces significantly smaller code on x86_64. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Raise IOV from CVTQLRichard Henderson2015-05-183-32/+13Star
| | | | | | | | | Even if an exception isn't taken, the status flags need updating and the result should be written to the destination. Move the body of cvtql out of line, since we now always need a call. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Suppress underflow from CVTTQ if DNZRichard Henderson2015-05-181-1/+1
| | | | | | | I.e. respect flush_inputs_to_zero. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Raise EXC_M_INV properly for fp inputsRichard Henderson2015-05-183-10/+30
| | | | | | | | Ignore DNZ if software completion isn't used. Raise INV for denormals in system mode so the OS completion handler sees them. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Disallow literal operand to 1C.30 to 1C.37Richard Henderson2015-05-181-2/+17
| | | | | | | | Before 64f45e49 we used to have literal checks for 4 of these 8 opcodes. Confirmed that real hardware doesn't allow them. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Implement WH64ENRichard Henderson2015-05-181-0/+4
| | | | | | | Backward compatible cache insn introduced for EV7. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Fix integer overflow checking insnsRichard Henderson2015-05-183-70/+56Star
| | | | | | | | | We need to write the result to the destination register before raising any exception. Thus inline the code for each insn, and check for any exception after we're done. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Fix cvttq vs infRichard Henderson2015-05-181-1/+1
| | | | | | | We should raise INV for infinities as well, not OVR+INE. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Fix cvttq vs large integersRichard Henderson2015-05-181-5/+5
| | | | | | | | The range +- 2**63 - 2**64 was returning the wrong truncated result. We also incorrectly signaled overflow for -2**63. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Raise IOV from CVTTQRichard Henderson2015-05-183-30/+13Star
| | | | | | | Floating-point overflow is a different bit from integer overflow. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Set EXC_M_SWC for exceptions from /S insnsRichard Henderson2015-05-181-5/+3Star
| | | | | | | | Previously forgotten, the kernel needs the software completion bit to know that it needs to emulate software completion qualified insns. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Set fpcr_exc_status even for disabled exceptionsRichard Henderson2015-05-182-29/+34
| | | | | | | | The qualifiers can suppress the raising of exceptions, but real hardware still records that the exceptions occurred. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Tidy FPCR representationRichard Henderson2015-05-185-243/+159Star
| | | | | | | Store the fpcr as the hardware represents it. Convert the softfpu representation of exceptions into the fpcr representation. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Set PC correctly for floating-point exceptionsRichard Henderson2015-05-182-1/+10
| | | | | | | | PC should be one past the faulting insn. Add better commentary for the machine-check exception path. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Forget installed round mode after MT_FPCRRichard Henderson2015-05-181-0/+5
| | | | | | | | | When we use QUAL_RM_D, we copy fpcr_dyn_round to float_status. When we install a new FPCR value, we update fpcr_dyn_round. Reset the status of the cache so that we re-copy for the next fp insn that requires dynamic rounding. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Rename floating-point subroutinesRichard Henderson2015-05-183-36/+36
| | | | | | ... to match the instructions, which have no leading "f". Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Move VAX helpers to a new fileRichard Henderson2015-05-183-329/+354
| | | | | | Keep the IEEE and VAX floating point emulation separate. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost2015-03-101-8/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of making cpu_init() return CPUArchState, return CPUState. Changes were made using the Coccinelle semantic patch below. @@ typedef CPUState; identifier e; expression args; type CPUArchState; @@ - e = + cpu = cpu_init(args); - if (!e) { + if (!cpu) { ... } - cpu = ENV_GET_CPU(env); + e = cpu->env_ptr; @@ identifier new_env, new_cpu, env, cpu; type CPUArchState; expression args; @@ -{ - CPUState *cpu = ENV_GET_CPU(env); - CPUArchState *new_env = cpu_init(args); - CPUState *new_cpu = ENV_GET_CPU(new_env); +{ + CPUState *cpu = ENV_GET_CPU(env); + CPUState *new_cpu = cpu_init(args); + CPUArchState *new_env = new_cpu->env_ptr; ... } @@ identifier c, cpu_init_func, cpu_model; type StateType, CPUType; @@ -static inline StateType* cpu_init(const char *cpu_model) -{ - CPUType *c = cpu_init_func(cpu_model); ( - if (c == NULL) { - return NULL; - } - return &c->env; | - if (c) { - return &c->env; - } - return NULL; ) -} +#define cpu_init(cpu_model) CPU(cpu_init_func(cpu_model)) @@ identifier cpu_init_func; identifier model; @@ -#define cpu_init(model) (&cpu_init_func(model)->env) +#define cpu_init(model) CPU(cpu_init_func(model)) Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Max Filippov <jcmvbkbc@gmail.com> [AF: Fixed up cpu_copy() manually] Signed-off-by: Andreas Färber <afaerber@suse.de>
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-131-7/+7
| | | | | | | | The method by which we count the number of ops emitted is going to change. Abstract that away into some inlines. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-131-1/+1
| | | | | Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0Star
| | | | | | | | | | | | | | The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-4/+4
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-alpha: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-253-0/+46
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1410626734-3804-12-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
| | | | | Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-3/+2Star
| | | | | | | | | | This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0Star
| | | | | | | | | They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2014-06-052-1/+1
| | | | | | | Prepare for moving softmmu_header.h inclusion out of .c files Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: make do_unaligned_access a method of CPUPaolo Bonzini2014-06-053-4/+7
| | | | | | | | | We will reference it from more files in the next patch. To avoid ruining the small steps we're making towards multi-target, make it a method of CPU rather than just a global. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-287-12/+7Star
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2014-05-141-2/+0Star
| | | | | | | | | | | | | | | | | | | | After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* target-alpha: Fix RDUSPRichard Henderson2014-05-031-1/+1
| | | | | | Commit 06ef8604e92964cbf30084b7d31091aa7cbbb62f contained a typo. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Remove cpu_unique, cpu_sysval, cpu_uspRichard Henderson2014-04-171-19/+18Star
| | | | | | | | | | | | | Technically, these variables could have been referenced both via offsets from env and as TCG registers, which would be illegal. Of course, that could only be done from PALcode, and ours doesn't do that. But honestly, these are used infrequently enough that they don't really need to be TCG registers. We wind up with exactly the same code if we follow the letter of the law and issue explicit ld/st. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Tidy alpha_translate_initRichard Henderson2014-04-171-35/+43
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Don't issue goto_tb under singlestepRichard Henderson2014-04-171-1/+2
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Use non-local temps for zero/sinkRichard Henderson2014-04-171-2/+2
| | | | | | These values are no longer live across branches. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Use extract to get insn fieldsRichard Henderson2014-04-171-27/+22Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert mfpr/mtpr to source/sinkRichard Henderson2014-04-171-33/+19Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert gen_cpys et al to source/sinkRichard Henderson2014-04-171-76/+24Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert gen_fcvtlq/ql to source/sinkRichard Henderson2014-04-173-50/+36Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert gen_fcmov to source/sinkRichard Henderson2014-04-171-30/+14Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert gen_bcond to source/sinkRichard Henderson2014-04-171-18/+6Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert most ieee insns to source/sinkRichard Henderson2014-04-171-52/+17Star
| | | | | | | This one fixes a bug, previously noted as supressing exceptions in the (unlikely) case the destination register was $f31. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert gen_ieee_input to source/sinkRichard Henderson2014-04-171-19/+13Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert MVIOP2 to source/sinkRichard Henderson2014-04-171-19/+4Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Convert ARITH3 to source/sinkRichard Henderson2014-04-171-69/+39Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
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