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* target-i386: add lock mov cr0 = cr8Andre Przywara2009-10-041-0/+4
* x86: use globals for CPU registersLaurent Desnogues2009-09-301-71/+125
* target-i386: kill a tmp registerAurelien Jarno2009-09-271-4/+3Star
* target-i386: use subfi instead of sub with a non-freed constantAurelien Jarno2009-09-271-7/+7
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-2/+2
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1Star
* x86: Add support for resume flagJan Kiszka2009-05-221-1/+5
* Include assert.h from qemu-common.hPaul Brook2009-05-131-1/+0Star
* Replace gcc variadic macro extension with C99 versionBlue Swirl2009-05-131-2/+2
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-0/+5
* Immediate versions of ro[lr]malc2009-04-031-1/+83
* target-i386: use the new bswap* TCG opsaurel322009-03-131-13/+3Star
* tcg: rename bswap_i32/i64 functionsaurel322009-03-131-3/+3
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-3/+3
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-10/+8Star
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* Fix smsw for x86_64 guest and bigendian host casemalc2008-12-131-0/+4
* target-i386: Fix jmp im on x86_64 when executing 32-bit codeaurel322008-12-101-0/+2
* target-i386: fix CVE-2007-1322aurel322008-12-071-0/+2
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
* TCG variable type checking.pbrook2008-11-171-513/+502Star
* Fix crc32w decoding, fix a constant width in blendvpd.balrog2008-10-041-4/+3Star
* x86 "popcnt" affects flags.balrog2008-10-041-0/+2
* Implement SSE4.1, SSE4.2 (x86).balrog2008-10-041-31/+300
* x86 pextrw destination operand can be r64.balrog2008-10-011-1/+2
* SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).balrog2008-09-251-3/+5
* Implement x86 SSSE3 instructions.balrog2008-09-251-2/+107
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-8/+7Star
* fix cvtsq2s[sd] (Juergen Lock)bellard2008-07-071-2/+6
* Re-add static qualifier. Fix annother occurance of "const static".pbrook2008-07-051-1/+1
* Fix rdtsc instruction counting.pbrook2008-06-301-0/+6
* Add instruction counter.pbrook2008-06-291-4/+61
* HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)bellard2008-06-181-4/+6
* undocumented 0x82 opcode is invalid in 64 bit codebellard2008-06-061-1/+3
* fixed exceptions for cpuid and invlpgbellard2008-06-041-0/+6
* reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard2008-06-041-4/+5
* 32 bit SVM fixes - INVLPG and INVLPGA updatesbellard2008-06-041-4/+8
* SVM reworkbellard2008-05-281-137/+101Star
* fixed x86_64 regressionbellard2008-05-251-4/+4
* transformed TN into temporaries - add local temporaries usage when needed - o...bellard2008-05-251-215/+253
* Fix ARM conditional branch bug.pbrook2008-05-241-28/+25Star
* use debug_insn_start to have nicer debug tracesbellard2008-05-221-5/+2Star
* proper helper definition registering (all targets must do that)bellard2008-05-221-0/+5
* optimization of shifts by a constantbellard2008-05-221-4/+68
* lahf/sahf cpuid testbellard2008-05-221-2/+4
* cmpxchg8b fix - added cmpxchg16bbellard2008-05-221-5/+20
* cmpxchg 64 bit fixbellard2008-05-221-4/+10
* converted conditional jumps, SET and CMOVx to TCGbellard2008-05-211-392/+421
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