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* memory: split memory_region_from_host from qemu_ram_addr_from_hostPaolo Bonzini2016-05-291-2/+4
| | | | | | | | | | | Move the old qemu_ram_addr_from_host to memory_region_from_host and make it return an offset within the region. For qemu_ram_addr_from_host return the ram_addr_t directly, similar to what it was before commit 1b5ec23 ("memory: return MemoryRegion from qemu_ram_addr_from_host", 2013-07-04). Reviewed-by: Marc-André Lureau <marcandre.lureau@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: kvm: Eliminate kvm_msr_entry_set()Eduardo Habkost2016-05-241-9/+3Star
| | | | | | | Inline the function inside kvm_msr_entry_add(). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: kvm: Simplify MSR setting functionsEduardo Habkost2016-05-241-21/+6Star
| | | | | | | | | Simplify kvm_put_tscdeadline_msr() and kvm_put_msr_feature_control() using kvm_msr_buf and the kvm_msr_entry_add() helper. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: kvm: Simplify MSR array constructionEduardo Habkost2016-05-241-151/+140Star
| | | | | | | | Add a helper function that appends new entries to the MSR buffer and checks for the buffer size limit. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: kvm: Increase MSR_BUF_SIZEEduardo Habkost2016-05-241-2/+3
| | | | | | | | | | | | | We are dangerously close to the array limits in kvm_put_msrs() and kvm_get_msrs(): with the default mcg_cap configuration, we can set up to 148 MSRs in kvm_put_msrs(), and if we allow mcg_cap to be changed, we can write up to 236 MSRs. Use 4096 bytes for the buffer, that can hold 255 kvm_msr_entry structs. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: kvm: Allocate kvm_msrs struct once per VCPUEduardo Habkost2016-05-242-18/+23
| | | | | | | | | Instead of using 2400 bytes in the stack for 150 MSR entries in kvm_get_msrs() and kvm_put_msrs(), allocate a buffer once for each VCPU. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Call cpu_exec_init() on realizeEduardo Habkost2016-05-241-1/+2
| | | | | | | | | | | | | | | | | QOM instance_init functions are not supposed to have any side-effects, as new objects may be created at any moment for querying property information (see qmp_device_list_properties()). Calling cpu_exec_init() also affects QEMU's ability to handle errors during CPU creation, as some actions done by cpu_exec_init() can't be reverted. Move cpu_exec_init() call to realize so a simple object_new() won't trigger it, and so that it is called after some basic validation of CPU parameters. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Move TCG initialization to realize timeEduardo Habkost2016-05-241-5/+4Star
| | | | | | | | | | | | QOM instance_init functions are not supposed to have any side-effects, as new objects may be created at any moment for querying property information (see qmp_device_list_properties()). Move TCG initialization to realize time so it won't be called when just doing object_new() on a X86CPU subclass. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Move TCG initialization check to tcg_x86_init()Eduardo Habkost2016-05-242-3/+7
| | | | | | | | | Instead of requiring cpu.c to check if TCG was already initialized, simply let the function be called multiple times. Suggested-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* cpu: Eliminate cpudef_init(), cpudef_setup()Eduardo Habkost2016-05-242-6/+0Star
| | | | | | | x86_cpudef_init() doesn't do anything anymore, cpudef_init(), cpudef_setup(), and x86_cpudef_init() can be finally removed. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Set constant model_id for qemu64/qemu32/athlonEduardo Habkost2016-05-241-20/+3Star
| | | | | | | | | Newer PC machines don't set hw_version, and older machines set model-id on compat_props explicitly, so we don't need the x86_cpudef_setup() code that sets model_id using qemu_hw_version() anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: kvm: Use X86XSaveArea struct for xsave save/loadEduardo Habkost2016-05-231-40/+38Star
| | | | | | | | Instead of using offset macros and bit operations in a uint32_t array, use the X86XSaveArea struct to perform the loading/saving operations in kvm_put_xsave() and kvm_get_xsave(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Use xsave structs for ext_save_areaEduardo Habkost2016-05-231-7/+14
| | | | | | | | | | This doesn't introduce any change in the code, as the offsets and struct sizes match what was present in the table. This can be validated by the QEMU_BUILD_BUG_ON lines on target-i386/cpu.h, which ensures the struct sizes and offsets match the existing values in ext_save_area. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: Define structs for layout of xsave areaEduardo Habkost2016-05-232-0/+118
| | | | | | | | | Add structs that define the layout of the xsave areas used by Intel processors. Add some QEMU_BUILD_BUG_ON lines to ensure the structs match the XSAVE_* macros in target-i386/kvm.c and the offsets and sizes at target-i386/cpu.c:ext_save_areas. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: key sfence availability on CPUID_SSE, not CPUID_SSE2Paolo Bonzini2016-05-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sfence was introduced before lfence and mfence. This fixes Linux 2.4's measurement of checksumming speeds for the pIII_sse algorithm: md: linear personality registered as nr 1 md: raid0 personality registered as nr 2 md: raid1 personality registered as nr 3 md: raid5 personality registered as nr 4 raid5: measuring checksumming speed 8regs : 384.400 MB/sec 32regs : 259.200 MB/sec invalid operand: 0000 CPU: 0 EIP: 0010:[<c0240b2a>] Not tainted EFLAGS: 00000246 eax: c15d8000 ebx: 00000000 ecx: 00000000 edx: c15d5000 esi: 8005003b edi: 00000004 ebp: 00000000 esp: c15bdf50 ds: 0018 es: 0018 ss: 0018 Process swapper (pid: 1, stackpage=c15bd000) Stack: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000206 c0241c6c 00001000 c15d4000 c15d7000 c15d4000 c15d4000 Call Trace: [<c0241c6c>] [<c0105000>] [<c0241db4>] [<c010503b>] [<c0105000>] [<c0107416>] [<c0105030>] Code: 0f ae f8 0f 10 04 24 0f 10 4c 24 10 0f 10 54 24 20 0f 10 5c <0>Kernel panic: Attempted to kill init! Reported-by: Stefan Weil <sw@weilnetz.de> Fixes: 121f3157887f92268a3d6169e2d4601f9292020b Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini2016-05-1914-2/+15
| | | | | | | | | | exec-all.h contains TCG-specific definitions. It is not needed outside TCG-specific files such as translate.c, exec.c or *helper.c. One generic function had snuck into include/exec/exec-all.h; move it to include/qom/cpu.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini2016-05-194-1/+5
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: cannot include hw/hw.h from user emulationPaolo Bonzini2016-05-191-1/+1
| | | | | | | | | | All qdev definitions are available from other headers, user-mode emulation does not need hw/hw.h. By considering system emulation only, it is simpler to disentangle hw/hw.h from NEED_CPU_H. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: move CPU state serialization to migration/cpu.hPaolo Bonzini2016-05-191-0/+1
| | | | | | Remove usage of NEED_CPU_H from hw/hw.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* apic: move target-dependent definitions to cpu.hPaolo Bonzini2016-05-191-0/+7
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: make cpu-qom.h not target specificPaolo Bonzini2016-05-192-97/+98
| | | | | | | | | Make X86CPU an opaque type within cpu-qom.h, and move all definitions of private methods, as well as all type definitions that require knowledge of the layout to cpu.h. This helps making files independent of NEED_CPU_H if they only need to pass around CPU pointers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu: make cpu-qom.h only include-able from cpu.hPaolo Bonzini2016-05-191-1/+0Star
| | | | | | | | | | | | Make cpu-qom.h so that it is only included from cpu.h. Then there is no need for it to include cpu.h again. Later we will make cpu-qom.h target independent and we will _want_ to include it from elsewhere, but for now reduce the number of cases to handle. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Fix some typos found by codespellStefan Weil2016-05-182-2/+2
| | | | | | Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* tcg: Allow goto_tb to any target PC in user modeSergey Fedorov2016-05-131-9/+14
| | | | | | | | | | | | | | In user mode, there's only a static address translation, TBs are always invalidated properly and direct jumps are reset when mapping change. Thus the destination address is always valid for direct jumps and there's no need to restrict it to the pages the TB resides in. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Clean up direct block chaining safety checksSergey Fedorov2016-05-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | We don't take care of direct jumps when address mapping changes. Thus we must be sure to generate direct jumps so that they always keep valid even if address mapping changes. Luckily, we can only allow to execute a TB if it was generated from the pages which match with current mapping. Document tcg_gen_goto_tb() declaration and note the reason for destination PC limitations. Some targets with variable length instructions allow TB to straddle a page boundary. However, we make sure that both of TB pages match the current address mapping when looking up TBs. So it is safe to do direct jumps into the both pages. Correct the checks for some of those targets. Given that, we can safely patch a TB which spans two pages. Remove the unnecessary check in cpu_exec() and allow such TBs to be patched. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tb: consistently use uint32_t for tb->flagsEmilio G. Cota2016-05-132-2/+2
| | | | | | | | | | | | | | | | | | We are inconsistent with the type of tb->flags: usage varies loosely between int and uint64_t. Settle to uint32_t everywhere, which is superior to both: at least one target (aarch64) uses the most significant bit in the u32, and uint64_t is wasteful. Compile-tested for all targets. Suggested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Suggested-by: Richard Henderson <rth@twiddle.net> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1460049562-23517-1-git-send-email-cota@braap.org>
* event-notifier: Add "is_external" parameterFam Zheng2016-04-221-3/+3
| | | | | | | | | | All callers pass "false" keeping the old semantics. The windows implementation doesn't distinguish the flag yet. On posix, it is passed down to the underlying aio context. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
* target-i386: Set AMD alias bits after filtering CPUID dataEduardo Habkost2016-04-181-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | QEMU complains about -cpu host on an AMD machine: warning: host doesn't support requested feature: CPUID.80000001H:EDX [bit 0] For bits 0,1,3,4,5,6,7,8,9,12,13,14,15,16,17,23,24. KVM_GET_SUPPORTED_CPUID and and x86_cpu_get_migratable_flags() don't handle the AMD CPUID aliases bits, making x86_cpu_filter_features() print warnings and clear those CPUID bits incorrectly. To avoid hacking x86_cpu_get_migratable_flags() to handle CPUID_EXT2_AMD_ALIASES (just like the existing hack inside kvm_arch_get_supported_cpuid()), simply move the CPUID_EXT2_AMD_ALIASES code in x86_cpu_realizefn() after the x86_cpu_filter_features() call. This will probably make the CPUID_EXT2_AMD_ALIASES hack in kvm_arch_get_supported_cpuid() unnecessary, too. The hack will be removed in a follow-up patch after v2.6.0. Reported-by: Radim Krčmář <rkrcmar@redhat.com> Tested-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-i386: check for PKU even for non-writable pagesPaolo Bonzini2016-04-081-8/+10
| | | | | | | | | | | | | | | | | | | | | Xiao Guangrong ran kvm-unit-tests on an actual machine with PKU and found that it fails: test pte.p pte.user pde.p pde.user pde.a pde.pse pkru.wd pkey=1 user write efer.nx cr4.pke: FAIL: error code 27 expected 7 Dump mapping: address: 0x123400000000 ------L4: 2ebe007 ------L3: 2ebf007 ------L2: 8000000020000a5 (All failures are combinations of "pde.user pde.p pkru.wd pkey=1", plus either "pde.pse" or "pte.p pte.user", plus one of "user cr0.wp", "cr0.wp" or "user", plus unimportant bits such as accessed/dirty or efer.nx). So PFEC.PKEY is set even if the ordinary check failed (which it did because pde.w is zero). Adjust QEMU to match behavior of silicon. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: assert that KVM_GET/SET_MSRS can set all requested MSRsPaolo Bonzini2016-04-051-4/+30
| | | | | | This would have caught the bug in the previous patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: do not pass MSR_TSC_AUX to KVM ioctls if CPUID bit is not setPaolo Bonzini2016-04-051-0/+3
| | | | | | | | | | | | | | KVM does not let you read or write this MSR if the corresponding CPUID bit is not set. This in turn causes MSRs that come after MSR_TSC_AUX to be ignored by KVM_SET_MSRS. One visible symptom is that s3.flat from kvm-unit-tests fails with CPUs that do not have RDTSCP, because the SMBASE is not reset to 0x30000 after reset. Fixes: c9b8f6b6210847b4381c5b2ee172b1c7eb9985d6 Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386/kvm: Hyper-V VMBus hypercalls blank handlersAndrey Smetanin2016-04-051-0/+12
| | | | | | | | | | | | | | | | | | | | | Add Hyper-V VMBus hypercalls blank handlers which just returns error code - HV_STATUS_INVALID_HYPERCALL_CODE. This is required when the synthetic interrupt controller is active. Fixes: 50efe82c3c27195162dd8df273eadd77d8aecad3 Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Richard Henderson <rth@twiddle.net> CC: Eduardo Habkost <ehabkost@redhat.com> CC: "Andreas Färber" <afaerber@suse.de> CC: Marcelo Tosatti <mtosatti@redhat.com> CC: Roman Kagan <rkagan@virtuozzo.com> CC: Denis V. Lunev <den@openvz.org> CC: kvm@vger.kernel.org Message-Id: <1456309368-29769-2-git-send-email-asmetanin@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: implement PKE for TCGPaolo Bonzini2016-03-247-5/+110
| | | | | | Tested with kvm-unit-tests. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* util: move declarations out of qemu-common.hVeronia Bahaa2016-03-221-0/+1
| | | | | | | | | | Move declarations out of qemu-common.h for functions declared in utils/ files: e.g. include/qemu/path.h for utils/path.c. Move inline functions out of qemu-common.h and into new files (e.g. include/qemu/bcd.h) Signed-off-by: Veronia Bahaa <veroniabahaa@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2016-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell2016-03-152-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging X86 fixes # gpg: Signature made Mon 14 Mar 2016 20:26:25 GMT using RSA key ID 984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" * remotes/ehabkost/tags/x86-pull-request: kvm: Remove x2apic feature from CPU model when kernel_irqchip is off hyperv: cpu hotplug fix with HyperV enabled Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * kvm: Remove x2apic feature from CPU model when kernel_irqchip is offLan Tianyu2016-03-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | x2apic feature is in the kvm_default_props and automatically added to all CPU models when KVM is enabled. But userspace devices don't support x2apic which can't be enabled without the in-kernel irqchip. It will trigger warning of "host doesn't support requested feature: CPUID.01H:ECX.x2apic [bit 21]" when kernel_irqchip is off. This patch is to fix it via removing x2apic feature when kernel_irqchip is off. Signed-off-by: Lan Tianyu <tianyu.lan@intel.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * hyperv: cpu hotplug fix with HyperV enabledDenis V. Lunev2016-03-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With Hyper-V enabled CPU hotplug stops working. The CPU appears in device manager on Windows but does not appear in peformance monitor and control panel. The root of the problem is the following. Windows checks HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE bit in CPUID. The presence of this bit is enough to cure the situation. The bit should be set when CPU hotplug is allowed for HyperV VM. The check that hot_add_cpu callback is defined is enough from the protocol point of view. Though this callback is defined almost always thus there is no need to export that knowledge in the other way. Signed-off-by: Denis V. Lunev <den@openvz.org> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Richard Henderson <rth@twiddle.net> CC: Eduardo Habkost <ehabkost@redhat.com> CC: "Andreas Färber" <afaerber@suse.de> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | target-i386: Dump unknown opcodes with -d unimpRichard Henderson2016-03-141-44/+83
| | | | | | | | | | | | | | | | We discriminate here between opcodes that are illegal in the current cpu mode or with illegal arguments (such as modrm.mod == 3) and encodings that are unknown (such as an unimplemented isa extension). Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Fix inhibit irq mask handlingRichard Henderson2016-03-141-39/+37Star
| | | | | | | | | | | | | | | | | | | | | | The patch in 7f0b714 was too simplistic, in that we wound up setting the flag and then resetting it immediately in gen_eob. Fixes the reported boot problem with Windows XP. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Use gen_nop_modrm for prefetch instructionsRichard Henderson2016-03-141-3/+2Star
| | | | | | | | | | Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Fix addr16 prefixPaolo Bonzini2016-03-141-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While ADDSEG will only be false in 16-bit mode for LEA, it can be false even in other cases when 16-bit addresses are obtained via the 67h prefix in 32-bit mode. In this case, gen_lea_v_seg forgets to add a nonzero FS or GS base if CS/DS/ES/SS are all zero. This case is pretty rare but happens when booting Windows 95/98, and this patch fixes it. The bug is visible since commit d6a291498, but it was introduced together with gen_lea_v_seg and it probably could be reproduced with a "addr16 gs movsb" instruction as early as in commit ca2f29f555805d07fb0b9ebfbbfc4e3656530977. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1456931078-21635-1-git-send-email-pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Fix SMSW for 64-bit modeRichard Henderson2016-03-141-6/+8
| | | | | | | | | | | | | | | | | | In non-64-bit modes, the instruction always stores 16 bits. But in 64-bit mode, when the destination is a register, the instruction can write 32 or 64 bits. Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Fix SMSW and LMSW from/to registerPaolo Bonzini2016-03-141-16/+22
| | | | | | | | | | | | | | | | | | | | | | | | SMSW and LMSW accept register operands, but commit 1906b2a ("target-i386: Rearrange processing of 0F 01", 2016-02-13) did not account for that. Fixes: 1906b2af7c2345037d9b2fdf484b457b5acd09d1 Reported-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1456845134-18812-1-git-send-email-pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Avoid repeated calls to the bnd_jmp helperPaolo Bonzini2016-03-141-5/+5
|/ | | | | | | | | | Two flags were tested the wrong way. Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1456845145-18891-1-git-send-email-pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> [rth: Fixed enable test as well.]
* tcg: Add type for vCPU pointersLluís Vilanova2016-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The tracing infrastructure later needs to differentiate between regular pointers and pointers to vCPUs. Also changes all targets to use the new 'TCGv_env' type instead of the generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env' translates into 'TCGv_ptr'), but that could change in the future to enforce the difference. Note that a 'TCGv_env' type (for 'CPUState') is not added, since all helpers currently receive the architecture-specific pointer ('CPUArchState'). Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Acked-by: Richard Henderson <rth@twiddle.net> Message-id: 145641859552.30295.7821536833590725201.stgit@localhost Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-02-254-42/+59
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Asynchronous dump-guest-memory from Peter * improved logging with -D -daemonize from Dimitris * more address_space_* optimization from Gonglei * TCG xsave/xrstor thinko fix * chardev bugfix and documentation patch # gpg: Signature made Thu 25 Feb 2016 15:12:27 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: target-i386: fix confusion in xcr0 bit position vs. mask chardev: Properly initialize ChardevCommon components memory: Remove unreachable return statement memory: optimize qemu_get_ram_ptr and qemu_ram_ptr_length exec: store RAMBlock pointer into memory region log: Redirect stderr to logfile if deamonized dump-guest-memory: add qmp event DUMP_COMPLETED Dump: add hmp command "info dump" Dump: add qmp command "query-dump" DumpState: adding total_size and written_size fields dump-guest-memory: add "detach" support dump-guest-memory: disable dump when in INMIGRATE state dump-guest-memory: introduce dump_process() helper function. dump-guest-memory: add dump_in_progress() helper function dump-guest-memory: using static DumpState, add DumpStatus dump-guest-memory: add "detach" flag for QMP/HMP interfaces. dump-guest-memory: cleanup: removing dump_{error|cleanup}(). scripts/kvm/kvm_stat: Fix missing right parantheses and ".format(...)" qemu-options.hx: Improve documentation of chardev multiplexing mode Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: fix confusion in xcr0 bit position vs. maskPaolo Bonzini2016-02-254-42/+59
| | | | | | | | | | | | | | | | | | | | The xsave and xrstor helpers are accessing the x86_ext_save_areas array using a bit mask instead of a bit position. Provide two sets of XSTATE_* definitions and use XSTATE_*_BIT when a bit position is requested. Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | all: Clean up includesPeter Maydell2016-02-233-2/+1Star
| | | | | | | | | | | | | | | | | | | | Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com>
* | cpu: Clean up includesPeter Maydell2016-02-231-4/+1Star
|/ | | | | | | | | Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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