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* target-mips: implement UserLocal RegisterPetar Jovanovic2014-06-181-5/+11
| | | | | | | | | | | | | | | | | | | | | | From MIPS documentation (Volume III): UserLocal Register (CP0 Register 4, Select 2) Compliance Level: Recommended. The UserLocal register is a read-write register that is not interpreted by the hardware and conditionally readable via the RDHWR instruction. This register only exists if the Config3-ULRI register field is set. Privileged software may write this register with arbitrary information and make it accessible to unprivileged software via register 29 (ULR) of the RDHWR instruction. To do so, bit 29 of the HWREna register must be set to a 1 to enable unprivileged access to the register. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+2
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-mips: Don't overuse CPUStateAndreas Färber2012-03-141-2/+2
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUMIPSState/g" target-mips/*.[hc] sed -i "s/#define CPUMIPSState/#define CPUState/" target-mips/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* fix spelling in target sub directoryDong Xu Wang2011-12-021-1/+1
| | | | | | | | | | | Cc: Richard Henderson <rth@twiddle.net> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* Remove exec-all.h include directivesBlue Swirl2011-06-261-1/+1
| | | | | | Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: rename CP0_LLAddr into lladdrAurelien Jarno2009-11-221-2/+2
| | | | | | | | The variable CP0_LLAddr represent the full lladdr, not the actual register value, which is only part of this value and depends on the CPU. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix a warning: uint_fast8_t is not 8 bits on OpenBSD/Sparc64Blue Swirl2009-06-131-2/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert machine registration to use module init functionsAnthony Liguori2009-05-211-9/+0Star
| | | | | | This cleans up quite a lot of #ifdefs, extern variables, and other ugliness. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-mips: optimize gen_compute_branch()aurel322009-03-291-2/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6936 c046a42c-6fe2-441c-8c8c-71466251a162
* A first attempt on supporting snapshots for the MIPS target.ths2008-12-201-0/+291
| | | | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6112 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove unnecessary trailing newlinesblueswir12008-12-131-2/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
* Change MIPS machine default to Malta.ths2008-07-051-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4851 c046a42c-6fe2-441c-8c8c-71466251a162
* remove target ifdefs from vl.caurel322008-05-041-0/+22
(Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
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