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path: root/target-mips/translate.c
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* target-mips: fix MTHC1 and MFHC1 when FPU in FR=0 modePetar Jovanovic2014-03-251-35/+44
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+2
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-3/+1Star
* target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic2014-02-101-2/+12
* target-mips: add support for CP0_Config5Petar Jovanovic2014-02-101-2/+12
* target-mips: add support for CP0_Config4Petar Jovanovic2014-02-101-2/+13
* target-mips: Use new qemu_ld/st opcodesAurelien Jarno2013-12-211-67/+52Star
* target-mips: fix 64-bit FPU config for user-mode emulationPetar Jovanovic2013-12-091-2/+5
* Merge remote-tracking branch 'rth/tcg-pull' into stagingAnthony Liguori2013-10-111-4/+0Star
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| * tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-4/+0Star
* | cpu: Drop cpu_model_str from CPU_COMMONAndreas Färber2013-10-071-1/+0Star
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* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* target-mips: fix decoding of microMIPS POOL32Axf instructionsLeon Alrae2013-08-061-6/+54
* target-mips: fix branch in likely delay slot tcg assertJames Hogan2013-07-281-45/+17Star
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-4/+7
* target-mips: Change gen_intermediate_code_internal() argument to MIPSCPUAndreas Färber2013-07-091-4/+5
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-2/+4
* target-mips: add missing check_dspr2 for multiply instructionsPetar Jovanovic2013-05-081-0/+1
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-2/+2
* mips64-linux-user: Enable 64-bit address mode and fpuRichard Henderson2013-03-051-0/+12
* target-mips: Fix accumulator selection for MIPS16 and microMIPSRichard Sandiford2013-03-051-84/+64Star
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson2013-02-231-28/+20Star
* target-mips: Move TCG initialization to MIPSCPU initfnAndreas Färber2013-02-161-2/+1Star
* target-mips: Introduce QOM realizefn for MIPSCPUAndreas Färber2013-02-161-2/+3
* target-mips: enable access to DSP ASE if implementedPetar Jovanovic2013-01-311-4/+2Star
* target-mips: Sign-extend the result of LWRRichard Sandiford2013-01-311-0/+1
* target-mips: Fix signedness of loads in MIPS16 RESTOREsRichard Sandiford2013-01-311-1/+1
* target-mips: implement DSP (d)append sub-class with TCGAurelien Jarno2013-01-311-46/+87
* target-mips: generate a reserved instruction exception on CPU without DSPAurelien Jarno2013-01-311-2/+10
* target-mips: copy insn_flags in DisasContextAurelien Jarno2013-01-311-381/+381
* target-mips: fix DSP loads with rd = 0Aurelien Jarno2013-01-311-5/+0Star
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-10/+7Star
* target-mips: Make repl_ph to sign extend to target-longJovanovic, Petar2013-01-011-1/+2
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
* TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
* TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
* TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
* target-mips: remove POOL48A from the microMIPS decodingAurelien Jarno2012-11-241-1/+0Star
* target-mips: Clean up microMIPS32 major opcode陳韋任 (Wei-Ren Chen)2012-11-241-7/+17
* target-mips: Add comments on POOL32Axf encoding陳韋任 (Wei-Ren Chen)2012-11-241-0/+17
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-3/+3
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-4/+5
* target-mips: fix wrong microMIPS opcode encoding陳韋任 (Wei-Ren Chen)2012-11-151-1/+1
* target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1.Eric Johnson2012-11-111-7/+11
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
* target-mips: use deposit instead of hardcoded versionAurelien Jarno2012-10-311-28/+4Star
* target-mips: optimize ddiv/ddivu/div/divu with movcondAurelien Jarno2012-10-311-48/+37Star
* target-mips: implement movn/movz using movcondAurelien Jarno2012-10-311-15/+12Star
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