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* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
| | | | | Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* openrisc: fix commentMichael S. Tsirkin2014-06-291-2/+2
| | | | | | | | | | | Fix English in comment: s/the each/each/ s/ \*\// \*\// Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-1/+2
| | | | | | | | | | This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-13/+0Star
| | | | | | | | | They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-287-12/+7Star
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2014-05-141-2/+0Star
| | | | | | | | | | | | | | | | | | | | After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-134-4/+4
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber2014-03-131-2/+2
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-4/+1Star
| | | | | | This lets us drop some local variables in tlb_fill() functions. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-132-2/+2
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-3/+5
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-133-3/+9
| | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-134-9/+12
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-134-12/+13
| | | | | | | | Note that while such functions may exist both for *-user and softmmu, only *-user uses the CPUState hook, while softmmu reuses the prototype for calling it directly. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Factor out cpu_generic_init()Andreas Färber2014-03-131-12/+1Star
| | | | | | | All targets using it gain the ability to set -cpu name,key=value,... options via the default TYPE_CPU CPUClass::parse_features() implementation. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-132-5/+7
| | | | | | | | | Default to false. Tidy variable naming and inline cast uses while at it. Tested-by: Jia Liu <proljc@gmail.com> (or32) Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-openrisc: Use new qemu_ld/st opcodesRichard Henderson2014-02-121-67/+32Star
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* openrisc: Fix spelling in comment (transaltion -> translation)Stefan Weil2013-12-231-1/+1
| | | | | | | | I also removed two hyphens in the same comment. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* misc: Replace 'struct QEMUTimer' by 'QEMUTimer'Stefan Weil2013-12-021-1/+1
| | | | | | | | Most code already used QEMUTimer without the redundant 'struct' keyword. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* target-openrisc: Correct memory bounds checking for the tlb buffersSebastian Macke2013-11-201-8/+8
| | | | | | | | | The mtspr and mfspr routines didn't check for the correct memory boundaries. This fixes a segmentation fault while booting Linux. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* openrisc-timer: Reduce overhead, Separate clock update functionsSebastian Macke2013-11-202-20/+19Star
| | | | | | | | | | | | | The clock value is only evaluated when really necessary reducing the overhead of the timer handling. This also solves a problem in the way the Linux kernel handles the timer and the expected accuracy. The old version could lead to inaccurate timings. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* target-openrisc: Correct wrong epcr register in interrupt handlerSebastian Macke2013-11-201-18/+7Star
| | | | | | | | | | | | This patch corrects several misbehaviors during an interrupt process. Most of the time the pc is already correct and therefore no special treatment of the exceptions is necessary. Tested by checking crashing programs which otherwise work in or1ksim. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* target-openrisc: Remove executable flag for every pageSebastian Macke2013-11-201-2/+2
| | | | | | | | | Pages should be flagged executable only if the tlb executable flag is set or the mmu is off. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* target-openrisc: Remove unnecessary code generated by jump instructionsSebastian Macke2013-11-201-19/+26
| | | | | | | | | | The sr_f variable is only used for the l.bf and l.bnf instructions. For clarity the code is also rewritten using a switch statement instead of if chaining. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* target-openrisc: Speed up move instructionSebastian Macke2013-11-201-23/+27
| | | | | | | | | | | | | The OpenRISC architecture does not have its own move register instruction. Instead it uses either "l.addi rd, r0, x" or "l.ori rd, rs, 0" or "l.or rd, rx, r0" The l.ori instruction is automatically optimized but not the l.addi instruction. This patch optimizes for this special case. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
* Merge remote-tracking branch 'jliu/or32' into stagingAnthony Liguori2013-10-141-8/+1Star
|\ | | | | | | | | | | | | | | | | | | | | # By Sebastian Macke # Via Jia Liu * jliu/or32: target-openrisc: Removes a non-conforming behavior for the first page of the memory target-openrisc: Correct handling of page faults. Message-id: 1380789702-18935-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <aliguori@amazon.com>
| * target-openrisc: Removes a non-conforming behavior for the first page of the ↵Sebastian Macke2013-10-031-7/+0Star
| | | | | | | | | | | | | | | | | | | | | | memory Where *software* leaves 0x0000 - 0x2000 unmapped, the hardware should still allow for this area to be mapped. Signed-off-by: Sebastian Macke <sebastian@macke.de> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Reviewed-by: Jia Liu <proljc@gmail.com>
| * target-openrisc: Correct handling of page faults.Sebastian Macke2013-10-031-1/+1
| | | | | | | | | | | | | | | | | | The result of (rw & 0) is always zero and therefore a logic false. The whole comparison will therefore never be executed, it is a obvious bug, we should use !(rw & 1) here. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com>
* | Merge remote-tracking branch 'rth/tcg-pull' into stagingAnthony Liguori2013-10-111-2/+0Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # By Richard Henderson # Via Richard Henderson * rth/tcg-pull: exec: Add both big- and little-endian memory helpers tcg: Add qemu_ld_st_i32/64 tcg: Add TCGMemOp configure: Remove CONFIG_QEMU_LDST_OPTIMIZATION tcg: Add tcg-be-ldst.h tcg: Add tcg-be-null.h exec: Delete is_tcg_gen_code and GETRA_EXT tcg-aarch64: Update to helper_ret_*_mmu routines tcg: Merge tcg_register_helper into tcg_context_init tcg: Add tcg-runtime.c helpers to all_helpers tcg: Put target helper data into an array. tcg: Remove stray semi-colons from target-*/helper.h tcg: Move helper registration into tcg_context_init target-m68k: Rename helpers.h to helper.h tcg: Use a GHashTable for tcg_find_helper tcg: Delete tcg_helper_get_name declaration tcg-hppa: Remove tcg backend Message-id: 1381440525-6666-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@amazon.com>
| * | tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-2/+0Star
| |/ | | | | | | | | | | No longer needs to be done on a per-target basis. Signed-off-by: Richard Henderson <rth@twiddle.net>
* / cpu: Drop cpu_model_str from CPU_COMMONAndreas Färber2013-10-071-1/+0Star
|/ | | | | | | Since this is only read in cpu_copy() and linux-user has a global cpu_model, drop the field from generic code. Signed-off-by: Andreas Färber <afaerber@suse.de>
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
| | | | | | | And update all users. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber2013-07-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386) Tested-by: Jia Liu <proljc@gmail.com> (for openrisc) Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-274-5/+16
| | | | | | | | Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber2013-07-271-4/+4
| | | | | | | | | | | | | This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-openrisc: Move cpu_gdb_{read,write}_register()Andreas Färber2013-07-271-0/+77
| | | | | Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-261-0/+1
| | | | | | | | | | | | | CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* Merge remote-tracking branch 'jliu/or32' into stagingAnthony Liguori2013-07-261-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | # By Jia Liu # Via Jia Liu * jliu/or32: target-openrisc: Free typename in openrisc_cpu_class_by_name hw/openrisc: Use stderr output instead of qemu_log hw/openrisc: Indent typo Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * target-openrisc: Free typename in openrisc_cpu_class_by_nameJia Liu2013-07-231-0/+1
| | | | | | | | | | | | | | We should free typename here. Signed-off-by: Jia Liu <proljc@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
* | cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber2013-07-233-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* | cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-3/+4
| | | | | | | | | | | | | | Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
* | cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-231-5/+0Star
| | | | | | | | | | | | | | Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
* | cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber2013-07-231-0/+8
|/ | | | | | | This moves setting the Program Counter from gdbstub into target code. Use vaddr type as upper-bound replacement for target_ulong. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move reset logging to CPUStateAndreas Färber2013-07-091-5/+0Star
| | | | | | | | | | | x86 was using additional CPU_DUMP_* flags, so make that configurable in CPUClass::reset_dump_flags. This adds reset logging for alpha, unicore32 and xtensa. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber2013-07-092-2/+2
| | | | | | | | | | | | | | | | Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Drop unnecessary dynamic casts in *_env_get_cpu()Andreas Färber2013-07-091-1/+1
| | | | | | | | | | | | | | | | | A transition from CPUFooState to FooCPU can be considered safe, just like FooCPU::env access in the opposite direction. The only benefit of the FOO_CPU() casts would be protection against bogus CPUFooState pointers, but then surrounding code would likely break, too. This should slightly improve interrupt etc. performance when going from CPUFooState to FooCPU. For any additional CPU() casts see 3556c233d931ad5ffa46a35cb25cfc057732ebb8 (qom: allow turning cast debugging off). Reported-by: Anthony Liguori <aliguori@us.ibm.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell2013-07-091-10/+0Star
| | | | | | | | | | | | | The functions cpu_clone_regs() and cpu_set_tls() are not purely CPU related -- they are specific to the TLS ABI for a a particular OS. Move them into the linux-user/ tree where they belong. target-lm32 had entirely unused implementations, since it has no linux-user target; just drop them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-openrisc: Fix typename in openrisc_cpu_class_by_name()Dongxue Zhang2013-07-091-1/+3
| | | | | | | | | | | | | | | | | Commit 478032a93d908e59085c1ac56f10979942e7dc4f (target-openrisc: Rename CPU subtypes) suffixed CPU sub-types with "-or32-cpu" but forgot to update openrisc_cpu_class_by_name(), so that it was still looking for the types without suffix. Make target-openrisc running OK by adding the suffix to the model name. This means it is no longer possible to use -cpu or1200-or32-cpu or -cpu any-or32-cpu though. Cc: qemu-stable@nongnu.org Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Tested-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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