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* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
| | | | | Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
| | | | | | | | | | This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2Star
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+2
| | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-sparc: Add and use CPU_FEATURE_CASASebastian Huber2014-03-121-17/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LEON3 processor has support for the CASA instruction which is normally only available for SPARC V9 processors. Binutils 2.24 and GCC 4.9 will support this instruction for LEON3. GCC uses it to generate C11 atomic operations. The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC64 is not defined use a supervisor data load/store for an ASI of 0x80 in helper_ld_asi()/helper_st_asi(). The supervisor data load/store was choosen according to the LEON3 documentation. The ASI 0x80 is defined in the SPARC V9 manual, Table 12—Address Space Identifiers (ASIs). Here we have: 0x80, ASI_PRIMARY, Unrestricted access, Primary address space. Tested with the following program: #include <assert.h> #include <stdatomic.h> void test(void) { atomic_int a; int e; _Bool b; atomic_store(&a, 1); e = 1; b = atomic_compare_exchange_strong(&a, &e, 2); assert(b); assert(atomic_load(&a) == 2); atomic_store(&a, 3); e = 4; b = atomic_compare_exchange_strong(&a, &e, 5); assert(!b); assert(atomic_load(&a) == 3); } Tested also on a NGMP board with a LEON4 processor. Reviewed-by: Fabien Chouteau <chouteau@adacore.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* SPARC: Fix LEON3 power down instructionSebastian Huber2014-01-151-0/+1
| | | | | | | | | | Synchronize the program counter before the power down helper call otherwise interrupts will return to the wrong context. Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-5/+0Star
| | | | | | No longer needs to be done on a per-target basis. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
| | | | | | | And update all users. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-1/+2
| | | | | | | Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPUAndreas Färber2013-07-091-4/+6
| | | | | | | | | Also use bool type while at it. Prepares for moving singlestep_enabled field to CPUState. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
| | | | | | | | | | The gen_icount_start/end functions are now somewhat misnamed since they are useful for generic "start/end of TB" code, used for more than just icount. Rename them to gen_tb_start/end. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use mul*2 for multiplyRichard Henderson2013-02-231-27/+18Star
| | | | | | Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use official add2/sub2 interfaces for addx/subxRichard Henderson2013-02-231-26/+16Star
| | | | | | Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* SPARC LEON power-down support addedRonald Hecht2013-02-231-0/+5
| | | | | | Signed-off-by: Ronald Hecht <address@hidden> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-3/+3
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-4/+4
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
| | | | | | | | | Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
* target-sparc: Revert setting cpu_dst to gen_dest_gprRichard Henderson2012-10-301-1/+1
| | | | | | | | | | | | There is some read-after-write error within the OP=2 insns which prevents setting cpu_dst to the real output register. Until this is found and fixed, always write to a temporary first. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: fix FMOVr instructionAurelien Jarno2012-10-201-1/+1
| | | | | | | | | Like the MOVr instruction, the FMOVr instruction has the condition encoded between bits 10 and 12. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp0 as a globalRichard Henderson2012-10-201-85/+118
| | | | | | | | | | Subroutines do their own local temporary management. Within disas_sparc_insn we limit the existance of the variable to OP=2 insns, and delay initialization as late as is reasonable for the specific XOP. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make cpu_dst local to OP=2 insnsRichard Henderson2012-10-201-4/+3Star
| | | | | | | And initialize it such that it (may) write directly to rd. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Only use cpu_dst for eventual writes to a gprRichard Henderson2012-10-201-26/+26
| | | | | | | Use cpu_tmp0 for other stuff, like Write Priv Register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove last uses of cpu_tmp64Richard Henderson2012-10-201-11/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp64 use from softint insnsRichard Henderson2012-10-201-6/+6
| | | | | | | | The use of "tl" functions and a tmp64 is logically incompatible. Use cpu_tmp0 instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't use a temporary for gen_dest_fpr_DRichard Henderson2012-10-201-16/+16
| | | | | | | In all cases we don't have write-before-read problems. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove usage of cpu_tmp64 from most helper functionsRichard Henderson2012-10-201-29/+44
| | | | | | | Use a locally allocated temporary instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy ldfsr, stfsrRichard Henderson2012-10-201-20/+17Star
| | | | | | | | Remove the last uses of cpu_tmp32. Unify the code between sparc64 and sparc32 by using the proper "tl" functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Write Priv RegisterRichard Henderson2012-10-201-32/+24Star
| | | | | | | No need to copy to a temporary to store 32 bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson2012-10-201-32/+21Star
| | | | | | | | We don't need another temporary here. Load directly into the register we want to set. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson2012-10-201-14/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Split out get_temp_i32Richard Henderson2012-10-201-12/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make the cpu_addr variable local to load/store handlingRichard Henderson2012-10-201-11/+11
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Cleanup cpu_src[12] allocationRichard Henderson2012-10-201-9/+7Star
| | | | | | | | | | | Now that get_temp_tl is used for get_src[12], we don't need to pre-allocate these temporaries. Fallout from this is moving some assignments around cas/casx to avoid uninitialized variable warnings. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Finish conversion to gen_load_gprRichard Henderson2012-10-201-38/+20Star
| | | | | | | | All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time, make cpu_val a local variable for load/store disassembly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert swap to gen_load/store_gprRichard Henderson2012-10-201-8/+8
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert asi helpers to gen_*_gprRichard Henderson2012-10-201-29/+32
| | | | | | | | Push the DisasContext down so that we can use gen_load/store_gpr in sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use gen_load_gpr in get_src[12]Richard Henderson2012-10-201-46/+29Star
| | | | | | | | This means we can avoid the incoming temporary, though the cleanup of the existing temporaries is not performed in this patch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Conversion to gen_*_gpr, part 1Richard Henderson2012-10-201-243/+177Star
| | | | | | | Only handle the easy cases directly within disas_sparc_insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Add gen_load/store/dest_gprRichard Henderson2012-10-201-0/+52
| | | | | | | Infrastructure to be used to clean up handling of temporaries. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't compute full flags value so oftenRichard Henderson2012-10-131-19/+11Star
| | | | | | | | | Avoid speculatively computing flags before every potentially trapping operation and instead do the flags computation when a trap actually occurs. This gives approximately 30% speedup in emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid unnecessary local temporariesRichard Henderson2012-10-131-21/+9Star
| | | | | | | | Now that save_state never ends a BB, we don't need to copy values into local temps around it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson2012-10-131-18/+40
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fix optimized %icc comparisonsRichard Henderson2012-10-131-0/+1
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize conditionals using SUBCCRichard Henderson2012-10-071-61/+131
| | | | | | | | | Aka "normal" comparisons. We now have the infrastructure to pass back non-boolean results from gen_compare. This will automatically get used by both branches and conditional moves. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fall through from not-taken trapRichard Henderson2012-10-071-5/+7
| | | | | | | | Now that we've cleaned up global temporary allocation, we can continue translating the fallthru path of a conditional trap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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