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* Remove Sun4c, Sun4d and a few CPUsBlue Swirl2013-05-261-122/+0Star
| | | | | | | | | | | Sun4c and Sun4d architectures and related CPUs are not fully implemented (especially Sun4c MMU) and there has been no interest for them. Likewise, a few CPUs (Cypress, Ross etc) are only half implemented. Remove the machines and CPUs, they can be re-added if needed later. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-125-3/+10
| | | | | | | | | | This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-122-3/+6
| | | | | | | | | | Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
| | | | | | | | | | The gen_icount_start/end functions are now somewhat misnamed since they are useful for generic "start/end of TB" code, used for more than just icount. Rename them to gen_tb_start/end. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu: Introduce ENV_OFFSET macrosAndreas Färber2013-03-031-0/+1
| | | | | | | | | | | | Introduce ENV_OFFSET macros which can be used in non-target-specific code that needs to generate TCG instructions which reference CPUState fields given the cpu_env register that TCG targets set up with a pointer to the CPUArchState struct. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use mul*2 for multiplyRichard Henderson2013-02-231-27/+18Star
| | | | | | Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use official add2/sub2 interfaces for addx/subxRichard Henderson2013-02-231-26/+16Star
| | | | | | Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* SPARC LEON power-down support addedRonald Hecht2013-02-235-1/+19
| | | | | | Signed-off-by: Ronald Hecht <address@hidden> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Added LEON MMU ASI mappings and corrected LEON3 MMU masks.Ronald Hecht2013-02-232-2/+8
| | | | | | | | | This patch adds SPARC ASI mappings that are used by the LEON processor.It also corrects the MMU context register and context table pointer mask of the LEON3. Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori2013-02-182-5/+24
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # By Andreas Färber # Via Andreas Färber * afaerber/qom-cpu: (47 commits) target-i386: Split command line parsing out of cpu_x86_register() target-i386: Move cpu_x86_init() target-lm32: Drop unused cpu_lm32_close() prototype target-s390x: Drop unused cpu_s390x_close() prototype spapr_hcall: Replace open-coded CPU loop with qemu_get_cpu() ppce500_spin: Replace open-coded CPU loop with qemu_get_cpu() e500: Replace open-coded loop with qemu_get_cpu() cpu: Add CPUArchState pointer to CPUState cputlb: Pass CPUState to cpu_unlink_tb() cpu: Move current_tb field to CPUState cpu: Move exit_request field to CPUState cpu: Move running field to CPUState cpu: Move host_tid field to CPUState target-cris: Introduce CRISCPU subclasses target-m68k: Pass M68kCPU to m68k_set_irq_level() mcf_intc: Pass M68kCPU to mcf_intc_init() mcf5206: Pass M68kCPU to mcf5206_init() target-m68k: Return M68kCPU from cpu_m68k_init() ppc405_uc: Pass PowerPCCPU to ppc40x_{core,chip,system}_reset() target-xtensa: Move TCG initialization to XtensaCPU initfn ...
| * cpu: Add CPUArchState pointer to CPUStateAndreas Färber2013-02-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-sparc: Move TCG initialization to SPARCCPU initfnAndreas Färber2013-02-161-4/+4
| | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-sparc: Introduce QOM realizefn for SPARCCPUAndreas Färber2013-02-162-1/+18
| | | | | | | | | | | | Introduce realizefn and set realized = true in cpu_sparc_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-sparc: Fix debug output for DEBUG_MMUAndreas Färber2013-02-161-1/+1
|/ | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu: do not use object_deletePaolo Bonzini2013-02-011-1/+1
| | | | | | | | CPUs are never added to the composition tree, so delete is achieved simply by removing the last references to them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-1/+1
| | | | | | | | | | | | | Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* fpu: move public header file to include/fpuPaolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: move include files to include/sysemu/Paolo Bonzini2012-12-192-2/+2
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* misc: move include files to include/qemu/Paolo Bonzini2012-12-193-3/+3
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qom: move include files to include/qom/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-195-12/+12
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: refactor cpu_restore_stateBlue Swirl2012-12-163-25/+12Star
| | | | | | | | Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori2012-12-101-1/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * stefanha/trivial-patches: pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error path qemu-options: Fix space at EOL Fix spelling in comments and documentation Clean up pci_drive_hot_add()'s use of BlockInterfaceType arm: a9mpcore: remove un-used ptimer_iomem field target-sparc: Remove t0, t1 from CPUSPARCState target-m68k: Remove t1 from CPUM68KState target-alpha: Remove t0, t1 from CPUAlphaState s390x: Spelling fixes (endianess -> endianness, occured -> occurred) Fix comments (adress -> address, layed -> laid, wierd -> weird) Fix spelling (prefered -> preferred) configure: Remove stray debug output sd: Send debug printfery to stderr not stdout Conflicts: configure Resolve spelling conflict in configure. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * target-sparc: Remove t0, t1 from CPUSPARCStateRichard Henderson2012-12-071-1/+0Star
| | | | | | | | | | | | | | | | These fields are no longer used. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
| | | | | | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
| | | | | | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
|/ | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-3/+3
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-4/+4
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
| | | | | | | | | Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
* Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl2012-11-032-5/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'trivial-patches' of git://github.com/stefanha/qemu: pc: Drop redundant test for ROM memory region exec: make some functions static target-ppc: make some functions static ppc: add missing static vnc: add missing static vl.c: add missing static target-sparc: make do_unaligned_access static m68k: Return semihosting errno values correctly cadence_uart: More debug information Conflicts: target-m68k/m68k-semi.c
| * target-sparc: make do_unaligned_access staticBlue Swirl2012-11-012-5/+6
| | | | | | | | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
|/ | | | | | | | | | For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
* target-sparc: Revert setting cpu_dst to gen_dest_gprRichard Henderson2012-10-301-1/+1
| | | | | | | | | | | | There is some read-after-write error within the OP=2 insns which prevents setting cpu_dst to the real output register. Until this is found and fixed, always write to a temporary first. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: rename helper flagsAurelien Jarno2012-10-281-25/+25
| | | | | | | | | Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-233-39/+39
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-sparc: fix FMOVr instructionAurelien Jarno2012-10-201-1/+1
| | | | | | | | | Like the MOVr instruction, the FMOVr instruction has the condition encoded between bits 10 and 12. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp0 as a globalRichard Henderson2012-10-201-85/+118
| | | | | | | | | | Subroutines do their own local temporary management. Within disas_sparc_insn we limit the existance of the variable to OP=2 insns, and delay initialization as late as is reasonable for the specific XOP. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make cpu_dst local to OP=2 insnsRichard Henderson2012-10-201-4/+3Star
| | | | | | | And initialize it such that it (may) write directly to rd. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Only use cpu_dst for eventual writes to a gprRichard Henderson2012-10-201-26/+26
| | | | | | | Use cpu_tmp0 for other stuff, like Write Priv Register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove last uses of cpu_tmp64Richard Henderson2012-10-201-11/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp64 use from softint insnsRichard Henderson2012-10-201-6/+6
| | | | | | | | The use of "tl" functions and a tmp64 is logically incompatible. Use cpu_tmp0 instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't use a temporary for gen_dest_fpr_DRichard Henderson2012-10-201-16/+16
| | | | | | | In all cases we don't have write-before-read problems. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove usage of cpu_tmp64 from most helper functionsRichard Henderson2012-10-201-29/+44
| | | | | | | Use a locally allocated temporary instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy ldfsr, stfsrRichard Henderson2012-10-201-20/+17Star
| | | | | | | | Remove the last uses of cpu_tmp32. Unify the code between sparc64 and sparc32 by using the proper "tl" functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Write Priv RegisterRichard Henderson2012-10-201-32/+24Star
| | | | | | | No need to copy to a temporary to store 32 bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson2012-10-201-32/+21Star
| | | | | | | | We don't need another temporary here. Load directly into the register we want to set. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson2012-10-201-14/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Split out get_temp_i32Richard Henderson2012-10-201-12/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>