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* qemu-log: use LOG_UNIMP for some target CPU casesBlue Swirl2012-06-211-32/+48
| | | | | | | Use LOG_UNIMP for some target CPU cases. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Alexander Graf <agraf@suse.de>
* build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini2012-06-071-1/+2
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* build: move libobj-y variable to nested Makefile.objsPaolo Bonzini2012-06-071-1/+7
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini2012-06-071-0/+1
| | | | | | Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Kill off cpu_state_reset()Andreas Färber2012-06-041-5/+0Star
| | | | | | | | | | | | | | | | | In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Let cpu_sparc_init() return SPARCCPUAndreas Färber2012-06-042-5/+16
| | | | | | | | | | | Make include paths for cpu-qom.h consistent, so that SPARCCPU can be used in cpu.h. Turn cpu_init macro into a static inline function returning CPUSPARCState for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Blue Swirl <blauwirbel@gmail.com>
* fix block loads broken in commit 30038fd818Artyom Tarasenko2012-05-121-1/+1
| | | | | | | | | Fix UltraSPARC/JPS1/UA2007 VIS block load instructions broken in 30038fd81808f7c3bca92be2369e74c8ca7b3d69. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: trimmed unwanted part of patch] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Implement address masking for SPARC v9 CPUsArtyom Tarasenko2012-05-121-1/+24
| | | | | | | | | | | | According to UltraSPARC - IIi User's manual: 14.1.11 Address Masking (Impdep #125) When PSTATE.AM=1, the CALL, JMPL, and RDPC instructions and all traps transmit zero in the high-order 32-bits of the PC to their specified destination registers. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc: fix qtestBlue Swirl2012-04-191-1/+3
| | | | | | Initialize TCG only when enabled. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Use uintptr_t for various op related functionsBlue Swirl2012-04-142-8/+6Star
| | | | | | | | | Use uintptr_t instead of void * or unsigned long in several op related functions, env->mem_io_pc and GETPC() macro. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: QOM'ify CPUAndreas Färber2012-04-073-9/+135
| | | | | | | | | | | | Embed CPUSPARCState as first member of SPARCCPU. Drop cpu_sparc_close() in favor of object_delete() and a finalizer. Let cpu_state_reset() call cpu_reset(). Make TYPE_SPARC_CPU non-abstract for now. Distinguish between "sparc-cpu" and "sparc64-cpu". Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Rename cpu_init.cAndreas Färber2012-04-071-0/+0
| | | | | | | Align QOM'ified targets, with a view to simplify Makefile.target. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc: pass page aligned addresses to tlb_set_pageBlue Swirl2012-03-271-11/+8Star
| | | | | | | | Mask incoming page address early so that resolved addresses are page aligned. Remove further address masking. Tested-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Add compiler attribute to some functions which don't returnStefan Weil2012-03-242-3/+4
| | | | | | | | helper_raise_exception does not return, nor does do_unaligned_access. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl2012-03-184-265/+77Star
| | | | | | | | | Adjust generation of load and store templates so that the functions take a parameter for CPUState instead of relying on global env. Remove wrappers. Move remaining memory helpers to ldst_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 for memory access helpersBlue Swirl2012-03-185-225/+387
| | | | | | | Make memory access helpers take a parameter for CPUState instead of relying on global env. Introduce wrappers for load and store ops. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc64: implement PCI and ISA irqsBlue Swirl2012-03-172-6/+17
| | | | | | | Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc: reset CPU state on resetBlue Swirl2012-03-172-2/+4
| | | | | | | Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
| | | | | | | | | | | | | Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* target-sparc: Don't overuse CPUStateAndreas Färber2012-03-1413-208/+208
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc] sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* target-sparc: Typedef struct CPUSPARCState earlyAndreas Färber2012-03-141-2/+4
| | | | | | | Will be needed for qemu_irq_ack callback. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* Rename cpu_reset() to cpu_state_reset()Andreas Färber2012-03-141-1/+1
| | | | | | | | | | Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* target-sparc: Fix mixup of uint64 and uint64_tAndreas Färber2012-01-221-1/+1
| | | | | | | | | | | | | Commit 793a137a41ad4125011c7022cf16a1baa40a5ab6 (target-sparc: Implement BMASK/BSHUFFLE.) introduced a stray usage of softfloat uint64 type. Use uint64_t instead. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc: avoid cpu_get_physical_page_desc()Avi Kivity2012-01-031-1/+4
| | | | | | | This reaches into the innards of the memory core, which are being changed. Switch to a memory API version. Signed-off-by: Avi Kivity <avi@redhat.com>
* fix spelling in target sub directoryDong Xu Wang2011-12-021-1/+1
| | | | | | | | | | | Cc: Richard Henderson <rth@twiddle.net> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* Improve "ta 0" shutdownFabien Chouteau2011-11-194-18/+9Star
| | | | | | | | This patch replace the previous implementation with this simplified and more complete version (no shutdown when psret == 1). Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Implement FALIGNDATA inline.Richard Henderson2011-10-263-19/+26
| | | | | | This is a relatively simple sequence of shifts. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Implement BMASK/BSHUFFLE.Richard Henderson2011-10-263-4/+40
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Implement ALIGNADDR* inline.Richard Henderson2011-10-263-14/+22
| | | | | | | | While ALIGNADDR was implemented out-of-line, ALIGNADDRL was not implemeneted at all. However, this is a very simple operation so we're better off doing this inline. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Implement EDGE* instructions.Richard Henderson2011-10-261-2/+175
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Implement fpack{16,32,fix}.Richard Henderson2011-10-263-1/+96
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Implement PDIST.Richard Henderson2011-10-263-2/+41
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Do exceptions management fully inside the helpers.Richard Henderson2011-10-263-91/+146
| | | | | | | | This reduces the size of the individual translation blocks, since we only emit a single call for each FOP rather than three. In addition, clear_float_exceptions expands inline to a single byte store. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Change fpr representation to doubles.Richard Henderson2011-10-265-140/+114Star
| | | | | | | | This allows a more efficient representation for 64-bit hosts. It should be about the same for 32-bit hosts, as we can still access the individual pieces of the double. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Undo cpu_fpr rename.Richard Henderson2011-10-261-28/+28
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Extract float128 move to a function.Richard Henderson2011-10-261-32/+18Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Extract common code for floating-point operations.Richard Henderson2011-10-261-454/+381Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Make FPU/VIS helpers const when possible.Richard Henderson2011-10-264-92/+78Star
| | | | | | This also removes the unused ENV parameter from these helpers. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson2011-10-266-449/+381Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Add accessors for double-precision fpr access.Richard Henderson2011-10-261-112/+130
| | | | | | | | | Begin using i64 quantities to manipulate double-precision values. On a 64-bit host this will, for the moment, generate less efficient code; on a 32-bit host code quality should be largely unchanged. Code quality for 64-bit will be adjusted with a subsequent patch. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Mark fprs dirty in store accessor.Richard Henderson2011-10-261-46/+8Star
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-sparc: Add accessors for single-precision fpr access.Richard Henderson2011-10-261-195/+337
| | | | | | | | | | | | | Load, store, and "create destination". This version attempts to change the behaviour of the translator as little as possible. We previously used cpu_tmp32 as the temporary destination, and we continue to use that. This will eventually allow a change in representation of the fprs. Change the name of the cpu_fpr array to make certain that all instances are converted. Signed-off-by: Richard Henderson <rth@twiddle.net>
* Sparc: split load and store op helpersBlue Swirl2011-10-262-2416/+2434
| | | | | | | Move load and store op helpers top ldst_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: convert win_helper to trace frameworkBlue Swirl2011-10-261-22/+8Star
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: convert interrupt helpers to trace frameworkBlue Swirl2011-10-262-26/+16Star
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: convert mmu_helper to trace frameworkBlue Swirl2011-10-261-44/+20Star
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: split MMU helpersBlue Swirl2011-10-263-860/+879
| | | | | | | Move MMU helpers to mmu_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: fix coding style in helper.cBlue Swirl2011-10-261-43/+52
| | | | | | | Before the next patch, fix coding style of the areas affected. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 for division op helpersBlue Swirl2011-10-264-82/+88
| | | | | | | | Make [su]div{,cc} helpers take a parameter for CPUState instead of relying on global env. Move the functions to helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl2011-10-266-107/+117
| | | | | | | | | Make softint op helpers and Leon cache irq manager take a parameter for CPUState instead of relying on global env. Move the functions to int{32,64}_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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