| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | accel/tcg: Remove TranslatorOps.breakpoint_check | Richard Henderson | 2021-07-21 | 1 | -2/+0 |
| * | target/arm: Implement MVE VLDR/VSTR (non-widening forms) | Peter Maydell | 2021-06-21 | 1 | -0/+2 |
| * | target/arm: Implement bfloat widening fma (indexed) | Richard Henderson | 2021-06-03 | 1 | -0/+2 |
| * | target/arm: Implement bfloat widening fma (vector) | Richard Henderson | 2021-06-03 | 1 | -0/+3 |
| * | target/arm: Implement bfloat16 matrix multiply accumulate | Richard Henderson | 2021-06-03 | 1 | -0/+3 |
| * | target/arm: Implement bfloat16 dot product (indexed) | Richard Henderson | 2021-06-03 | 1 | -0/+2 |
| * | target/arm: Implement bfloat16 dot product (vector) | Richard Henderson | 2021-06-03 | 1 | -0/+3 |
| * | target/arm: Implement vector float32 to bfloat16 conversion | Richard Henderson | 2021-06-03 | 1 | -0/+1 |
| * | target/arm: Implement scalar float32 to bfloat16 conversion | Richard Henderson | 2021-06-03 | 1 | -0/+1 |
| * | target/arm: Implement integer matrix multiply accumulate | Richard Henderson | 2021-05-25 | 1 | -0/+7 |
| * | target/arm: Implement SVE2 fp multiply-add long | Stephen Long | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE mixed sign dot product | Richard Henderson | 2021-05-25 | 1 | -0/+1 |
| * | target/arm: Implement SVE mixed sign dot product (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 saturating multiply high (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+14 |
| * | target/arm: Implement SVE2 signed saturating doubling multiply high | Richard Henderson | 2021-05-25 | 1 | -0/+10 |
| * | target/arm: Pass separate addend to FCMLA helpers | Richard Henderson | 2021-05-25 | 1 | -10/+10 |
| * | target/arm: Pass separate addend to {U, S}DOT helpers | Richard Henderson | 2021-05-25 | 1 | -9/+13 |
| * | target/arm: Implement SVE2 XAR | Richard Henderson | 2021-05-25 | 1 | -0/+2 |
| * | target/arm: Implement SVE2 saturating multiply-add high | Richard Henderson | 2021-05-25 | 1 | -0/+17 |
| * | target/arm: Implement SVE2 Integer Multiply - Unpredicated | Richard Henderson | 2021-05-25 | 1 | -0/+10 |
| * | target/arm: Fix neon VTBL/VTBX for len > 1 | Richard Henderson | 2020-11-10 | 1 | -1/+1 |
| * | target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest | Peter Maydell | 2020-10-20 | 1 | -0/+13 |
| * | target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations | Peter Maydell | 2020-09-01 | 1 | -0/+10 |
| * | target/arm: Implement fp16 for Neon VRINTX | Peter Maydell | 2020-09-01 | 1 | -0/+3 |
| * | target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode | Peter Maydell | 2020-09-01 | 1 | -1/+3 |
| * | target/arm: Implement fp16 for Neon VCVT with rounding modes | Peter Maydell | 2020-09-01 | 1 | -0/+5 |
| * | target/arm: Implement fp16 for Neon VCVT fixed-point | Peter Maydell | 2020-09-01 | 1 | -0/+5 |
| * | target/arm: Convert Neon VCVT fixed-point to gvec | Peter Maydell | 2020-09-01 | 1 | -0/+5 |
| * | target/arm: Implement fp16 for Neon float-integer VCVT | Peter Maydell | 2020-09-01 | 1 | -0/+9 |
| * | target/arm: Implement fp16 for Neon pairwise fp ops | Peter Maydell | 2020-09-01 | 1 | -0/+7 |
| * | target/arm: Implement fp16 for Neon VRSQRTS | Peter Maydell | 2020-09-01 | 1 | -1/+3 |
| * | target/arm: Implement fp16 for Neon VRECPS | Peter Maydell | 2020-09-01 | 1 | -1/+3 |
| * | target/arm: Implement fp16 for Neon fp compare-vs-0 | Peter Maydell | 2020-09-01 | 1 | -0/+15 |
| * | target/arm: Implement fp16 for Neon VFMA, VMFS | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement fp16 for Neon VMLA, VMLS operations | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement fp16 for Neon VMAXNM, VMINNM | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement fp16 for Neon VMAX, VMIN | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement fp16 for VACGE, VACGT | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons | Peter Maydell | 2020-09-01 | 1 | -0/+9 |
| * | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell | 2020-09-01 | 1 | -0/+1 |
| * | target/arm: Implement VFP fp16 VRINT* | Peter Maydell | 2020-09-01 | 1 | -0/+2 |
| * | target/arm: Use macros instead of open-coding fp16 conversion helpers | Peter Maydell | 2020-09-01 | 1 | -0/+6 |
| * | target/arm: Implement VFP fp16 VCMP | Peter Maydell | 2020-09-01 | 1 | -0/+2 |
| * | target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT | Peter Maydell | 2020-09-01 | 1 | -0/+2 |
| * | target/arm: Implement VFP fp16 for fused-multiply-add | Peter Maydell | 2020-09-01 | 1 | -0/+1 |
| * | target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL | Peter Maydell | 2020-09-01 | 1 | -0/+1 |
| * | target/arm: Implement VFP fp16 for VFP_BINOP operations | Peter Maydell | 2020-09-01 | 1 | -0/+8 |
| * | target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 1 | -0/+10 |
| * | target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 1 | -0/+14 |
| * | target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 1 | -0/+4 |
