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* target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetreePeter Maydell2020-05-141-0/+5
* target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetreePeter Maydell2020-05-141-0/+8
* target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetreePeter Maydell2020-05-141-0/+3
* target/arm: Convert Neon VPADD 3-reg-same insns to decodetreePeter Maydell2020-05-141-0/+2
* target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetreePeter Maydell2020-05-141-0/+9
* target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetreePeter Maydell2020-05-141-6/+24
* target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetreePeter Maydell2020-05-141-0/+6
* target/arm: Convert Neon VABA/VABD 3-reg-same to decodetreePeter Maydell2020-05-141-0/+6
* target/arm: Convert Neon VHADD 3-reg-same insnsPeter Maydell2020-05-141-0/+2
* target/arm: Convert Neon 64-bit element 3-reg-same insnsPeter Maydell2020-05-141-0/+13
* target/arm: Convert Neon 3-reg-same SHA to decodetreePeter Maydell2020-05-141-0/+10
* target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetreePeter Maydell2020-05-141-0/+3
* target/arm: Swap argument order for VSHL during decodeRichard Henderson2020-05-141-2/+15
* target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetreePeter Maydell2020-05-041-0/+9
* target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetreePeter Maydell2020-05-041-0/+6
* target/arm: Convert Neon 3-reg-same comparisons to decodetreePeter Maydell2020-05-041-0/+8
* target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetreePeter Maydell2020-05-041-0/+5
* target/arm: Convert Neon 3-reg-same logic ops to decodetreePeter Maydell2020-05-041-0/+12
* target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetreePeter Maydell2020-05-041-0/+17
* target/arm: Add stubs for AArch32 Neon decodetreePeter Maydell2020-05-041-0/+29
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