| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| | * | target/arm: Make VFP_CONV_FIX macros take separate float type and float size | Peter Maydell | 2020-09-01 | 1 | -23/+23 |
| | * | target/arm: Implement VFP fp16 VCVT between float and integer | Peter Maydell | 2020-09-01 | 2 | -0/+69 |
| | * | target/arm: Implement VFP fp16 VLDR and VSTR | Peter Maydell | 2020-09-01 | 2 | -2/+36 |
| | * | target/arm: Implement VFP fp16 VCMP | Peter Maydell | 2020-09-01 | 4 | -7/+51 |
| | * | target/arm: Implement VFP fp16 for VMOV immediate | Peter Maydell | 2020-09-01 | 2 | -0/+24 |
| | * | target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT | Peter Maydell | 2020-09-01 | 4 | -0/+55 |
| | * | target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() | Peter Maydell | 2020-09-01 | 1 | -35/+14 |
| | * | target/arm: Implement VFP fp16 for fused-multiply-add | Peter Maydell | 2020-09-01 | 4 | -0/+77 |
| | * | target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS | Peter Maydell | 2020-09-01 | 1 | -37/+13 |
| | * | target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL | Peter Maydell | 2020-09-01 | 4 | -0/+95 |
| | * | target/arm: Implement VFP fp16 for VFP_BINOP operations | Peter Maydell | 2020-09-01 | 5 | -0/+106 |
| | * | target/arm: Use correct ID register check for aa32_fp16_arith | Peter Maydell | 2020-09-01 | 1 | -6/+1 |
| | * | target/arm: Remove local definitions of float constants | Peter Maydell | 2020-09-01 | 3 | -19/+0 |
| * | | target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_mis... | Chen Qun | 2020-09-01 | 1 | -3/+0 |
| * | | target/arm/translate-a64:Remove dead assignment in handle_scalar_simd_shli() | Chen Qun | 2020-09-01 | 1 | -2/+2 |
| * | | target/arm/kvm: Remove superfluous break | Liao Pingfang | 2020-09-01 | 1 | -1/+0 |
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| * | target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 3 | -10/+81 |
| * | target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 3 | -0/+73 |
| * | target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd | Richard Henderson | 2020-08-28 | 3 | -4/+45 |
| * | target/arm: Generalize inl_qrdmlah_* helper functions | Richard Henderson | 2020-08-28 | 1 | -51/+29 |
| * | target/arm: Tidy SVE tszimm shift formats | Richard Henderson | 2020-08-28 | 1 | -19/+16 |
| * | target/arm: Split out gen_gvec_ool_zz | Richard Henderson | 2020-08-28 | 1 | -8/+12 |
| * | target/arm: Split out gen_gvec_ool_zzz | Richard Henderson | 2020-08-28 | 1 | -35/+18 |
| * | target/arm: Split out gen_gvec_ool_zzp | Richard Henderson | 2020-08-28 | 1 | -15/+14 |
| * | target/arm: Merge helper_sve_clr_* and helper_sve_movz_* | Richard Henderson | 2020-08-28 | 3 | -92/+32 |
| * | target/arm: Split out gen_gvec_ool_zzzp | Richard Henderson | 2020-08-28 | 1 | -19/+16 |
| * | target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp | Richard Henderson | 2020-08-28 | 1 | -23/+8 |
| * | target/arm: Clean up 4-operand predicate expansion | Richard Henderson | 2020-08-28 | 1 | -68/+43 |
| * | target/arm: Merge do_vector2_p into do_mov_p | Richard Henderson | 2020-08-28 | 1 | -13/+6 |
| * | target/arm: Rearrange {sve,fp}_check_access assert | Richard Henderson | 2020-08-28 | 2 | -11/+17 |
| * | target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn | Richard Henderson | 2020-08-28 | 1 | -19/+24 |
| * | target/arm: Split out gen_gvec_fn_zz | Richard Henderson | 2020-08-28 | 1 | -9/+10 |
| * | target/arm: Fill in the WnR syndrome bit in mte_check_fail | Richard Henderson | 2020-08-28 | 1 | -4/+5 |
| * | target/arm: Pass the entire mte descriptor to mte_check_fail | Richard Henderson | 2020-08-28 | 1 | -5/+5 |
| * | target/arm: Clarify HCR_EL2 ARMCPRegInfo type | Philippe Mathieu-Daudé | 2020-08-28 | 1 | -1/+0 |
| * | target/arm: Use correct FPST for VCMLA, VCADD on fp16 | Peter Maydell | 2020-08-24 | 1 | -3/+3 |
| * | target/arm: Implement FPST_STD_F16 fpstatus | Peter Maydell | 2020-08-24 | 4 | -2/+18 |
| * | target/arm: Make A32/T32 use new fpstatus_ptr() API | Peter Maydell | 2020-08-24 | 3 | -49/+36 |
| * | target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() | Peter Maydell | 2020-08-24 | 4 | -72/+103 |
| * | target/arm: Delete unused ARM_FEATURE_CRC | Peter Maydell | 2020-08-24 | 1 | -1/+0 |
| * | target/arm/translate.c: Delete/amend incorrect comments | Peter Maydell | 2020-08-24 | 1 | -2/+2 |
| * | target/arm: Delete unused VFP_DREG macros | Peter Maydell | 2020-08-24 | 1 | -15/+0 |
| * | target/arm: Remove ARCH macro | Peter Maydell | 2020-08-24 | 1 | -5/+9 |
| * | target/arm: Convert T32 coprocessor insns to decodetree | Peter Maydell | 2020-08-24 | 2 | -62/+21 |
| * | target/arm: Do M-profile NOCP checks early and via decodetree | Peter Maydell | 2020-08-24 | 5 | -27/+100 |
| * | target/arm: Tidy up disas_arm_insn() | Peter Maydell | 2020-08-24 | 1 | -17/+9 |
| * | target/arm: Convert A32 coprocessor insns to decodetree | Peter Maydell | 2020-08-24 | 3 | -11/+111 |
| * | target/arm: Separate decode from handling of coproc insns | Peter Maydell | 2020-08-24 | 1 | -32/+44 |
| * | target/arm: Pull handling of XScale insns out of disas_coproc_insn() | Peter Maydell | 2020-08-24 | 1 | -15/+29 |
| * | meson: target | Paolo Bonzini | 2020-08-21 | 2 | -89/+62 |
