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| * target/arm: Implement fp16 for Neon VRINTXPeter Maydell2020-09-013-42/+9Star
| * target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-modePeter Maydell2020-09-014-79/+30Star
| * target/arm: Implement fp16 for Neon VCVT with rounding modesPeter Maydell2020-09-013-67/+66Star
| * target/arm: Implement fp16 for Neon VCVT fixed-pointPeter Maydell2020-09-014-1/+21
| * target/arm: Convert Neon VCVT fixed-point to gvecPeter Maydell2020-09-013-17/+43
| * target/arm: Implement fp16 for Neon float-integer VCVTPeter Maydell2020-09-013-11/+42
| * target/arm: Implement fp16 for Neon pairwise fp opsPeter Maydell2020-09-013-26/+68
| * target/arm: Implement fp16 for Neon VRSQRTSPeter Maydell2020-09-014-36/+34Star
| * target/arm: Implement fp16 for Neon VRECPSPeter Maydell2020-09-014-34/+35
| * target/arm: Implement fp16 for Neon fp compare-vs-0Peter Maydell2020-09-013-28/+45
| * target/arm: Implement fp16 for Neon VFMA, VMFSPeter Maydell2020-09-013-91/+40Star
| * target/arm: Implement fp16 for Neon VMLA, VMLS operationsPeter Maydell2020-09-013-31/+50
| * target/arm: Implement fp16 for Neon VMAXNM, VMINNMPeter Maydell2020-09-013-8/+27
| * target/arm: Implement fp16 for Neon VMAX, VMINPeter Maydell2020-09-013-3/+14
| * target/arm: Implement fp16 for VACGE, VACGTPeter Maydell2020-09-013-2/+34
| * target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisonsPeter Maydell2020-09-013-3/+56
| * target/arm: Implement fp16 for Neon VABS, VNEG of floatsPeter Maydell2020-09-011-6/+28
| * target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvecPeter Maydell2020-09-011-2/+29
| * target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMULPeter Maydell2020-09-013-17/+26
| * target/arm: Implement VFP fp16 VMOV between gp and halfprec registersPeter Maydell2020-09-012-0/+35
| * target/arm: Implement new VFP fp16 insn VMOVXPeter Maydell2020-09-012-0/+28
| * target/arm: Implement new VFP fp16 insn VINSPeter Maydell2020-09-012-0/+31
| * target/arm: Implement VFP fp16 VRINT*Peter Maydell2020-09-015-8/+122
| * target/arm: Implement VFP fp16 VSELPeter Maydell2020-09-012-6/+16
| * target/arm: Implement VFP vp16 VCVT-with-specified-rounding-modePeter Maydell2020-09-012-10/+28
| * target/arm: Implement VFP fp16 VCVT between float and fixed-pointPeter Maydell2020-09-012-0/+61
| * target/arm: Use macros instead of open-coding fp16 conversion helpersPeter Maydell2020-09-012-80/+12Star
| * target/arm: Make VFP_CONV_FIX macros take separate float type and float sizePeter Maydell2020-09-011-23/+23
| * target/arm: Implement VFP fp16 VCVT between float and integerPeter Maydell2020-09-012-0/+69
| * target/arm: Implement VFP fp16 VLDR and VSTRPeter Maydell2020-09-012-2/+36
| * target/arm: Implement VFP fp16 VCMPPeter Maydell2020-09-014-7/+51
| * target/arm: Implement VFP fp16 for VMOV immediatePeter Maydell2020-09-012-0/+24
| * target/arm: Implement VFP fp16 for VABS, VNEG, VSQRTPeter Maydell2020-09-014-0/+55
| * target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp()Peter Maydell2020-09-011-35/+14Star
| * target/arm: Implement VFP fp16 for fused-multiply-addPeter Maydell2020-09-014-0/+77
| * target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMSPeter Maydell2020-09-011-37/+13Star
| * target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMULPeter Maydell2020-09-014-0/+95
| * target/arm: Implement VFP fp16 for VFP_BINOP operationsPeter Maydell2020-09-015-0/+106
| * target/arm: Use correct ID register check for aa32_fp16_arithPeter Maydell2020-09-011-6/+1Star
| * target/arm: Remove local definitions of float constantsPeter Maydell2020-09-013-19/+0Star
* | target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_mis...Chen Qun2020-09-011-3/+0Star
* | target/arm/translate-a64:Remove dead assignment in handle_scalar_simd_shli()Chen Qun2020-09-011-2/+2
* | target/arm/kvm: Remove superfluous breakLiao Pingfang2020-09-011-1/+0Star
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* target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimdRichard Henderson2020-08-283-10/+81
* target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimdRichard Henderson2020-08-283-0/+73
* target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimdRichard Henderson2020-08-283-4/+45
* target/arm: Generalize inl_qrdmlah_* helper functionsRichard Henderson2020-08-281-51/+29Star
* target/arm: Tidy SVE tszimm shift formatsRichard Henderson2020-08-281-19/+16Star
* target/arm: Split out gen_gvec_ool_zzRichard Henderson2020-08-281-8/+12
* target/arm: Split out gen_gvec_ool_zzzRichard Henderson2020-08-281-35/+18Star
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-15 19:53:45 +0100