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* Hexagon HVX (target/hexagon) macrosTaylor Simpson2021-11-031-0/+22
| | | | | | | | macros to interface with the generator macros referenced in instruction semantics Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
* Hexagon (target/hexagon) put writes to USR into temp until commitTaylor Simpson2021-10-291-1/+1
| | | | | | | | | | | | | | | Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR]. Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c Test case added in tests/tcg/hexagon/overflow.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
* Hexagon (target/hexagon) more tcg_constant_*Taylor Simpson2021-10-291-4/+3Star
| | | | | | | | | | | | | | Change additional tcg_const_tl to tcg_constant_tl Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl. However, it is not constant throughout, so we initialize it with tcg_temp_new and replace the first use with the constant value. Inspired-by: Richard Henderson <richard.henderson@linaro.org> Inspired-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
* target/hexagon: Use tcg_constant_*Philippe Mathieu-Daudé2021-10-061-2/+1Star
| | | | | | | | | | Replace uses of tcg_const_* with the allocate and free close together. Inspired-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-3-f4bug@amsat.org>
* target/hexagon: Remove unused TCG temporary from predicated loadsPhilippe Mathieu-Daudé2021-10-061-2/+0Star
| | | | | | | | | | The gen_pred_cancel() function, introduced in commit a646e99cb90 (Hexagon macros) doesn't use the 'one' TCG temporary; remove it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-2-f4bug@amsat.org>
* Hexagon (target/hexagon) cleanup gen_store_conditional[48] functionsTaylor Simpson2021-06-291-2/+1Star
| | | | | | | | | | | | | | | Previously the store-conditional code was writing to hex_pred[prednum]. Then, the fGEN_TCG override was reading from there to the destination variable so that the packet commit logic would handle it properly. The correct implementation is to write to the destination variable and don't have the extra read in the override. Remove the unused arguments from gen_store_conditional[48] Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-4-git-send-email-tsimpson@quicinc.com>
* Hexagon (target/hexagon) fix bug in fLSBNEW*Taylor Simpson2021-06-291-17/+10Star
| | | | | | | | | | | | Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1" Remove gen_logical_not function Clean up fLSBNEWNOT to use andi-1 followed by xori-1 Test cases added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-2-git-send-email-tsimpson@quicinc.com>
* Hexagon (target/hexagon) CABAC decode binTaylor Simpson2021-05-021-0/+7
| | | | | | | | | | | | The following instruction is added S2_cabacdecbin Rdd32=decbin(Rss32,Rtt32) Test cases added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-27-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (target/hexagon) load and unpack bytes instructionsTaylor Simpson2021-05-021-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following instructions are added L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1) L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1) L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1) L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1) L4_loadbzw2_ur Rd32 = memubh(Rt32<<#u2+#U6) L4_loadbzw4_ur Rdd32 = memubh(Rt32<<#u2+#U6) L4_loadbsw2_ur Rd32 = membh(Rt32<<#u2+#U6) L4_loadbsw4_ur Rdd32 = membh(Rt32<<#u2+#U6) L4_loadbzw2_ap Rd32 = memubh(Re32=#U6) L4_loadbzw4_ap Rdd32 = memubh(Re32=#U6) L4_loadbsw2_ap Rd32 = membh(Re32=#U6) L4_loadbsw4_ap Rdd32 = membh(Re32=#U6) L2_loadbzw2_pr Rd32 = memubh(Rx32++Mu2) L2_loadbzw4_pr Rdd32 = memubh(Rx32++Mu2) L2_loadbsw2_pr Rd32 = membh(Rx32++Mu2) L2_loadbsw4_pr Rdd32 = membh(Rx32++Mu2) L2_loadbzw2_pbr Rd32 = memubh(Rx32++Mu2:brev) L2_loadbzw4_pbr Rdd32 = memubh(Rx32++Mu2:brev) L2_loadbsw2_pbr Rd32 = membh(Rx32++Mu2:brev) L2_loadbsw4_pbr Rdd32 = membh(Rx32++Mu2:brev) L2_loadbzw2_pi Rd32 = memubh(Rx32++#s4:1) L2_loadbzw4_pi Rdd32 = memubh(Rx32++#s4:1) L2_loadbsw2_pi Rd32 = membh(Rx32++#s4:1) L2_loadbsw4_pi Rdd32 = membh(Rx32++#s4:1) L2_loadbzw2_pci Rd32 = memubh(Rx32++#s4:1:circ(Mu2)) L2_loadbzw4_pci Rdd32 = memubh(Rx32++#s4:1:circ(Mu2)) L2_loadbsw2_pci Rd32 = membh(Rx32++#s4:1:circ(Mu2)) L2_loadbsw4_pci Rdd32 = membh(Rx32++#s4:1:circ(Mu2)) L2_loadbzw2_pcr Rd32 = memubh(Rx32++I:circ(Mu2)) L2_loadbzw4_pcr Rdd32 = memubh(Rx32++I:circ(Mu2)) L2_loadbsw2_pcr Rd32 = membh(Rx32++I:circ(Mu2)) L2_loadbsw4_pcr Rdd32 = membh(Rx32++I:circ(Mu2)) Test cases in tests/tcg/hexagon/load_unpack.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-25-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (target/hexagon) bit reverse (brev) addressingTaylor Simpson2021-05-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The following instructions are added L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev) L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev) L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev) L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev) L2_loadri_pbr Rd32 = memw(Rx32++Mu2:brev) L2_loadrd_pbr Rdd32 = memd(Rx32++Mu2:brev) S2_storerb_pbr memb(Rx32++Mu2:brev).=.Rt32 S2_storerh_pbr memh(Rx32++Mu2:brev).=.Rt32 S2_storerf_pbr memh(Rx32++Mu2:brev).=.Rt.H32 S2_storeri_pbr memw(Rx32++Mu2:brev).=.Rt32 S2_storerd_pbr memd(Rx32++Mu2:brev).=.Rt32 S2_storerinew_pbr memw(Rx32++Mu2:brev).=.Nt8.new S2_storerbnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new S2_storerhnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new Test cases in tests/tcg/hexagon/brev.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-24-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (target/hexagon) circular addressingTaylor Simpson2021-05-021-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following instructions are added L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2)) L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:circ(Mu2)) L2_loadruh_pci Rd32 = memuh(Rx32++#s4:1:circ(Mu2)) L2_loadrh_pci Rd32 = memh(Rx32++#s4:1:circ(Mu2)) L2_loadri_pci Rd32 = memw(Rx32++#s4:2:circ(Mu2)) L2_loadrd_pci Rdd32 = memd(Rx32++#s4:3:circ(Mu2)) S2_storerb_pci memb(Rx32++#s4:0:circ(Mu2)) = Rt32 S2_storerh_pci memh(Rx32++#s4:1:circ(Mu2)) = Rt32 S2_storerf_pci memh(Rx32++#s4:1:circ(Mu2)) = Rt.H32 S2_storeri_pci memw(Rx32++#s4:2:circ(Mu2)) = Rt32 S2_storerd_pci memd(Rx32++#s4:3:circ(Mu2)) = Rtt32 S2_storerbnew_pci memb(Rx32++#s4:0:circ(Mu2)) = Nt8.new S2_storerhnew_pci memw(Rx32++#s4:1:circ(Mu2)) = Nt8.new S2_storerinew_pci memw(Rx32++#s4:2:circ(Mu2)) = Nt8.new L2_loadrub_pcr Rd32 = memub(Rx32++I:circ(Mu2)) L2_loadrb_pcr Rd32 = memb(Rx32++I:circ(Mu2)) L2_loadruh_pcr Rd32 = memuh(Rx32++I:circ(Mu2)) L2_loadrh_pcr Rd32 = memh(Rx32++I:circ(Mu2)) L2_loadri_pcr Rd32 = memw(Rx32++I:circ(Mu2)) L2_loadrd_pcr Rdd32 = memd(Rx32++I:circ(Mu2)) S2_storerb_pcr memb(Rx32++I:circ(Mu2)) = Rt32 S2_storerh_pcr memh(Rx32++I:circ(Mu2)) = Rt32 S2_storerf_pcr memh(Rx32++I:circ(Mu2)) = Rt32.H32 S2_storeri_pcr memw(Rx32++I:circ(Mu2)) = Rt32 S2_storerd_pcr memd(Rx32++I:circ(Mu2)) = Rtt32 S2_storerbnew_pcr memb(Rx32++I:circ(Mu2)) = Nt8.new S2_storerhnew_pcr memh(Rx32++I:circ(Mu2)) = Nt8.new S2_storerinew_pcr memw(Rx32++I:circ(Mu2)) = Nt8.new Test cases in tests/tcg/hexagon/circ.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-23-git-send-email-tsimpson@quicinc.com> [rth: Squash <1619667142-29636-1-git-send-email-tsimpson@quicinc.com> removing gen_read_reg and gen_set_byte to avoid clang Werror.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (target/hexagon) remove unused carry_from_add64 functionTaylor Simpson2021-05-011-2/+0Star
| | | | | | | | Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-9-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTRTaylor Simpson2021-03-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros") Eliminate the following Coverity CIDs (Bad bit shift operation) 325227 325292 325425 325526 325561 325564 325578 325637 325736 325748 325786 325815 325837 Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1614879425-9259-1-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (target/hexagon) macrosTaylor Simpson2021-02-181-0/+592
macros to interface with the generator macros referenced in instruction semantics Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-25-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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