summaryrefslogtreecommitdiffstats
path: root/target/hppa/op_helper.c
Commit message (Collapse)AuthorAgeFilesLines
* exec: Use cpu_untagged_addr in g2h; split out g2h_untaggedRichard Henderson2021-02-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Use g2h_untagged in contexts that have no cpu, e.g. the binary loaders that operate before the primary cpu is created. As a colollary, target_mmap and friends must use untagged addresses, since they are used by the loaders. Use g2h_untagged on values returned from target_mmap, as the kernel never applies a tag itself. Use g2h_untagged on all pc values. The only current user of tags, aarch64, removes tags from code addresses upon branch, so "pc" is always untagged. Use g2h with the cpu context on hand wherever possible. Use g2h_untagged in lock_user, which will be updated soon. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* overall/alpha tcg cpus|hppa: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
| | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023123353.19796-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi2020-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clang's C11 atomic_fetch_*() functions only take a C11 atomic type pointer argument. QEMU uses direct types (int, etc) and this causes a compiler error when a QEMU code calls these functions in a source file that also included <stdatomic.h> via a system header file: $ CC=clang CXX=clang++ ./configure ... && make ../util/async.c:79:17: error: address argument to atomic operation must be a pointer to _Atomic type ('unsigned int *' invalid) Avoid using atomic_*() names in QEMU's atomic.h since that namespace is used by <stdatomic.h>. Prefix QEMU's APIs with 'q' so that atomic.h and <stdatomic.h> can co-exist. I checked /usr/include on my machine and searched GitHub for existing "qatomic_" users but there seem to be none. This patch was generated using: $ git grep -h -o '\<atomic\(64\)\?_[a-z0-9_]\+' include/qemu/atomic.h | \ sort -u >/tmp/changed_identifiers $ for identifier in $(</tmp/changed_identifiers); do sed -i "s%\<$identifier\>%q$identifier%g" \ $(git grep -I -l "\<$identifier\>") done I manually fixed line-wrap issues and misaligned rST tables. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200923105646.47864-1-stefanha@redhat.com>
* softfloat: Name compare relation enumRichard Henderson2020-05-191-3/+4
| | | | | | | | | | Give the previously unnamed enum a typedef name. Use it in the prototypes of compare functions. Use it to hold the results of the compare functions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Allow, but diagnose, LDCW aligned only mod 4Richard Henderson2020-01-271-0/+9
| | | | | | | | | | | | | | | | | The PA-RISC 1.1 specification says that LDCW must be aligned mod 16 or the operation is undefined. However, real hardware only generates an unaligned access trap for unaligned mod 4. Match real hardware, but diagnose with GUEST_ERROR a violation of the specification. At the same time fix a bug in the initialization of mop, where the size was specified twice, and another to free the zero temporary. Tested-by: Helge Deller <deller@gmx.de> Reported-by: Helge Deller <deller@gmx.de> Suggested-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* hppa/tcg: Call probe_write() also for CONFIG_USER_ONLYDavid Hildenbrand2019-09-031-2/+0Star
| | | | | | | | | We now have a variant for CONFIG_USER_ONLY as well. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190826075112.25637-7-david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* sysemu: Split sysemu/runstate.h off sysemu/sysemu.hMarkus Armbruster2019-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | sysemu/sysemu.h is a rather unfocused dumping ground for stuff related to the system-emulator. Evidence: * It's included widely: in my "build everything" tree, changing sysemu/sysemu.h still triggers a recompile of some 1100 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h, down from 5400 due to the previous two commits). * It pulls in more than a dozen additional headers. Split stuff related to run state management into its own header sysemu/runstate.h. Touching sysemu/sysemu.h now recompiles some 850 objects. qemu/uuid.h also drops from 1100 to 850, and qapi/qapi-types-run-state.h from 4400 to 4200. Touching new sysemu/runstate.h recompiles some 500 objects. Since I'm touching MAINTAINERS to add sysemu/runstate.h anyway, also add qemu/main-loop.h. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190812052359.30071-30-armbru@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [Unbreak OS-X build]
* target/hppa: Use env_cpu, env_archcpuRichard Henderson2019-06-101-5/+3Star
| | | | | | | | | | | Cleanup in the boilerplate that each target must define. Replace hppa_env_get_cpu with env_archcpu. The combination CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-1/+1
| | | | | | | | | Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: remove PSW I/R/Q bit checkSven Schnelle2019-03-121-5/+0Star
| | | | | | | | | | HP ODE use rfi to set the Q bit, and i don't see anything in the documentation that this is forbidden. So remove it. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190311191602.25796-6-svens@stackframe.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: add TLB trace eventsSven Schnelle2019-03-121-0/+2
| | | | | | | | | | To ease TLB debugging add a few trace events, which are disabled by default so that there's no performance impact. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190311191602.25796-5-svens@stackframe.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: move GETPC to HELPER() functionsSven Schnelle2019-02-121-10/+6Star
| | | | | | | | | When QEMU is compiled with -O0, these functions are inlined which will cause a wrong restart address generated for the TB. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190211181907.2219-2-svens@stackframe.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: fix PSW Q bit behaviour to match hardwareSven Schnelle2019-02-061-5/+9
| | | | | | | | | | | | | | PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1 with this instruction, if it was not already 1, is an undefined operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1 with the SSM instruction. Tested this both on HP9000/712 and HP9000/785/C3750, both machines set the Q bit from 0 to 1 without exception. This makes HP-UX 10.20 progress a little bit further. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190129191402.29539-1-svens@stackframe.org> [rth: Add a comment to the code as well.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Remove floatX_maybe_silence_nan from conversionsRichard Henderson2018-05-181-2/+0Star
| | | | | | | | This is now handled properly by the generic softfloat code. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-1/+1
| | | | | | | | | | | | | | | | | As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [For PPC parts] Acked-by: David Gibson <david@gibson.dropbear.id.au>
* target/hppa: Implement PROBE for system modeRichard Henderson2018-01-311-11/+23
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement halt and reset instructionsHelge Deller2018-01-311-0/+13
| | | | | | | | | Real hardware would use an external device to control the power. But for the moment let's invent instructions in reserved space, to be used by our custom firmware. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement LPARichard Henderson2018-01-301-5/+5
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement the interval timerRichard Henderson2018-01-301-0/+36
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement IASQRichard Henderson2018-01-301-0/+2
| | | | | | | Any one TB will have only one space value. If we change spaces, we change TBs. Thus BE and BEV must exit the TB immediately. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement rfiRichard Henderson2018-01-301-0/+24
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Implement the system mask instructionsRichard Henderson2018-01-301-0/+14
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Split address size from register sizeRichard Henderson2018-01-301-11/+11
| | | | | | | | | For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Define hardware exception typesRichard Henderson2018-01-301-3/+3
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hppa: Skeleton support for hppa-softmmuHelge Deller2018-01-301-2/+11
| | | | | | | | With the addition of default-configs/hppa-softmmu.mak, this will compile. It is not enabled with this patch, however. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
* target/hppa: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota2017-10-241-4/+28
| | | | | | | | | Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target-hppa: Implement floating-point insnsRichard Henderson2017-01-231-0/+394
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-hppa: Implement system and memory-management insnsRichard Henderson2017-01-231-0/+10
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-hppa: Implement loads and storesRichard Henderson2017-01-231-0/+78
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-hppa: Implement basic arithmeticRichard Henderson2017-01-231-0/+23
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-hppa: Add framework and enable compilationRichard Henderson2017-01-231-0/+65
This is just about the minimum required to enable compilation without actually executing any instructions. This contains the HPPACPU structure and the required callbacks, the gdbstub, the basic translation loop, and a translate_one function that always results in an illegal instruction. Signed-off-by: Richard Henderson <rth@twiddle.net>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 12:26:33 +0100