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* i386: implement IGNNEPaolo Bonzini2019-10-261-7/+27
| | | | | | | | | | | Change the handling of port F0h writes and FPU exceptions to implement IGNNE. The implementation mixes a bit what the chipset and processor do in real hardware, but the effect is the same as what happens with actual FERR# and IGNNE# pins: writing to port F0h asserts IGNNE# in addition to lowering FP_IRQ; while clearing the SE bit in the FPU status word deasserts IGNNE#. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: introduce cpu_set_fpusPaolo Bonzini2019-10-261-4/+8
| | | | | | | In the next patch, this will provide a hook to detect clearing of FSW.ES. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: move FERR handling to target/i386Paolo Bonzini2019-10-261-1/+25
| | | | | | | | Move it out of pc.c since it is strictly tied to TCG. This is almost exclusively code movement, the next patch will implement IGNNE. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: Use env_cpu, env_archcpuRichard Henderson2019-06-101-1/+1
| | | | | | | | | | | Cleanup in the boilerplate that each target must define. Replace x86_env_get_cpu with env_archcpu. The combination CPU(x86_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-0/+1
| | | | | | | | | | | | | | | | | As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [For PPC parts] Acked-by: David Gibson <david@gibson.dropbear.id.au>
* target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inlineYang Zhong2017-07-051-9/+2Star
| | | | | | | | Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific tcg code. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: make cpu_get_fp80()/cpu_set_fp80() staticYang Zhong2017-07-051-18/+0Star
| | | | | | | | | Move cpu_get_fp80()/cpu_set_fp80() from fpu_helper.c to machine.c because fpu_helper.c will be disabled if tcg is disabled in the build. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* linux-user: Add signal handling support for x86_64Pranith Kumar2017-02-271-0/+12
| | | | | | | | | | | | | Note that x86_64 has only _rt signal handlers. This implementation attempts to share code with the x86_32 implementation. CC: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Allan Wirth <awirth@akamai.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20170226165345.8757-1-bobby.prani@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* cputlb: drop flush_global flag from tlb_flushAlex Bennée2017-01-131-1/+1
| | | | | | | | | | | We have never has the concept of global TLB entries which would avoid the flush so we never actually use this flag. Drop it and make clear that tlb_flush is the sledge-hammer it has always been. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> [DG: ppc portions] Acked-by: David Gibson <david@gibson.dropbear.id.au>
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+1625
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>