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* target/m68k: only change valid bits in CACRLaurent Vivier2020-01-071-2/+10
| | | | | | | | | | This is used by netBSD (and MacOS ROM) to detect the MMU type Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20191220172415.35838-1-laurent@vivier.eu> [lv: add a comment before m680x0_cpu_common()] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* m68k comments break patch submission due to being incorrectly formattedLucien Murray-Pitts2019-06-261-6/+10
| | | | | | | | | | Altering all comments in target/m68k to match Qemu coding styles so that future patches wont fail due to style breaches. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190606234125.GA4830@localhost.localdomain> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/m68k: Use env_cpuRichard Henderson2019-06-101-21/+12Star
| | | | | | | | | | | Cleanup in the boilerplate that each target must define. The combination CPU(m68k_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Merge remote-tracking branch 'remotes/vivier/tags/m68k-staging-pull-request' ↵Peter Maydell2019-05-171-17/+67
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging code cleanup, switch to transaction_failed hook # gpg: Signature made Thu 16 May 2019 23:33:00 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-staging-pull-request: target/m68k: Optimize rotate_x() using extract_i32() target/m68k: Fix a tcg_temp leak target/m68k: Reduce the l1 TCGLabel scope target/m68k: Switch to transaction_failed hook target/m68k: In get_physical_address() check for memory access failures target/m68k: In dump_address_map() check for memory access failures Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/m68k/cpu.h
| * target/m68k: In get_physical_address() check for memory access failuresPeter Maydell2019-05-161-10/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | In get_physical_address(), use address_space_ldl() and address_space_stl() instead of ldl_phys() and stl_phys(). This allows us to check whether the memory access failed. For the moment, we simply return -1 in this case; add a TODO comment that we should ideally generate the appropriate kind of fault. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20181210165636.28366-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * target/m68k: In dump_address_map() check for memory access failuresPeter Maydell2019-05-161-7/+15
| | | | | | | | | | | | | | | | | | In dump_address_map(), use address_space_ldl() instead of ldl_phys(). This allows us to check whether the memory access failed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20181210165636.28366-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-8/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | We can now use the CPUClass hook instead of a named function. Create a static tlb_fill function to avoid other changes within cputlb.c. This also isolates the asserts within. Remove the named tlb_fill function from all of the targets. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | target/m68k: Convert to CPUClass::tlb_fillRichard Henderson2019-05-101-41/+46
|/ | | | | | Cc: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target: Clean up how the dump_mmu() printMarkus Armbruster2019-04-181-59/+56Star
| | | | | | | | | | | | | | | | | | | | | The various dump_mmu() take an fprintf()-like callback and a FILE * to pass to it, and so do their helper functions. Passing around callback and argument is rather tiresome. Most dump_mmu() are called only by the target's hmp_info_tlb(). These all pass monitor_printf() cast to fprintf_function and the current monitor cast to FILE *. SPARC's dump_mmu() gets also called from target/sparc/ldst_helper.c a few times #ifdef DEBUG_MMU. These calls pass fprintf() and stdout. The type-punning is technically undefined behaviour, but works in practice. Clean up: drop the callback, and call qemu_printf() instead. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20190417191805.28198-11-armbru@redhat.com>
* target: Simplify how the TARGET_cpu_list() printMarkus Armbruster2019-04-181-10/+4Star
| | | | | | | | | | | | | | | | | The various TARGET_cpu_list() take an fprintf()-like callback and a FILE * to pass to it. Their callers (vl.c's main() via list_cpus(), bsd-user/main.c's main(), linux-user/main.c's main()) all pass fprintf() and stdout. Thus, the flexibility provided by the (rather tiresome) indirection isn't actually used. Drop the callback, and call qemu_printf() instead. Calling printf() would also work, but would make the code unsuitable for monitor context without making it simpler. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417191805.28198-10-armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
* target/m68k: Fix LGPL information in the file headersThomas Huth2019-01-301-2/+2
| | | | | | | | | | | | | | | It's either "GNU *Library* General Public License version 2" or "GNU Lesser General Public License version *2.1*", but there was no "version 2.0" of the "Lesser" license. So assume that version 2.1 is meant here. Also some files mention the GPL instead of the LGPL after declaring that the files are licensed under the LGPL, so change these spots to use LGPL, too. Reviewed-by: Liam Merwick <liam.merwick@oracle.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1548769438-28942-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-0/+1
| | | | | | | | | | | | | | | | | As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [For PPC parts] Acked-by: David Gibson <david@gibson.dropbear.id.au>
* target/m68k: add HMP command "info tlb"Laurent Vivier2018-01-251-0/+218
| | | | | | | | Dump MMU state and address mappings. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-8-laurent@vivier.eu>
* target/m68k: add pflush/ptestLaurent Vivier2018-01-251-0/+73
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-7-laurent@vivier.eu>
* target/m68k: add movesLaurent Vivier2018-01-251-0/+10
| | | | | | | | and introduce SFC and DFC control registers. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-6-laurent@vivier.eu>
* target/m68k: add Transparent TranslationLaurent Vivier2018-01-251-0/+79
| | | | | | | | Add ittr0, ittr1, dttr0, dttr1 and manage Transparent Translations Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-4-laurent@vivier.eu>
* target/m68k: add MC68040 MMULaurent Vivier2018-01-251-7/+215
| | | | | | | | | | | | | Only add MC68040 MMU page table processing and related registers (Special Status Word, Translation Control Register, User Root Pointer and Supervisor Root Pointer). Transparent Translation Registers, DFC/SFC and pflush/ptest will be added later. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-3-laurent@vivier.eu>
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
* target/m68k: add the Interrupt Stack PointerLaurent Vivier2018-01-041-7/+75
| | | | | | | | | | | Add the third stack pointer, the Interrupt Stack Pointer (ISP) (680x0 only). This stack will be needed in softmmu mode. Update movec to set/get the value of the three stacks. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180104012913.30763-17-laurent@vivier.eu>
* target/m68k: add resetLaurent Vivier2018-01-041-0/+7
| | | | | | | | | | | The instruction traps if the CPU is not in Supervisor state but the helper is empty because there is no easy way to reset all the peripherals without resetting the CPU itself. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180104012913.30763-12-laurent@vivier.eu>
* target/m68k: manage 680x0 stack framesLaurent Vivier2018-01-041-3/+7
| | | | | | | | | | | | | | 680x0 manages several stack frame formats: - format 0: four-word stack frame - format 1: four-word throwaway stack frame - format 2: six-word stack frame - format 3: Floating-Point post-instruction stack frame - format 4: eight-word stack frame - format 7: access-error stack frame Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180104012913.30763-7-laurent@vivier.eu>
* m68k: replace cpu_m68k_init() with cpu_generic_init()Igor Mammedov2017-09-011-20/+0Star
| | | | | | | | | | | | | call register_m68k_insns() at realize time which makes cpu_m68k_init() typical object creation function. As result we can replace it with cpu_generic_init() which does the same job, reducing code duplication a bit. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Thomas Huth <huth@tuxfamily.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1503592308-93913-12-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* target-m68k: add FPCR and FPSRLaurent Vivier2017-06-211-5/+17
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170620205121.26515-6-laurent@vivier.eu>
* target-m68k: define 96bit FP registers for gdb on 680x0Laurent Vivier2017-06-211-0/+45
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170620205121.26515-5-laurent@vivier.eu>
* target-m68k: use floatx80 internallyLaurent Vivier2017-06-211-5/+7
| | | | | | | | | | Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170620205121.26515-4-laurent@vivier.eu>
* target-m68k: move FPU helpers to fpu_helper.cLaurent Vivier2017-06-151-88/+0Star
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170611231633.32582-3-laurent@vivier.eu>
* target-m68k: Inline shiftsRichard Henderson2016-12-271-52/+0Star
| | | | | | | | | Also manage word and byte operands and fix the computation of overflow in the case of M68000 arithmetic shifts. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1478699171-10637-4-git-send-email-rth@twiddle.net>
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+810
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
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