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path: root/target/microblaze/cpu.h
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* target/microblaze: Add props enabling exceptions on failed bus accessesEdgar E. Iglesias2019-01-221-0/+2
* target/microblaze: Switch to transaction_failed hookPeter Maydell2019-01-221-3/+4
* target-microblaze: Consolidate MMU enabled checksEdgar E. Iglesias2018-05-291-1/+3
* target-microblaze: cpu_mmu_index: Fixup indentationEdgar E. Iglesias2018-05-291-7/+9
* target-microblaze: Convert env_btarget to i64Edgar E. Iglesias2018-05-291-1/+1
* target-microblaze: Add Extended AddressingEdgar E. Iglesias2018-05-291-0/+2
* target-microblaze: Setup for 64bit addressingEdgar E. Iglesias2018-05-291-3/+3
* target-microblaze: Make special registers 64-bitEdgar E. Iglesias2018-05-291-1/+1
* target-microblaze: Use TCGv for load/store addressesEdgar E. Iglesias2018-05-291-1/+1
* target-microblaze: Correct the PVR array sizeEdgar E. Iglesias2018-05-291-1/+1
* target-microblaze: Correct special register array sizesEdgar E. Iglesias2018-05-291-2/+2
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-1/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-1/+1
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-1/+1
* microblaze: replace cpu_mb_init() with cpu_generic_init()Igor Mammedov2017-09-011-2/+1Star
* target-microblaze: Introduce a use-pcmp-instr propertyEdgar E. Iglesias2017-07-041-0/+1
* target-microblaze: Introduce a use-msr-instr propertyEdgar E. Iglesias2017-07-041-0/+1
* target-microblaze: Introduce a use-hw-mul propertyEdgar E. Iglesias2017-07-041-0/+1
* target-microblaze: Introduce a use-div propertyEdgar E. Iglesias2017-07-041-0/+1
* target-microblaze: Introduce a use-barrel propertyEdgar E. Iglesias2017-07-041-0/+1
* target-microblaze: Correct bit shift for the PVR0 version fieldEdgar E. Iglesias2017-07-041-0/+2
* qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée2017-01-131-0/+3
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+381
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