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* qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost2020-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the goals of having less boilerplate on QOM declarations is to avoid human error. Requiring an extra argument that is never used is an opportunity for mistakes. Remove the unused argument from OBJECT_DECLARE_TYPE and OBJECT_DECLARE_SIMPLE_TYPE. Coccinelle patch used to convert all users of the macros: @@ declarer name OBJECT_DECLARE_TYPE; identifier InstanceType, ClassType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_TYPE(InstanceType, ClassType, - lowercase, UPPERCASE); @@ declarer name OBJECT_DECLARE_SIMPLE_TYPE; identifier InstanceType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_SIMPLE_TYPE(InstanceType, - lowercase, UPPERCASE); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200916182519.415636-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2020-09-121-10/+2Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/stsquad/tags/pull-testing-fixes-100920-1' into staging Various misc and testing fixes: - Expand CODING_STYLE.rst a little more - usb-host build fix - allow check-softfloat unit tests without TCG - simplify mips imm_branch so compiler isn't confused - mark ppc64abi32 for deprecation - more compiler soothing in pch_rev_id - allow acceptance to skip missing binaries - more a bunch of plugins to contrib # gpg: Signature made Thu 10 Sep 2020 10:51:05 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-fixes-100920-1: plugins: move the more involved plugins to contrib tests/acceptance: Add Test.fetch_asset(cancel_on_missing=True) tests: bump avocado version hw/i386: make explicit clearing of pch_rev_id configure: don't enable ppc64abi32-linux-user by default docs/system/deprecated: mark ppc64abi32-linux-user for deprecation target/mips: simplify gen_compute_imm_branch logic tests/meson.build: fp tests don't need CONFIG_TCG usb-host: restrict workaround to new libusb versions CODING_STYLE.rst: flesh out our naming conventions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/mips: simplify gen_compute_imm_branch logicAlex Bennée2020-09-101-10/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the Travis builds was complaining about: qemu/include/tcg/tcg.h:437:12: error: ‘cond’ may be used uninitialized in this function [-Werror=maybe-uninitialized] return (TCGCond)(c ^ 1); ../target/mips/translate.c:20031:13: note: ‘cond’ was declared here TCGCond cond; Rather than figure out exactly which one was causing the complaint I just defaulted to TCG_COND_ALWAYS and allowed that state to double up for the now defunct bcond_compute variable. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200909112742.25730-5-alex.bennee@linaro.org>
* | Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost2020-09-091-4/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed. Generated running: $ ./scripts/codeconverter/converter.py -i \ --pattern=DeclareObjCheckers $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200831210740.126168-16-ehabkost@redhat.com> Message-Id: <20200831210740.126168-17-ehabkost@redhat.com> Message-Id: <20200831210740.126168-18-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-6/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-3/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* meson: targetPaolo Bonzini2020-08-212-6/+24
| | | | | | | | | Similar to hw_arch, each architecture defines two sourceset which are placed in dictionaries target_arch and target_softmmu_arch. These are then picked up from there when building the per-emulator static_library. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* meson: rename included C source files to .c.incPaolo Bonzini2020-08-212-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built before everything else and they are available when first building the .c files. Alternatively you can use a fine-grained dependency, e.g. target/arm/translate.o: target/arm/decode-neon-shared.inc.c With Meson you have only one choice and it is a third option, namely "build at the beginning of the corresponding target"; the way you express it is to list the includes in the sources of that target. The problem is that Meson decides if something is a source vs. a generated include by looking at the extension: '.c', '.cc', '.m', '.C' are sources, while everything else is considered an include---including '.inc.c'. Use '.c.inc' to avoid this, as it is consistent with our other convention of using '.rst.inc' for included reStructuredText files. The editorconfig file is adjusted. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* trace: switch position of headers to what Meson requiresPaolo Bonzini2020-08-211-0/+1
| | | | | | | | | | | | | | | | | Meson doesn't enjoy the same flexibility we have with Make in choosing the include path. In particular the tracing headers are using $(build_root)/$(<D). In order to keep the include directives unchanged, the simplest solution is to generate headers with patterns like "trace/trace-audio.h" and place forwarding headers in the source tree such that for example "audio/trace.h" includes "trace/trace-audio.h". This patch is too ugly to be applied to the Makefiles now. It's only a way to separate the changes to the tracing header files from the Meson rewrite of the tracing logic. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/mips: Fix ADD.S FPU instructionAlex Richardson2020-07-141-1/+1
| | | | | | | | | | | | | | | | | After merging latest QEMU upstream into our CHERI fork, I noticed that some of the FPU tests in our MIPS baremetal testsuite [*] started failing. It turns out commit 1ace099f2a accidentally changed add.s into a subtract. [*] https://github.com/CTSRD-CHERI/cheritest Fixes: 1ace099f2a ("target/mips: fpu: Demacro ADD.<D|S|PS>") Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200703161515.25966-1-Alexander.Richardson@cl.cam.ac.uk> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* target/mips: Remove identical if/else branchesAleksandar Markovic2020-07-141-8/+1Star
| | | | | | | | | | | | | | | | | | Remove the segment: if (other_tc == other->current_tc) { tccause = other->CP0_Cause; } else { tccause = other->CP0_Cause; } Original contributor can't remember what was his intention. Fixes: 5a25ce9487 ("mips: Hook in more reg accesses via mttr/mftr") Buglink: https://bugs.launchpad.net/qemu/+bug/1885718 Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200701182559.28841-2-aleksandar.qemu.devel@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* hw/mips: Implement the kvm_type() hook in MachineClassHuacai Chen2020-06-272-0/+37
| | | | | | | | | | | | | | | MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we can't create a VZ guest in QEMU because it lacks the kvm_type() hook in MachineClass. This patch add the the kvm_type() hook to support both of the two types. [AM: Added "if defined" guards.] Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <1592995531-32600-2-git-send-email-chenhc@lemote.com>
* target/mips: msa: Split helpers for MULV.<B|H|W|D>Aleksandar Markovic2020-06-153-9/+91
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-15-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for SUBV.<B|H|W|D>Aleksandar Markovic2020-06-153-11/+91
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-14-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>Aleksandar Markovic2020-06-153-20/+103
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-13-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>Aleksandar Markovic2020-06-153-20/+103
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-12-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>Aleksandar Markovic2020-06-153-10/+93
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-11-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>Aleksandar Markovic2020-06-153-14/+97
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-10-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DOTP_U.<H|W|D>Aleksandar Markovic2020-06-153-14/+67
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-9-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DOTP_S.<H|W|D>Aleksandar Markovic2020-06-153-14/+69
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-8-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DPSUB_U.<H|W|D>Aleksandar Markovic2020-06-153-15/+68
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-7-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DPSUB_S.<H|W|D>Aleksandar Markovic2020-06-153-15/+68
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-6-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DPADD_U.<H|W|D>Aleksandar Markovic2020-06-153-15/+68
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-5-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for DPADD_S.<H|W|D>Aleksandar Markovic2020-06-153-28/+78
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-4-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for MSUBV.<B|H|W|D>Aleksandar Markovic2020-06-153-11/+93
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-3-aleksandar.qemu.devel@gmail.com>
* target/mips: msa: Split helpers for MADDV.<B|H|W|D>Aleksandar Markovic2020-06-153-12/+92
| | | | | | | | Achieves clearer code and slightly better performance. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200613152133.8964-2-aleksandar.qemu.devel@gmail.com>
* target/mips: Add comments for vendor-specific ASEsJiaxun Yang2020-06-151-0/+4
| | | | | | | | | | Abbreviations of vendor-specific ASEs looks very similiar. Add comments to explain the full name and vendors of these flags. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200614080049.31134-3-jiaxun.yang@flygoat.com>
* target/mips: Legalize Loongson insn flagsJiaxun Yang2020-06-152-8/+9
| | | | | | | | | | | | | | | | | To match the actual status of Loongson insn, we split flags for LMMI and LEXT from INSN_LOONGSON2F. As Loongson-2F only implemented interger part of LEXT, we'll not enable LEXT for the processor, but instead we're still using INSN_LOONGSON2F as switch flag of these instructions. All multimedia instructions have been moved to LMMI flag. Loongson-2F and Loongson-3A are sharing these instructions. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200614080049.31134-2-jiaxun.yang@flygoat.com>
* target/mips: Enable hardware page table walker and CMGCR features for P5600Andrea Oliveri2020-06-091-4/+5
| | | | | | | | | | Enable hardware page table walker and CMGCR features for P5600 that supports both. Signed-off-by: Andrea Oliveri <oliveriandrea@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <de5adcb9fd0dd607b98026f4bfb34205432b6002.camel@gmail.com>
* target/mips: Add Loongson-3 CPU definitionHuacai Chen2020-06-097-23/+146
| | | | | | | | | | | | | | | | | | | | | | | Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while Loongson-3A R4 is the newest and its ISA is almost the superset of all others. To reduce complexity, we just define two CPU types: 1) "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is suitable for TCG because Loongson-3A R1 has fewest ASE. 2) "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is suitable for KVM because Loongson-3A R4 has the VZ ASE. Loongson-3A has CONFIG6 and CONFIG7, so add their bit-fields as well. [AM: Rearranged insn_flags, added comments, renamed lmi_helper.c, improved commit message, fixed checkpatch warnings] Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1591065557-9174-3-git-send-email-chenhc@lemote.com>
* target/mips: fpu: Refactor conversion from ieee to mips exception flagsAleksandar Markovic2020-06-093-51/+82
| | | | | | | | | | | | | The original coversion function is used for regular and MSA floating point instructions handling. Since there are some nuanced differences between regular and MSA floating point exception handling, provide two instances of the conversion function, rather than just a single common one. Inline both instances of this function instances for the sake of performance. Improve variable naming in surrounding code for clarity. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-17-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Name better paired-single variablesAleksandar Markovic2020-06-091-31/+31
| | | | | | | | Use consistently 'l' and 'h' for low and high halves. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-16-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Remove now unused FLOAT_RINT macroAleksandar Markovic2020-06-091-13/+0Star
| | | | | | | | After demacroing RINT.<D|S>, this macro is not needed anymore. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-15-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro RINT.<D|S>Aleksandar Markovic2020-06-091-2/+18
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-14-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Remove now unused FLOAT_CLASS macroAleksandar Markovic2020-06-091-39/+0Star
| | | | | | | | After demacroing CLASS.<D|S>, this macro is not needed anymore. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-13-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro CLASS.<D|S>Aleksandar Markovic2020-06-091-2/+68
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-12-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macrosAleksandar Markovic2020-06-091-50/+0Star
| | | | | | | | | After demacroing <MADD|MSUB|NMADD|NMSUB>.<D|S|PS>, these macros are not needed anymore. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-11-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro NMSUB.<D|S|PS>Aleksandar Markovic2020-06-091-1/+43
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-10-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro NMADD.<D|S|PS>Aleksandar Markovic2020-06-091-1/+43
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-9-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro MSUB.<D|S|PS>Aleksandar Markovic2020-06-091-1/+39
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-8-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro MADD.<D|S|PS>Aleksandar Markovic2020-06-091-1/+40
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-7-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Remove now unused macro FLOAT_BINOPAleksandar Markovic2020-06-091-39/+0Star
| | | | | | | | | After demacroing <ADD|SUB|MUL|DIV>.<D|S|PS>, this macro is not needed anymore. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-6-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro DIV.<D|S|PS>Aleksandar Markovic2020-06-091-1/+36
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-5-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro MUL.<D|S|PS>Aleksandar Markovic2020-06-091-1/+36
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-4-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro SUB.<D|S|PS>Aleksandar Markovic2020-06-091-1/+36
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-3-aleksandar.qemu.devel@gmail.com>
* target/mips: fpu: Demacro ADD.<D|S|PS>Aleksandar Markovic2020-06-091-1/+37
| | | | | | | | | This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-2-aleksandar.qemu.devel@gmail.com>
* target/mips: Support variable page sizeHuacai Chen2020-06-011-0/+5
| | | | | | | | | | | | Traditionally, MIPS use 4KB page size, but Loongson prefer 16KB page size in system emulator. So, let's define TARGET_PAGE_BITS_VARY and TARGET_PAGE_BITS_MIN to support variable page size. Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1586337380-25217-1-git-send-email-chenhc@lemote.com>
* target/mips: Add more CP0 register for save/restoreHuacai Chen2020-06-012-2/+216
| | | | | | | | | | | Add more CP0 register for save/restore, including: EBase, XContext, PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6. Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1588501221-1205-6-git-send-email-chenhc@lemote.com>
* softfloat: Replace flag with boolRichard Henderson2020-05-191-5/+5
| | | | | | | | We have had this on the to-do list for quite some time. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/mips: Fix loongson multimedia condition instructionsJiaxun Yang2020-03-281-4/+31
| | | | | | | | | | | | | Loongson multimedia condition instructions were previously implemented as write 0 to rd due to lack of documentation. So I just confirmed with Loongson about their encoding and implemented them correctly. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200324122212.11156-1-jiaxun.yang@flygoat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-21 04:17:42 +0100