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* target/openrisc: Implement l.adrpRichard Henderson2019-09-041-0/+2
| | | | | | | This was added to the 1.3 spec. Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Implement unordered fp comparisonsRichard Henderson2019-09-041-0/+12
| | | | | | | | These were added to the 1.3 spec. For OF32S, validate AVR. But OF64A32 is itself new to 1.3 so no extra check needed. Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Add support for ORFPX64A32Richard Henderson2019-09-041-0/+31
| | | | | | | | | | This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and helper_ftoid. Include the bit for cpu "any". Change the default cpu for linux-user to "any". Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Fix LGPL information in the file headersThomas Huth2019-05-081-1/+1
| | | | | | | | | | It's either "GNU *Library* General Public License version 2" or "GNU Lesser General Public License version *2.1*", but there was no "version 2.0" of the "Lesser" license. So assume that version 2.1 is meant here. Acked-by: Stafford Horne <shorne@gmail.com> Message-Id: <1550073577-4248-1-git-send-email-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* target/openrisc: Convert dec_floatRichard Henderson2018-05-141-0/+21
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_compiRichard Henderson2018-05-141-0/+12
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_compRichard Henderson2018-05-141-0/+15
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_MRichard Henderson2018-05-141-0/+3
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_logicRichard Henderson2018-05-141-0/+6
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_macRichard Henderson2018-05-141-0/+5
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert dec_calcRichard Henderson2018-05-141-20/+56
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert remainder of dec_misc insnsRichard Henderson2018-05-141-4/+31
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert memory insnsRichard Henderson2018-05-141-0/+24
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Convert branch insnsRichard Henderson2018-05-141-0/+12
| | | | | Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/openrisc: Start conversion to decodetree.pyRichard Henderson2018-05-141-0/+28
Begin with the 0x08 major opcode, the system instructions. Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 12:22:03 +0100