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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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openrisc
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Author
Age
Files
Lines
...
*
target/openrisc: fetch code with translator_ld
Emilio G. Cota
2019-10-28
1
-1
/
+1
*
target/openrisc: Update cpu "any" to v1.3
Richard Henderson
2019-09-04
1
-1
/
+1
*
target/openrisc: Implement l.adrp
Richard Henderson
2019-09-04
3
-0
/
+16
*
target/openrisc: Implement move to/from FPCSR
Richard Henderson
2019-09-04
5
-5
/
+38
*
target/openrisc: Implement unordered fp comparisons
Richard Henderson
2019-09-04
5
-0
/
+145
*
target/openrisc: Add support for ORFPX64A32
Richard Henderson
2019-09-04
6
-3
/
+332
*
target/openrisc: Check CPUCFG_OF32S for float insns
Richard Henderson
2019-09-04
2
-50
/
+36
*
target/openrisc: Fix lf.ftoi.s
Richard Henderson
2019-09-04
1
-1
/
+1
*
target/openrisc: Add VR2 and AVR special processor registers
Richard Henderson
2019-09-04
3
-6
/
+19
*
target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init
Richard Henderson
2019-09-04
3
-13
/
+22
*
target/openrisc: Make VR and PPC read-only
Richard Henderson
2019-09-04
2
-12
/
+1
*
target/openrisc: Cache R0 in DisasContext
Richard Henderson
2019-09-04
1
-7
/
+12
*
target/openrisc: Replace cpu register array with a function
Richard Henderson
2019-09-04
1
-97
/
+116
*
target/openrisc: Add DisasContext parameter to check_r0_write
Richard Henderson
2019-09-04
1
-47
/
+49
*
tcg: TCGMemOp is now accelerator independent MemOp
Tony Nguyen
2019-09-03
1
-2
/
+2
*
hw/core: Move cpu.c, cpu.h from qom/ to hw/core/
Markus Armbruster
2019-08-21
1
-1
/
+1
*
Include hw/boards.h a bit less
Markus Armbruster
2019-08-16
1
-1
/
+0
*
Include hw/hw.h exactly where needed
Markus Armbruster
2019-08-16
1
-1
/
+0
*
migration: Move the VMStateDescription typedef to typedefs.h
Markus Armbruster
2019-08-16
1
-1
/
+1
*
general: Replace global smp variables with smp machine properties
Like Xu
2019-07-05
1
-1
/
+5
*
Include qemu-common.h exactly where needed
Markus Armbruster
2019-06-12
9
-9
/
+0
*
cpu: Remove CPU_COMMON
Richard Henderson
2019-06-10
1
-2
/
+0
*
cpu: Introduce CPUNegativeOffsetState
Richard Henderson
2019-06-10
1
-1
/
+1
*
cpu: Introduce cpu_set_cpustate_pointers
Richard Henderson
2019-06-10
1
-2
/
+1
*
cpu: Move ENV_OFFSET to exec/gen-icount.h
Richard Henderson
2019-06-10
1
-1
/
+0
*
target/openrisc: Use env_cpu, env_archcpu
Richard Henderson
2019-06-10
3
-12
/
+6
*
cpu: Replace ENV_GET_CPU with env_cpu
Richard Henderson
2019-06-10
1
-2
/
+0
*
cpu: Define ArchCPU
Richard Henderson
2019-06-10
1
-0
/
+1
*
cpu: Define CPUArchState with typedef
Richard Henderson
2019-06-10
1
-2
/
+2
*
tcg: Split out target/arch/cpu-param.h
Richard Henderson
2019-06-10
2
-11
/
+20
*
tcg: Use CPUClass::tlb_fill in cputlb.c
Richard Henderson
2019-05-10
1
-6
/
+0
*
target/openrisc: Convert to CPUClass::tlb_fill
Richard Henderson
2019-05-10
3
-36
/
+39
*
target/openrisc: Fix LGPL information in the file headers
Thomas Huth
2019-05-08
8
-8
/
+8
*
tcg: Hoist max_insns computation to tb_gen_code
Richard Henderson
2019-04-24
1
-2
/
+2
*
disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h
Markus Armbruster
2019-04-18
1
-1
/
+1
*
qom/cpu: Simplify how CPUClass:cpu_dump_state() prints
Markus Armbruster
2019-04-18
2
-8
/
+6
*
target: Simplify how the TARGET_cpu_list() print
Markus Armbruster
2019-04-18
2
-11
/
+6
*
target/openrisc: Fix LGPL version number
Thomas Huth
2019-01-30
7
-7
/
+7
*
vmstate: constify VMStateField
Marc-André Lureau
2018-11-27
1
-2
/
+3
*
decodetree: Remove "insn" argument from trans_* expanders
Richard Henderson
2018-10-31
2
-112
/
+111
*
target/openrisc: Fix writes to interrupt mask register
Stafford Horne
2018-07-03
1
-1
/
+1
*
target/openrisc: Fix delay slot exception flag to match spec
Stafford Horne
2018-07-03
1
-7
/
+12
*
linux-user: Implement signals for openrisc
Richard Henderson
2018-07-03
1
-0
/
+1
*
target/openrisc: Reorg tlb lookup
Richard Henderson
2018-07-03
2
-170
/
+88
*
target/openrisc: Increase the TLB size
Richard Henderson
2018-07-02
3
-6
/
+7
*
target/openrisc: Stub out handle_mmu_fault for softmmu
Richard Henderson
2018-07-02
1
-30
/
+5
*
target/openrisc: Use identical sizes for ITLB and DTLB
Richard Henderson
2018-07-02
4
-18
/
+16
*
target/openrisc: Fix cpu_mmu_index
Richard Henderson
2018-07-02
6
-32
/
+49
*
target/openrisc: Fix tlb flushing in mtspr
Richard Henderson
2018-07-02
1
-6
/
+15
*
target/openrisc: Reduce tlb to a single dimension
Richard Henderson
2018-07-02
4
-32
/
+30
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