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* Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170714' into ↵Peter Maydell2017-07-1411-53/+476
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging s390x/kvm/migration/cpumodel: fixes, enhancements and cleanups - add a network boot rom for s390 (Thomas Huth) - migration of storage attributes like the CMMA used/unused state - PCI related enhancements - full support for aen, ais and zpci - migration support for css with vmstates (Halil Pasic) - cpu model enhancements for cpu features - guarded storage support # gpg: Signature made Fri 14 Jul 2017 11:33:04 BST # gpg: using RSA key 0x117BBC80B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" # Primary key fingerprint: F922 9381 A334 08F9 DBAB FBCA 117B BC80 B5A6 1C7C * remotes/borntraeger/tags/s390x-20170714: (40 commits) s390x/gdb: add gs registers s390x/arch_dump: also dump guarded storage control block s390x/kvm: enable guarded storage s390x/kvm: Enable KSS facility for nested virtualization s390x/cpumodel: add esop/esop2 to z12 model s390x/cpumodel: we are always in zarchitecture mode s390x/cpumodel: wire up new hardware features s390x/flic: migrate ais states s390x/cpumodel: add zpci, aen and ais facilities s390x: initialize cpu firstly pc-bios/s390: rebuild s390-ccw.img pc-bios/s390: add s390-netboot.img pc-bios/s390-ccw: Link libnet into the netboot image and do the TFTP load pc-bios/s390-ccw: Add virtio-net driver code pc-bios/s390-ccw: Add core files for the network bootloading program roms/SLOF: Update submodule to latest status pc-bios/s390-ccw: Add code for virtio feature negotiation pc-bios/s390-ccw: Remove unused structs from virtio.h pc-bios/s390-ccw: Move byteswap functions to a separate header pc-bios/s390-ccw: Add a write() function for stdio ... Conflicts: target/s390x/kvm.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * s390x/gdb: add gs registersChristian Borntraeger2017-07-141-0/+24
| | | | | | | | | | | | Let's provide the guarded storage registers via gdb server. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/arch_dump: also dump guarded storage control blockChristian Borntraeger2017-07-141-0/+18
| | | | | | | | | | | | Write the new note section of type 30b (guarded storage control block). Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/kvm: enable guarded storageFan Zhang2017-07-143-10/+85
| | | | | | | | | | | | | | | | | | | | | | | | Introduce guarded storage support for KVM guests on s390. We need to enable the capability, extend machine check validity, sigp store-additional-status-at-address, and migration. The feature is fenced for older machine type versions. Signed-off-by: Fan Zhang <zhangfan@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/kvm: Enable KSS facility for nested virtualizationFarhan Ali2017-07-141-0/+1
| | | | | | | | | | | | | | | | | | | | If the host supports keyless subset (KSS) then first level guest (G2) should enable KSS facility as well. Signed-off-by: Farhan Ali <alifm@linux.vnet.ibm.com> Reviewed-by: Eric Farman <farman@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/cpumodel: add esop/esop2 to z12 modelJason J. Herne2017-07-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | Add esop and esop2 features to z12 model where esop2 was originally introduced. Disable esop and esop2 when using compatibility machine v2.9 or earlier. Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/cpumodel: we are always in zarchitecture modeJason J. Herne2017-07-142-29/+14Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In QEMU, a guest VCPU always started in and never was able to leave z/Architecture mode. Now we have an architected way of showing this condition. The SIGP SET ARCHITECTURE instruction is simply rejected. Linux as guest seems to not care about the return value, which is a good thing The new handling is just like already being in z/Architecture mode. We'll not try to fake absence of this facility, but still not indicate the facility in case some strange CPU model turned z/Architecture off completely (which doesn't work either way but let's us see how a guest would react on a lack of this facility). Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/cpumodel: wire up new hardware featuresJason J. Herne2017-07-146-1/+159
| | | | | | | | | | | | | | | | | | | | | | Some new guest features have been introduced recently. Let's wire them up in the CPU model. Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [split patch]
| * s390x/cpumodel: add zpci, aen and ais facilitiesYi Min Zhao2017-07-144-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zPCI instructions and facilities are available since IBM zEnterprise EC12. To support z/PCI in QEMU we enable zpci, aen and ais facilities starting with zEC12 GA1. And we always set zpci and aen bits in max cpu model. Later they might be switched off due to applied real cpu model. For ais bit, we only provide it in the full cpu model beginning with zEC12 and defer its enablement in the default cpu model to a later point in time. At the same time, disable them for 2.9 and older machines. Because of introducing AIS facility, we could check if it's enabled to initialize flic->ais_supported with the real value. Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
| * s390x/sic: realize SIC handlingFei Li2017-07-141-1/+15
| | | | | | | | | | | | | | | | | | | | Currently, we do nothing for the SIC instruction, but we need to implement it properly. Let's add proper handling in the backend code. Co-authored-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Fei Li <sherrylf@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/cpumodel: provide compat handling for new cpu featuresJason J. Herne2017-07-142-0/+28
| | | | | | | | | | | | | | | | Provide a mechanism to disable features in compatibility machines. Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/cpumodel: clean up spacing and commentsJason J. Herne2017-07-143-3/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up spacing and add comments to clarify difference between base, full and default models. Not having spacing around the model definitions in gen-features.c is particularly frustrating as the reader tends to misinterpret which model they are looking at or editing. Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/kvm: Rework cmma managementJanosch Frank2017-07-142-9/+18
| | | | | | | | | | | | | | | | | | | | Let's keep track of cmma enablement and move the mem_path check into the actual enablement. This now also warns users that do not use cpu-models about disabled cmma when using huge pages. Signed-off-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
* | Convert error_report() to warn_report()Alistair Francis2017-07-132-5/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert all uses of error_report("warning:"... to use warn_report() instead. This helps standardise on a single method of printing warnings to the user. All of the warnings were changed using these two commands: find ./* -type f -exec sed -i \ 's|error_report(".*warning[,:] |warn_report("|Ig' {} + Indentation fixed up manually afterwards. The test-qdev-global-props test case was manually updated to ensure that this patch passes make check (as the test cases are case sensitive). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Suggested-by: Thomas Huth <thuth@redhat.com> Cc: Jeff Cody <jcody@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: Ronnie Sahlberg <ronniesahlberg@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Lieven <pl@kamp.de> Cc: Josh Durgin <jdurgin@redhat.com> Cc: "Richard W.M. Jones" <rjones@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> Cc: Greg Kurz <groug@kaod.org> Cc: Rob Herring <robh@kernel.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Peter Chubb <peter.chubb@nicta.com.au> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Alexander Graf <agraf@suse.de> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Greg Kurz <groug@kaod.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Max Reitz <mreitz@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Message-Id: <e1cfa2cd47087c248dd24caca9c33d9af0c499b0.1499866456.git.alistair.francis@xilinx.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
* virtio-scsi-ccw: use ioeventfd even when KVM is disabledQingFeng Hao2017-07-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is based on a similar patch from Stefan Hajnoczi - commit c324fd0a39c ("virtio-pci: use ioeventfd even when KVM is disabled") Do not check kvm_eventfds_enabled() when KVM is disabled since it always returns 0. Since commit 8c56c1a592b5092d91da8d8943c17777d6462a6f ("memory: emulate ioeventfd") it has been possible to use ioeventfds in qtest or TCG mode. This patch makes -device virtio-scsi-ccw,iothread=iothread0 work even when KVM is disabled. Currently we don't have an equivalent to "memory: emulate ioeventfd" for ccw yet, but that this doesn't hurt and qemu-iotests 068 can pass with skipping iothread arguments. I have tested that virtio-scsi-ccw works under tcg both with and without iothread. This patch fixes qemu-iotests 068, which was accidentally merged early despite the dependency on ioeventfd. Signed-off-by: QingFeng Hao <haoqf@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20170704132350.11874-2-haoqf@linux.vnet.ibm.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
* s390x: return unavailable features via query-cpu-definitionsViktor Mihajlovski2017-07-051-5/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The response for query-cpu-definitions didn't include the unavailable-features field, which is used by libvirt to figure out whether a certain cpu model is usable on the host. The unavailable features are now computed by obtaining the host CPU model and comparing it against the known CPU models. The comparison takes into account the generation, the GA level and the feature bitmaps. In the case of a CPU generation/GA level mismatch a feature called "type" is reported to be missing. As a result, the output of virsh domcapabilities would change from something like ... <mode name='custom' supported='yes'> <model usable='unknown'>z10EC-base</model> <model usable='unknown'>z9EC-base</model> <model usable='unknown'>z196.2-base</model> <model usable='unknown'>z900-base</model> <model usable='unknown'>z990</model> ... to ... <mode name='custom' supported='yes'> <model usable='yes'>z10EC-base</model> <model usable='yes'>z9EC-base</model> <model usable='no'>z196.2-base</model> <model usable='yes'>z900-base</model> <model usable='yes'>z990</model> ... Signed-off-by: Viktor Mihajlovski <mihajlov@linux.vnet.ibm.com> Message-Id: <1499082529-16970-1-git-send-email-mihajlov@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
* target/s390x: Implement idte instructionDavid Hildenbrand2017-06-235-0/+70
| | | | | | | | | | | | | Let's keep it very simple for now and flush the complete tlb, we currently can't find the right entries in our tlb, we would have to store the used tables for each element. As we now fully implement the DAT-enhancement facility, we can allow to enable it for the qemu CPU model. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170622094151.28633-4-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Improve heuristic for ipteDavid Hildenbrand2017-06-231-9/+16
| | | | | | | | | If only the page index is set, most likely we don't have a valid virtual address. Let's do a full tlb flush for that case. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170622094151.28633-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Indicate and check for local tlb clearingDavid Hildenbrand2017-06-233-3/+6
| | | | | | | | | Let's allow to enable it for the qemu cpu model and correctly emulate it. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170622094151.28633-2-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Clean up TB flag bitsRichard Henderson2017-06-232-23/+17Star
| | | | | | | | | | Most of the PSW bits that were being copied into TB->flags are not relevant to translation. Removing those that are unnecessary reduces the amount of translation required. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Finish implementing ETF2-ENHRichard Henderson2017-06-232-3/+13
| | | | | | | | Missed the proper alignment in TRTO/TRTT, and ignoring the M3 field for all TRXX insns without ETF2-ENH. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Mark STFLE_49 facility as availableRichard Henderson2017-06-231-0/+1
| | | | | | | | This facility bit includes execution-hint, load-and-trap, miscellaneous-instruction-extensions and processor-assist. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Implement processor-assist insnRichard Henderson2017-06-232-0/+4
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Implement execution-hint insnsRichard Henderson2017-06-232-1/+13
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Mark STFLE_53 facility as availableRichard Henderson2017-06-231-0/+1
| | | | | | | | This facility bit includes load-on-condition-2 and load-and-zero-rightmost-byte. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Implement load-and-zero-rightmost-byte insnsRichard Henderson2017-06-232-0/+12
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Implement load-on-condition-2 insnsRichard Henderson2017-06-233-3/+25
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Mark FPSEH facility as availableRichard Henderson2017-06-231-0/+1
| | | | | | | | | This facility bit includes DFP-rounding, FPR-GR-transfer, FPS-sign-handling, and IEEE-exception-simulation. We do support all of these. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: implement mvcos instructionDavid Hildenbrand2017-06-236-15/+201
| | | | | | | | | | | | | | | | | | | | | | This adds support for the MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS) instruction. Allow to enable it for the qemu cpu model using qemu-system-s390x ... -cpu qemu,mvcos=on ... This allows to boot linux kernel that uses it for uacccess. We are missing (as for most other part) low address protection checks, PSW key / storage key checks and support for AR-mode. We fake an ADDRESSING exception when called from problem state (which seems to rely on PSW key checks to be in place) and if AR-mode is used. user mode will always see a PRIVILEDGED exception. This patch is based on an original patch by Miroslav Benes (thanks!). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170614133819.18480-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: change PSW_SHIFT_KEYDavid Hildenbrand2017-06-232-2/+2
| | | | | | | | | | | Such shifts are usually used to easily extract the PSW KEY from the PSW mask, so let's avoid the confusing offset of 4. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170614133819.18480-2-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Map existing FAC_* names to S390_FEAT_* namesRichard Henderson2017-06-231-30/+29Star
| | | | | | | | The FAC_ names were placeholders prior to the introduction of the current facility modeling. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: Exit after changing PSW maskRichard Henderson2017-06-191-4/+10
| | | | | | | Exit to cpu loop so we reevaluate cpu_s390x_hw_interrupts. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* s390x/cpumodel: wire up cpu type + id for TCGDavid Hildenbrand2017-06-135-14/+16
| | | | | | | | | | | | | | | | | Let's properly expose the CPU type (machine-type number) via "STORE CPU ID" and "STORE SUBSYSTEM INFORMATION". As TCG emulates basic mode, the CPU identification number has the format "Annnnn", whereby A is the CPU address, and n are parts of the CPU serial number (0 for us for now). A specification exception will be injected if the address is not aligned to a double word. Low address protection will not be checked as we're missing some more general support for that. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609133426.11447-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: rework PGM interrupt psw.addr handlingDavid Hildenbrand2017-06-135-32/+49
| | | | | | | | | | | | | | | | | | We can tell from the program interrupt code, whether a program interrupt has to forward the address in the PGM new PSW (suppressing/terminated/completed) to point at the next instruction, or if it is nullifying and the PSW address does not have to be incremented. So let's not modify the PSW address outside of the injection path and handle this internally. We just have to handle instruction length auto detection if no valid instruction length can be provided. This should fix various program interrupt injection paths, where the PSW was not properly forwarded. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609142156.18767-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target/s390x: correctly indicate PER nullificationDavid Hildenbrand2017-06-131-0/+1
| | | | | | Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609142156.18767-2-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170608' into ↵Peter Maydell2017-06-134-3/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging s390x: misc fixes bunch of fixes - reject MIDA accesses for CCWs - cpumodel fixes - cross-build fix for bios - migration improvements # gpg: Signature made Thu 08 Jun 2017 14:10:29 BST # gpg: using RSA key 0x117BBC80B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" # Primary key fingerprint: F922 9381 A334 08F9 DBAB FBCA 117B BC80 B5A6 1C7C * remotes/borntraeger/tags/s390x-20170608: s390x/cpumodel: improve defintion search without an IBC s390x/cpumodel: take care of the cpuid format bit for KVM pc-bios/s390-ccw: use STRIP variable in Makefile s390x/css: fence off MIDA s390x/css: catch section mismatch on load Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * s390x/cpumodel: improve defintion search without an IBCDavid Hildenbrand2017-06-061-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, under z/VM on a 0x2827, QEMU will detect a 0x2828 if no IBC value is provided. QEMU will simply take the last model of that HW generation, which happens to be the BC version. Let's improve our search for that case by selecting the latest CPU definition that matches the CPU type. This for example will avoid detecting an z13 as a z13s. We might still detect a GA2 version on a GA1 system, but as we don't have further information at hand, there isn't too much we can do about it. The alternative of always presenting the oldest GA is not backward compatible, e.g: You're running on 0x2827 GA2. Old QEMU version indicated "0x2828 GA1 == 0x2827 GA2". After you updated QEMU, you suddenly detect "0x2827 GA1". You're previous libvirt guest might suddenly refuse to run. In the end presenting a newer GA level does not matter because: 1: All GAX models share the same base feature set. A GAX++ might support "more features". 2: Without an IBC, the guest can't detect the GA version. If we have no IBC (esp. unblocked_ibc == 0), the IBC we will present to the guest in read_SCP_info() will be 0. The guest will not know which GA version it has. The problem of missing IBC propagates. If we don't have a feature of the GA++ version, also our guest won't have it. So in summary, the guest also has no idea of its GA version. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170531193434.6918-3-david@redhat.com> Acked-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [improve patch description by reusing mailing list discussion]
| * s390x/cpumodel: take care of the cpuid format bit for KVMDavid Hildenbrand2017-06-063-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's also properly forward that bit. It should always be set. I verified it under z/VM, it seems to be always set there. For now, zKVM guests never get that bit set when the CPU model is active. The PoP mentiones, that z800 + z900 (HW generation 7) always set this bit to 0, so let's take care of that. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170531193434.6918-2-david@redhat.com> Acked-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
| * s390x/css: fence off MIDACornelia Huck2017-06-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | MIDA (modified indirect data addressing) is an optional facility, and we (currently) don't support it. Let's post an operand exception if the guest tries to set it in the orb and a channel program check if it is set in a ccw, as specified in the Principles of Operation. Reviewed-by: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
* | target/s390x: addressing exceptions are suppressingDavid Hildenbrand2017-06-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have to make the address in the old PSW point at the next instruction, as addressing exceptions are suppressing and not nullifying. I assume that there are a lot of other broken cases (as most instructions we care about are suppressing) - all trigger_pgm_exception() specifying and explicit number or ILEN_LATER look suspicious, however this is another story that might require bigger changes (and I have to understand when the address might already have been incremented first). This is needed to make an upcoming kvm-unit-test work. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170529121228.2789-1-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: mark ETF2 and ETF2-ENH facilities as availableAurelien Jarno2017-06-071-0/+2
| | | | | | | | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-30-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 caseAurelien Jarno2017-06-071-0/+2
| | | | | | | | | | | | | | | | | | | | The CDSG instruction requires a 16-byte alignement, as expressed in the MO_ALIGN_16 passed to helper_atomic_cmpxchgo_be_mmu. In the non parallel case, use check_alignment to enforce this. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement STORE PAIR TO QUADWORDAurelien Jarno2017-06-074-0/+33
| | | | | | | | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement LOAD PAIR FROM QUADWORDAurelien Jarno2017-06-074-0/+37
| | | | | | | | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWOAurelien Jarno2017-06-074-0/+85
| | | | | | | | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-29-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement TEST DECIMALAurelien Jarno2017-06-074-0/+36
| | | | | | | | | | | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-28-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement UNPACK UNICODEAurelien Jarno2017-06-074-10/+60
| | | | | | | | | | | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-27-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement UNPACK ASCIIAurelien Jarno2017-06-074-0/+71
| | | | | | | | | | | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-26-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement PACK UNICODEAurelien Jarno2017-06-074-9/+40
| | | | | | | | | | | | | | | | | | | | Use a common helper with PACK ASCII as the differences are limited to the stride of the source operand. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-25-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target/s390x: implement PACK ASCIIAurelien Jarno2017-06-074-0/+54
| | | | | | | | | | | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-24-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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