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* target/s390x: Remove ILEN_AUTORichard Henderson2019-10-092-5/+0Star
| | | | | | | | | This setting is no longer used. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-16-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Rely on unwinding in s390_cpu_virt_mem_rwRichard Henderson2019-10-091-1/+1
| | | | | | | | | | | | For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-15-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Rely on unwinding in s390_cpu_tlb_fillRichard Henderson2019-10-091-16/+7Star
| | | | | | | | | | | | | | | We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-14-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Simplify helper_lraRichard Henderson2019-10-091-14/+3Star
| | | | | | | | | | | | | | We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-13-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Remove fail variable from s390_cpu_tlb_fillRichard Henderson2019-10-091-12/+7Star
| | | | | | | | | | | Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-12-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Return exception from translate_pagesRichard Henderson2019-10-091-10/+10
| | | | | | | | | | Do not raise the exception directly within translate_pages, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-11-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Return exception from mmu_translateRichard Henderson2019-10-095-38/+35Star
| | | | | | | | | | Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-10-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Remove exc argument to mmu_translate_asceRichard Henderson2019-10-091-2/+2
| | | | | | | | | | Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-9-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Return exception from mmu_translate_realRichard Henderson2019-10-093-11/+9Star
| | | | | | | | | | Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-8-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Handle tec in s390_cpu_tlb_fillRichard Henderson2019-10-091-1/+6
| | | | | | | | | | | As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-7-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fillRichard Henderson2019-10-091-2/+7
| | | | | | | | | | | Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-6-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Use tcg_s390_program_interrupt in TCG helpersRichard Henderson2019-10-097-46/+46
| | | | | | | | | | | | | Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-5-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Remove ilen parameter from s390_program_interruptRichard Henderson2019-10-0911-85/+73Star
| | | | | | | | | | This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Remove ilen parameter from tcg_s390_program_interruptRichard Henderson2019-10-094-10/+10
| | | | | | | | | | Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-3-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* target/s390x: Add ilen to unwind dataRichard Henderson2019-10-093-5/+24
| | | | | | | | | | Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20191001171614.8405-2-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/cpumodel: Add new TCG features to QEMU cpu modelDavid Hildenbrand2019-10-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now implement a bunch of new facilities we can properly indicate. ESOP-1/ESOP-2 handling is discussed in the PoP Chafter 3-15 ("Suppression on Protection"). The "Basic suppression-on-protection (SOP) facility" is a core part of z/Architecture without a facility indication. ESOP-2 is indicated by ESOP-1 + Side-effect facility ("ESOP-2"). Besides ESOP-2, the side-effect facility is only relevant for the guarded-storage facility (we don't implement). S390_ESOP: - We indicate DAT exeptions by setting bit 61 of the TEID (TEC) to 1 and bit 60 to zero. We don't trigger ALCP exceptions yet. Also, we set bit 0-51 and bit 62/63 to the right values. S390_ACCESS_EXCEPTION_FS_INDICATION: - The TEID (TEC) properly indicates in bit 52/53 on any access if it was a fetch or a store S390_SIDE_EFFECT_ACCESS_ESOP2: - We have no side-effect accesses (esp., we don't implement the guarded-storage faciliy), we correctly set bit 64 of the TEID (TEC) to 0 (no side-effect). - ESOP2: We properly set bit 56, 60, 61 in the TEID (TEC) to indicate the type of protection. We don't trigger KCP/ALCP exceptions yet. S390_INSTRUCTION_EXEC_PROT: - The MMU properly detects and indicates the exception on instruction fetches - Protected TLB entries will never get PAGE_EXEC set. There is no need to fake the abscence of any of the facilities - without the facilities, some bits of the TEID (TEC) are simply unpredictable. As IEP was added with z14 and we currently implement a z13, add it to the MAX model instead. Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/cpumodel: Prepare for changes of QEMU modelDavid Hildenbrand2019-10-091-1/+5
| | | | | | | | | Setup the 4.1 compatibility model so we can add new features to the LATEST model. Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Implement Instruction-Execution-Protection FacilityDavid Hildenbrand2019-10-093-1/+27
| | | | | | | | | | | | | | | IEP support in the mmu is fairly easy. Set the right permissions for TLB entries and properly report an exception. Make sure to handle EDAT-2 by setting bit 56/60/61 of the TEID (TEC) to the right values. Let's keep s390_cpu_get_phys_page_debug() working even if IEP is active. Switch MMU_DATA_LOAD - this has no other effects any more as the ASC to be used is now fully selected outside of mmu_translate(). Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Implement ESOP-2 and access-exception-fetch/store-indication facilityDavid Hildenbrand2019-10-091-2/+9
| | | | | | | | | | | | | | | | | | We already implement ESOP-1. For ESOP-2, we only have to indicate all protection exceptions properly. Due to EDAT-1, we already indicate DAT exceptions properly. We don't trigger KCP/ALCP/IEP exceptions yet. So all we have to do is set the TEID (TEC) to the right values (bit 56, 60, 61) in case of LAP. We don't have any side-effects (e.g., no guarded-storage facility), therefore, bit 64 of the TEID (TEC) is always 0. We always have to indicate whether it is a fetch or a store for all access exceptions. This is only missing for LAP exceptions. Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Add EDAT2 translation supportDavid Hildenbrand2019-10-091-3/+12
| | | | | | | | | This only adds basic support to the DAT translation, but no EDAT2 support for TCG. E.g., the gdbstub under kvm uses this function, too, to translate virtual addresses. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Convert to non-recursive page table walkDavid Hildenbrand2019-10-091-100/+108
| | | | | | | | | | | | | A non-recursive implementation allows to make better use of the branch predictor, avoids function calls, and makes the implementation of new features only for a subset of region table levels easier. We can now directly compare our implementation to the KVM gaccess implementation in arch/s390/kvm/gaccess.c:guest_translate(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: DAT table definition overhaulDavid Hildenbrand2019-10-093-43/+84
| | | | | | | | | | | | | | | | | Let's use consistent names for the region/section/page table entries and for the macros to extract relevant parts from virtual address. Make them match the definitions in the PoP - e.g., how the relevant bits are actually called. Introduce defines for all bits declared in the PoP. This will come in handy in follow-up patches. Add a note where additional information about s390x and the used definitions can be found. Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Use TARGET_PAGE_MASK in mmu_translate_pte()David Hildenbrand2019-10-091-1/+1
| | | | | | | | | While ASCE_ORIGIN is not wrong, it is certainly confusing. We want a page frame address. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Inject PGM_ADDRESSING on bogus table addressesDavid Hildenbrand2019-10-091-4/+27
| | | | | | | | | Let's document how it works and inject PGM_ADDRESSING if reading of table entries fails. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Inject DAT exceptions from a single placeDavid Hildenbrand2019-10-091-46/+17Star
| | | | | | | | | Let's return the PGM from the translation functions on error and inject based on that. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Move DAT protection handling out of mmu_translate_asce()David Hildenbrand2019-10-091-23/+16Star
| | | | | | | | | | We'll reuse the ilen and tec definitions in mmu_translate soon also for all other DAT exceptions we inject. Move it to the caller, where we can later pair it up with other protection checks, like IEP. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390x/mmu: Drop debug logging from MMU codeDavid Hildenbrand2019-10-091-51/+0Star
| | | | | | | | | | | | Let's get it out of the way to make some further refactorings easier. Personally, I've never used these debug statements at all. And if I had to debug issues, I used plain GDB instead (debug prints are just way too much noise in the MMU). We might want to introduce tracing at some point instead, so we can able selected events on demand. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
* s390/kvm: split kvm mem slots at 4TBChristian Borntraeger2019-09-301-5/+4Star
| | | | | | | | Instead of splitting at an unaligned address, we can simply split at 4TB. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com>
* s390: do not call memory_region_allocate_system_memory() multiple timesIgor Mammedov2019-09-301-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | s390 was trying to solve limited KVM memslot size issue by abusing memory_region_allocate_system_memory(), which breaks API contract where the function might be called only once. Beside an invalid use of API, the approach also introduced migration issue, since RAM chunks for each KVM_SLOT_MAX_BYTES are transferred in migration stream as separate RAMBlocks. After discussion [1], it was agreed to break migration from older QEMU for guest with RAM >8Tb (as it was relatively new (since 2.12) and considered to be not actually used downstream). Migration should keep working for guests with less than 8TB and for more than 8TB with QEMU 4.2 and newer binary. In case user tries to migrate more than 8TB guest, between incompatible QEMU versions, migration should fail gracefully due to non-exiting RAMBlock ID or RAMBlock size mismatch. Taking in account above and that now KVM code is able to split too big MemorySection into several memslots, partially revert commit (bb223055b s390-ccw-virtio: allow for systems larger that 7.999TB) and use kvm_set_max_memslot_size() to set KVMSlot size to KVM_SLOT_MAX_BYTES. 1) [PATCH RFC v2 4/4] s390: do not call memory_region_allocate_system_memory() multiple times Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190924144751.24149-5-imammedo@redhat.com> Acked-by: Peter Xu <peterx@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
* Merge remote-tracking branch ↵Peter Maydell2019-09-235-225/+544
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/davidhildenbrand/tags/s390x-tcg-2019-09-23' into staging Fix a bunch of BUGs in the mem-helpers (including the MVC instruction), especially, to make them behave correctly on faults. # gpg: Signature made Mon 23 Sep 2019 09:01:21 BST # gpg: using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A # gpg: issuer "david@redhat.com" # gpg: Good signature from "David Hildenbrand <david@redhat.com>" [unknown] # gpg: aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full] # Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D FCCA 4DDE 10F7 00FF 835A * remotes/davidhildenbrand/tags/s390x-tcg-2019-09-23: (30 commits) tests/tcg: target/s390x: Test MVC tests/tcg: target/s390x: Test MVO s390x/tcg: MVO: Fault-safe handling s390x/tcg: MVST: Fault-safe handling s390x/tcg: MVZ: Fault-safe handling s390x/tcg: MVN: Fault-safe handling s390x/tcg: MVCIN: Fault-safe handling s390x/tcg: NC: Fault-safe handling s390x/tcg: XC: Fault-safe handling s390x/tcg: OC: Fault-safe handling s390x/tcg: MVCLU: Fault-safe handling s390x/tcg: MVC: Fault-safe handling on destructive overlaps s390x/tcg: MVCS/MVCP: Use access_memmove() s390x/tcg: Fault-safe memmove s390x/tcg: Fault-safe memset s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLY s390x/tcg: MVST: Fix storing back the addresses to registers s390x/tcg: MVST: Check for specification exceptions s390x/tcg: MVCS/MVCP: Properly wrap the length s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit mode ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * s390x/tcg: MVO: Fault-safe handlingDavid Hildenbrand2019-09-231-12/+15
| | | | | | | | | | | | | | | | Each operand can have a maximum length of 16. Make sure to prepare all reads/writes before writing. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVST: Fault-safe handlingDavid Hildenbrand2019-09-231-7/+17
| | | | | | | | | | | | | | | | | | Access at most single pages and document why. Using the access helpers might over-indicate watchpoints within the same page, I guess we can live with that. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVZ: Fault-safe handlingDavid Hildenbrand2019-09-231-4/+13
| | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVN: Fault-safe handlingDavid Hildenbrand2019-09-231-4/+13
| | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCIN: Fault-safe handlingDavid Hildenbrand2019-09-231-3/+12
| | | | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. Calculate the accessed range upfront - src is accessed right-to-left. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: NC: Fault-safe handlingDavid Hildenbrand2019-09-231-4/+13
| | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: XC: Fault-safe handlingDavid Hildenbrand2019-09-231-6/+12
| | | | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. While at it, increment the length once. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: OC: Fault-safe handlingDavid Hildenbrand2019-09-231-4/+13
| | | | | | | | | | | | | | We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCLU: Fault-safe handlingDavid Hildenbrand2019-09-231-3/+5
| | | | | | | | | | | | | | The last remaining bit is padding with two bytes. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVC: Fault-safe handling on destructive overlapsDavid Hildenbrand2019-09-231-2/+3
| | | | | | | | | | | | | | | | The last remaining bit for MVC is handling destructive overlaps in a fault-safe way. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCS/MVCP: Use access_memmove()David Hildenbrand2019-09-231-14/+12Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As we are moving between address spaces, we can use access_memmove() without checking for destructive overlaps (especially of real storage locations): "Each storage operand is processed left to right. The storage-operand-consistency rules are the same as for MOVE (MVC), except that when the operands overlap in real storage, the use of the common real- storage locations is not necessarily recognized." Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: Fault-safe memmoveDavid Hildenbrand2019-09-231-99/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace fast_memmove() variants by access_memmove() variants, that first try to probe access to all affected pages (maximum is two pages). Introduce access_get_byte()/access_set_byte(). We might be able to speed up memmove in special cases even further (do single-byte access, use memmove() for remaining bytes in page), however, we'll skip that for now. In MVCOS, simply always call access_memmove_as() and drop the TODO about LAP. LAP is already handled in the MMU. Get rid of adj_len_to_page(), which is now unused. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: Fault-safe memsetDavid Hildenbrand2019-09-231-20/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace fast_memset() by access_memset(), that first tries to probe access to all affected pages (maximum is two). We'll use the same mechanism for other types of accesses soon. Only in very rare cases (especially TLB_NOTDIRTY), we'll have to fallback to ld/st helpers. Try to speed up that case as suggested by Richard. We'll rework most involved handlers soon to do all accesses via new fault-safe helpers, especially MVC. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLYDavid Hildenbrand2019-09-232-0/+8
| | | | | | | | | | | | | | | | | | Although we basically ignore the index all the time for CONFIG_USER_ONLY, let's simply skip all the checks and always return MMU_USER_IDX in cpu_mmu_index() and get_mem_index(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVST: Fix storing back the addresses to registersDavid Hildenbrand2019-09-234-19/+19
| | | | | | | | | | | | | | | | | | | | 24 and 31-bit address space handling is wrong when it comes to storing back the addresses to the register. While at it, read gprs 0 implicitly. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVST: Check for specification exceptionsDavid Hildenbrand2019-09-231-0/+3
| | | | | | | | | | | | | | Bit position 32-55 of general register 0 must be zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCS/MVCP: Properly wrap the lengthDavid Hildenbrand2019-09-231-0/+6
| | | | | | | | | | | | | | ... and don't perform any move in case the length is zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit modeDavid Hildenbrand2019-09-231-3/+11
| | | | | | | | | | | | | | | | | | | | Triggered by a review comment from Richard, also MVCOS has a 32-bit length in 24/31-bit addressing mode. Add a new helper. Rename wrap_length() to wrap_length31(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCS/MVCP: Check for special operation exceptionsDavid Hildenbrand2019-09-231-0/+12
| | | | | | | | | | | | | | Let's perform the documented checks. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
| * s390x/tcg: MVCLU/MVCLE: Process max 4k bytes at a timeDavid Hildenbrand2019-09-231-23/+31
| | | | | | | | | | | | | | | | | | | | | | | | Let's stay within single pages. ... and indicate cc=3 in case there is work remaining. Keep unicode padding simple. While reworking, properly wrap the addresses. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-02-04 00:02:37 +0100