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* | target/i386: Implement debug_check_breakpointRichard Henderson2021-07-211-0/+12
* | target/arm: Implement debug_check_breakpointRichard Henderson2021-07-214-4/+8
* | target/alpha: Drop goto_tb path in gen_call_palRichard Henderson2021-07-211-13/+2Star
* | tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson2021-07-215-51/+26Star
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* target/arm: Remove duplicate 'plus1' function from Neon and SVE decodePeter Maydell2021-07-185-14/+4Star
* target/arm: Fix offsets for TTBCRRichard Henderson2021-07-181-4/+7
* target/riscv: hardwire bits in hideleg and hedelegJose Martins2021-07-151-23/+31
* target/riscv: csr: Remove redundant check in fp csr read/write routinesBin Meng2021-07-151-24/+0Star
* target/riscv: pmp: Fix some typosBin Meng2021-07-151-5/+5
* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-misc-20210713' int...Peter Maydell2021-07-147-631/+574Star
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| * target/hppa: Clean up DisasCondRichard Henderson2021-07-131-34/+9Star
| * target/hppa: Use tcg_constant_*Richard Henderson2021-07-131-38/+18Star
| * target/openrisc: Use dc->zero in gen_add, gen_addcRichard Henderson2021-07-131-5/+5
| * target/openrisc: Cache constant 0 in DisasContextRichard Henderson2021-07-131-6/+6
| * target/openrisc: Use tcg_constant_tl for dc->R0Richard Henderson2021-07-131-8/+2Star
| * target/openrisc: Use tcg_constant_*Richard Henderson2021-07-131-33/+9Star
| * target/alpha: Use tcg_constant_* elsewhereRichard Henderson2021-07-131-32/+14Star
| * target/alpha: Use tcg_constant_i64 for zero and litRichard Henderson2021-07-131-14/+2Star
| * target/alpha: Use dest_sink for HW_RET temporaryRichard Henderson2021-07-131-1/+1
| * target/alpha: Store set into rx flagRichard Henderson2021-07-131-5/+1Star
| * target/i386: Correct implementation for FCS, FIP, FDS and FDPZiqiao Kong2021-07-133-9/+56
| * target/i386: Split out do_fninitRichard Henderson2021-07-131-14/+8Star
| * target/i386: Trivial code motion and code style fixZiqiao Kong2021-07-131-435/+446
| * target/i386: Tidy hw_breakpoint_removeDmitry Voronetskiy2021-07-131-2/+2
* | target/i386: Fix cpuid level for AMDzhenwei pi2021-07-131-2/+9
* | target/i386: suppress CPUID leaves not defined by the CPU vendorMichael Roth2021-07-132-0/+9
* | i386: Hyper-V SynIC requires POST_MESSAGES/SIGNAL_EVENTS privilegesVitaly Kuznetsov2021-07-132-0/+12
* | i386: HV_HYPERCALL_AVAILABLE privilege bit is always neededVitaly Kuznetsov2021-07-131-5/+5
* | i386: kill off hv_cpuid_check_and_set()Vitaly Kuznetsov2021-07-131-68/+36Star
* | i386: expand Hyper-V features during CPU feature expansion timeVitaly Kuznetsov2021-07-134-4/+30
* | i386: make hyperv_expand_features() return boolVitaly Kuznetsov2021-07-131-19/+21
* | i386: hardcode supported eVMCS version to '1'Vitaly Kuznetsov2021-07-131-4/+35
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* Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210708' into...Peter Maydell2021-07-1247-1115/+1145
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| * target/s390x: split sysemu part of cpu modelsCho, Yu-Chen2021-07-075-416/+453
| * target/s390x: move kvm files into kvm/Cho, Yu-Chen2021-07-0714-28/+33
| * target/s390x: remove kvm-stub.cCho, Yu-Chen2021-07-072-122/+1Star
| * target/s390x: use kvm_enabled() to wrap call to kvm_s390_get_hpage_1mCho, Yu-Chen2021-07-071-1/+2
| * target/s390x: make helper.c sysemu-onlyCho, Yu-Chen2021-07-072-9/+2Star
| * target/s390x: split cpu-dump from helper.cCho, Yu-Chen2021-07-074-151/+178
| * target/s390x: move sysemu-only code out to cpu-sysemu.cCho, Yu-Chen2021-07-075-277/+326
| * target/s390x: start moving TCG-only code to tcg/Cho, Yu-Chen2021-07-0722-17/+18
| * target/s390x: rename internal.h to s390x-internal.hCho, Yu-Chen2021-07-0724-23/+23
| * target/s390x: remove tcg-stub.cCho, Yu-Chen2021-07-072-31/+1Star
| * target/s390x: meson: add target_user_archCho, Yu-Chen2021-07-071-0/+3
| * s390x/tcg: Fix m5 vs. m4 field for VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand2021-07-071-1/+1
| * target/s390x: Fix CC set by CONVERT TO FIXED/LOGICALUlrich Weigand2021-07-073-43/+83
| * s390x/cpumodel: add 3931 and 3932Christian Borntraeger2021-07-073-0/+25
* | Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into stagingPeter Maydell2021-07-124-29/+427
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| * | target/mips: Rewrite UHI errno_mips() using switch statementPhilippe Mathieu-Daudé2021-07-111-15/+9Star
| * | target/mips/tx79: Introduce SQ opcode (Store Quadword)Philippe Mathieu-Daudé2021-07-112-0/+28