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* | target/cris: Use MMUAccessType enum type when possiblePhilippe Mathieu-Daudé2021-02-222-9/+8Star
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* Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ...Peter Maydell2021-02-217-122/+123
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| * target/mips: Use GPR move functions in gen_HILO1_tx79()Philippe Mathieu-Daudé2021-02-211-17/+4Star
| * target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpersPhilippe Mathieu-Daudé2021-02-212-0/+22
| * target/mips: Rename 128-bit upper halve GPR registersPhilippe Mathieu-Daudé2021-02-211-1/+3
| * target/mips: Promote 128-bit multimedia registers as global onesPhilippe Mathieu-Daudé2021-02-213-27/+34
| * target/mips: Make cpu_HI/LO registers publicPhilippe Mathieu-Daudé2021-02-212-1/+2
| * target/mips: Include missing "tcg/tcg.h" headerPhilippe Mathieu-Daudé2021-02-211-0/+1
| * target/mips: Remove unused 'rw' argument from page_table_walk_refill()Philippe Mathieu-Daudé2021-02-211-3/+3
| * target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessTypePhilippe Mathieu-Daudé2021-02-212-10/+10
| * target/mips: Let get_seg*_physical_address() take MMUAccessType argPhilippe Mathieu-Daudé2021-02-211-5/+6
| * target/mips: Let get_physical_address() take MMUAccessType argumentPhilippe Mathieu-Daudé2021-02-211-10/+10
| * target/mips: Let raise_mmu_exception() take MMUAccessType argumentPhilippe Mathieu-Daudé2021-02-211-5/+5
| * target/mips: Let cpu_mips_translate_address() take MMUAccessType argPhilippe Mathieu-Daudé2021-02-212-4/+4
| * target/mips: Let do_translate_address() take MMUAccessType argumentPhilippe Mathieu-Daudé2021-02-211-3/+4
| * target/mips: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé2021-02-212-2/+2
| * target/mips: Remove unused MMU definitionsPhilippe Mathieu-Daudé2021-02-211-16/+0Star
| * target/mips: Remove access_type argument from get_physical_address()Philippe Mathieu-Daudé2021-02-211-13/+9Star
| * target/mips: Remove access_type arg from get_segctl_physical_address()Philippe Mathieu-Daudé2021-02-211-10/+10
| * target/mips: Remove access_type argument from get_seg_physical_addressPhilippe Mathieu-Daudé2021-02-211-3/+3
| * target/mips: Remove access_type argument from map_address() handlerPhilippe Mathieu-Daudé2021-02-212-12/+11Star
| * target/mips: fetch code with translator_ldPhilippe Mathieu-Daudé2021-02-211-10/+10
* | target/avr/cpu: Use device_class_set_parent_realize()Philippe Mathieu-Daudé2021-02-201-3/+1Star
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* i386: Add the support for AMD EPYC 3rd generation processorsBabu Moger2021-02-192-1/+110
* Hexagon build infrastructureTaylor Simpson2021-02-182-0/+192
* Hexagon (target/hexagon) translationTaylor Simpson2021-02-182-0/+841
* Hexagon (target/hexagon) TCG for floating point instructionsTaylor Simpson2021-02-181-0/+121
* Hexagon (target/hexagon) TCG for instructions with multiple definitionsTaylor Simpson2021-02-181-0/+198
* Hexagon (target/hexagon) TCG generationTaylor Simpson2021-02-182-0/+356
* Hexagon (target/hexagon) instruction classesTaylor Simpson2021-02-183-0/+174
* Hexagon (target/hexagon) macrosTaylor Simpson2021-02-181-0/+592
* Hexagon (target/hexagon) opcode data structuresTaylor Simpson2021-02-182-0/+200
* Hexagon (target/hexagon) generater phase 4 - decode treeTaylor Simpson2021-02-181-0/+351
* Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode treeTaylor Simpson2021-02-181-0/+188
* Hexagon (target/hexagon) generator phase 2 - generate header filesTaylor Simpson2021-02-1810-0/+1565
* Hexagon (target/hexagon) generator phase 1 - C preprocessor for semanticsTaylor Simpson2021-02-181-0/+88
* Hexagon (target/hexagon/imported) arch importTaylor Simpson2021-02-1814-0/+9236
* Hexagon (target/hexagon/fma_emu.[ch]) utility functionsTaylor Simpson2021-02-182-0/+738
* Hexagon (target/hexagon/conv_emu.[ch]) utility functionsTaylor Simpson2021-02-182-0/+208
* Hexagon (target/hexagon/arch.[ch]) utility functionsTaylor Simpson2021-02-182-0/+334
* Hexagon (target/hexagon) instruction printingTaylor Simpson2021-02-182-0/+173
* Hexagon (target/hexagon) instruction/packet decodeTaylor Simpson2021-02-182-0/+989
* Hexagon (target/hexagon) instruction attributesTaylor Simpson2021-02-182-0/+132
* Hexagon (target/hexagon) register fieldsTaylor Simpson2021-02-183-0/+104
* Hexagon (target/hexagon) instruction and packet typesTaylor Simpson2021-02-181-0/+74
* Hexagon (target/hexagon) architecture typesTaylor Simpson2021-02-181-0/+38
* Hexagon (target/hexagon) GDB StubTaylor Simpson2021-02-182-0/+49
* Hexagon (target/hexagon) scalar core helpersTaylor Simpson2021-02-182-0/+1152
* Hexagon (target/hexagon) register namesTaylor Simpson2021-02-181-0/+83
* Hexagon (target/hexagon) scalar core definitionTaylor Simpson2021-02-185-0/+599
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 09:59:52 +0100