summaryrefslogtreecommitdiffstats
path: root/tests/libqos
Commit message (Collapse)AuthorAgeFilesLines
* libqos: add virtio used ring supportStefan Hajnoczi2017-06-302-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing tests do not touch the virtqueue used ring. Instead they poll the virtqueue ISR register and peek into their request's device-specific status field. It turns out that the virtqueue ISR register can be set to 1 more than once for a single notification (see commit 83d768b5640946b7da55ce8335509df297e2c7cd "virtio: set ISR on dataplane notifications"). This causes problems for tests that assume a 1:1 correspondence between the ISR being 1 and request completion. Peeking at device-specific status fields is also problematic if the device has no field that can be abused for EINPROGRESS polling semantics. This is the case if all the field's values may be set by the device; there's no magic constant left for polling. It's time to process the used ring for completed requests, just like a real virtio guest driver. This patch adds the necessary APIs. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Tested-by: Kevin Wolf <kwolf@redhat.com> Message-id: 20170628184724.21378-3-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* libqos: fix typo in virtio.h QVirtQueue->used commentStefan Hajnoczi2017-06-301-1/+1
| | | | | | | | | | Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Tested-by: Kevin Wolf <kwolf@redhat.com> Message-id: 20170628184724.21378-2-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tests: fix virtio-blk-test leaksMarc-André Lureau2017-03-011-1/+2
| | | | | | | | | | Use qvirtio_pci_device_find_slot() to avoid leaking the non-hp device. Add assert() to avoid further leaks in the future. Use qvirtio_pci_device_free() to correctly free QVirtioPCIDevice. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* tests: add specialized device_find functionMarc-André Lureau2017-03-012-6/+27
| | | | | | | | | | Allow specifying which slot to look for the device. This will be used in the following patch to avoid leaking when multiple devices exists and we want to lookup the hotplug one. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* tests: fix usb-test leaksMarc-André Lureau2017-03-012-0/+6
| | | | | | | | | Fix the usb tests leaks. Spotted by ASAN. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* tests: fix vhost-user-test leaksMarc-André Lureau2017-03-012-0/+8
| | | | | | | Spotted by ASAN. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* tests: fix qmp response leakMarc-André Lureau2017-02-281-0/+1
| | | | | | | Spotted by ASAN. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
* libqos: fix spapr qpci_map()Laurent Vivier2017-01-311-2/+2
| | | | | Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos/ahci: Add get_sense and test_readyJohn Snow2016-11-142-0/+67
| | | | | | | | | | Required for tray tests once a medium may have changed. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Message-id: 1478553214-497-6-git-send-email-jsnow@redhat.com [Line length edit --js] Signed-off-by: John Snow <jsnow@redhat.com>
* libqos/ahci: Add ATAPI tray macrosJohn Snow2016-11-142-2/+35
| | | | | | | | | | | (1) Add START_STOP_UNIT command to ahci-test suite (2) Add eject/start macro commands; this is not a data transfer command so it is not well-served by the existing generic pipeline. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Message-id: 1478553214-497-5-git-send-email-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
* libqos/ahci: Support expected errorsJohn Snow2016-11-142-5/+14
| | | | | | | | | | Sometimes we know we'll get back an error, so let's have the test framework understand that. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Message-id: 1478553214-497-4-git-send-email-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
* ahci-test: test atapi read_cd with bcl, nb_sectors = 0John Snow2016-11-142-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | Commit 9ef2e93f introduced the concept of tagging ATAPI commands as NONDATA, but this introduced a regression for certain commands better described as CONDDATA. read_cd is such a command that both requires a non-zero BCL if a transfer size is set, but is perfectly content to accept a zero BCL if the transfer size is 0. This test adds a regression test for the case where BCL and nb_sectors are both 0. Flesh out the CDROM tests by: (1) Allowing the test to specify a BCL (2) Allowing the buffer comparison test to compare a 0-size buffer (3) Fix the BCL specification in libqos (It is LE, not BE) (4) Add a nice human-readable message for future SCSI command additions Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Message-id: 1477970211-25754-4-git-send-email-jsnow@redhat.com [Line length edit --js] Signed-off-by: John Snow <jsnow@redhat.com>
* libqos: Change PCI accessors to take opaque BAR handleDavid Gibson2016-10-288-158/+157Star
| | | | | | | | | | | | | | | | | | | | | | | | | The usual use model for the libqos PCI functions is to map a specific PCI BAR using qpci_iomap() then pass the returned token into IO accessor functions. This, and the fact that iomap() returns a (void *) which actually contains a PCI space address, kind of suggests that the return value from iomap is supposed to be an opaque token. ..except that the callers expect to be able to add offsets to it. Which also assumes the compiler will support pointer arithmetic on a (void *), and treat it as working with byte offsets. To clarify this situation change iomap() and the IO accessors to take a definitely opaque BAR handle (enforced with a wrapper struct) along with an offset within the BAR. This changes both the functions and all the callers. There were a number of places that checked if iomap() returned non-NULL, and or initialized it to NULL before hand. Since iomap() already assert()s if it fails to map the BAR, these tests were mostly pointless and are removed. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
* tests: Don't assume structure of PCI IO base in ahci-testDavid Gibson2016-10-282-0/+2
| | | | | | | | | | | | | | | | | | | | | In a couple of places ahci-test makes assumptions about how the tokens returned from qpci_iomap() are formatted in ways it probably shouldn't. First in verify_state() it uses a non-NULL token to indicate that the AHCI device has been enabled (part of enabling is to iomap()). This changes it to use an explicit 'enabled' flag instead. Second, it uses the fact that the token contains a PCI address, stored when the BAR is mapped during initialization to check that the BAR has the same value after a migration. This changes it to explicitly read the BAR register before and after the migration and compare. Together, these changes will make the test more robust against changes to the internals of the libqos PCI layer. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Add 64-bit PCI IO accessorsDavid Gibson2016-10-285-12/+60
| | | | | | | | | | | | | | | | | | | Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32 bit reads and writes. It's likely that we'll want 64-bit accesses in the future (plenty of modern peripherals will have 64-bit reigsters). This adds them. For PIO (not MMIO) accesses on the PC backend, this is implemented as two 32-bit ins or outs. That's not ideal but AFAICT x86 doesn't have 64-bit versions of in and out. This patch also converts the single current user of 64-bit accesses - virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte reads. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Implement mmio accessors in terms of mem{read,write}David Gibson2016-10-284-96/+14Star
| | | | | | | | | | | | | | | | | | | | | In the libqos PCI code we now have accessors both for registers (byte significance preserving) and for streaming data (byte address order preserving). These exist in both the interface for qtest drivers and in the machine specific backends. However, the register-style accessors aren't actually necessary in the backend. They can be implemented in terms of the byte address order preserving accessors by the libqos wrappers. This works because PCI is always little endian. This does assume that the back end byte address order preserving accessors will perform the equivalent of a single bus transaction for short lengths. This is the case, and in fact they currently end up using the same cpu_physical_memory_rw() implementation within the qtest accelerator. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Add streaming accessors for PCI MMIODavid Gibson2016-10-284-0/+53
| | | | | | | | | | | | | | | | Currently PCI memory (aka MMIO) space is accessed via a set of readb/writeb style accessors. This is what we want for accessing discrete registers of a certain size. However, there are a few cases where we instead need a "bag of bytes" style streaming interface to PCI MMIO space. This can be either for streaming data style registers or when there's actual memory rather than registers in PCI space, for example frame buffers or ivshmem. This patch adds backend callbacks, and libqos wrappers for this type of byte address order preserving accesses. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Better handling of PCI legacy IODavid Gibson2016-10-282-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usual model for PCI IO with libqos is to use qpci_iomap() to map a specific BAR for a PCI device, then perform IOs within that BAR using qpci_io_{read,write}*(). However, certain devices also have legacy PCI IO. In this case, instead of (or as well as) being accessed via PCI BARs, the device can be accessed via certain well-known, fixed addresses in PCI IO space. Two existing tests use legacy PCI IO, and take different flawed approaches to it: * tco-test manually constructs a tco_io_base value instead of calling qpci_iomap(), which assumes internal knowledge of the structure of the value it shouldn't have * ide-test uses direct in*() and out*() calls instead of using qpci_io_*() accessors, meaning it's not portable to non-x86 machine types. This patch implements a new qpci_iomap_legacy() interface which gets a handle in the same format as qpci_iomap() but refers to a region in the legacy PIO space. For a device which has the same registers available both in a BAR and in legacy space (quite common), this allows the same test code to test both options with just a different iomap() at the beginning. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Move BAR assignment to common codeDavid Gibson2016-10-284-176/+63Star
| | | | | | | | | | | | | | | | | | | | | | | | The PCI backends in libqos each supply an iomap() and iounmap() function which is used to set up a specified PCI BAR. But PCI BAR allocation takes place entirely within PCI space, so doesn't really need per-backend versions. For example, Linux includes generic BAR allocation code used on platforms where that isn't done by firmware. This patch merges the BAR allocation from the two existing backends into a single simplified copy. The back ends just need to set up some parameters describing the window of PCI IO and PCI memory addresses which are available for allocation. Like both the existing versions the new one uses a simple bump allocator. Note that (again like the existing versions) this doesn't really handle 64-bit memory BARs properly. It is actually used for such a BAR by the ivshmem test, and apparently the 32-bit MMIO BAR logic is close enough to work, as long as the BAR isn't too big. Fixing that to properly handle 64-bit BAR allocation is a problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Handle PCI IO de-multiplexing in common codeDavid Gibson2016-10-284-126/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI IO space (aka PIO, aka legacy IO) and PCI memory space (aka MMIO) are distinct address spaces by the PCI spec (although parts of one might be aliased to parts of the other in some cases). However, qpci_io_read*() and qpci_io_write*() can perform accesses to either space depending on parameter. That's convenient for test case drivers, since there are a fair few devices which can be controlled via either a PIO or MMIO BAR but with an otherwise identical driver. This is implemented by having addresses below 64kiB treated as PIO, and those above treated as MMIO. This works because low addresses in memory space are generally reserved for DMA rather than MMIO. At the moment, this demultiplexing must be handled by each PCI backend (pc and spapr, so far). There's no real reason for this - the current encoding is likely to work for all platforms, and even if it doesn't we can still use a more complex common encoding since the value returned from iomap are semi-opaque. This patch moves the demultiplexing into the common part of the libqos PCI code, with the backends having simpler, separate accessors for PIO and MMIO space. This also means we have a way of explicitly accessing either space if it's necessary for some special case. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* libqos: Give qvirtio_config_read*() consistent semanticsDavid Gibson2016-10-282-19/+22
| | | | | | | | | | | | | | | | | | | The 'addr' parameter to qvirtio_config_read*() doesn't have a consistent meaning: when using the virtio-pci versions, it's a full PCI space address, but for virtio-mmio, it's an offset from the device's base mmio address. This means that the callers need to do different things to calculate the addresses in the two cases, which rather defeats the purpose of function pointer backends. All the current users of these functions are using them to retrieve variables from the device specific portion of the virtio config space. So, this patch alters the semantics to always be an offset into that device specific config area. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
* tests: enable virtio tests on SPAPRLaurent Vivier2016-10-281-2/+22
| | | | | | | | but disable MSI-X tests on SPAPR as we can't check the result (the memory region used on PC is not readable on SPAPR). Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* tests: rename target_big_endian() as qvirtio_is_big_endian()Laurent Vivier2016-10-282-1/+7
| | | | | | | | | | | | | | Move the definition to libqos/virtio.h as it must be used only with virtio functions. Add a QVirtioDevice parameter as it will be needed to know if the virtio device is using virtio 1.0 specification and thus is always little-endian (to do) Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* tests: move QVirtioBus pointer into QVirtioDeviceLaurent Vivier2016-10-284-71/+61Star
| | | | | | | | | | This allows to not have to pass bus and device for every virtio functions. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> [dwg: Fix style nit] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* tests: don't check if qtest_spapr_boot() returns NULLLaurent Vivier2016-10-281-0/+2
| | | | | | | | | | | | qtest_spapr_boot()/qtest_pc_boot()/qtest_boot() call qtest_vboot() and qtest_vboot() calls g_malloc(), and g_malloc() never fails: if memory allocation fails, the application is terminated. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Improved placement of PCI host bridges in guest memory mapDavid Gibson2016-10-161-5/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the MMIO space for accessing PCI on pseries guests begins at 1 TiB in guest address space. Each PCI host bridge (PHB) has a 64 GiB chunk of address space in which it places its outbound PIO and 32-bit and 64-bit MMIO windows. This scheme as several problems: - It limits guest RAM to 1 TiB (though we have a limited fix for this now) - It limits the total MMIO window to 64 GiB. This is not always enough for some of the large nVidia GPGPU cards - Putting all the windows into a single 64 GiB area means that naturally aligning things within there will waste more address space. In addition there was a miscalculation in some of the defaults, which meant that the MMIO windows for each PHB actually slightly overran the 64 GiB region for that PHB. We got away without nasty consequences because the overrun fit within an unused area at the beginning of the next PHB's region, but it's not pretty. This patch implements a new scheme which addresses those problems, and is also closer to what bare metal hardware and pHyp guests generally use. Because some guest versions (including most current distro kernels) can't access PCI MMIO above 64 TiB, we put all the PCI windows between 32 TiB and 64 TiB. This is broken into 1 TiB chunks. The first 1 TiB contains the PIO (64 kiB) and 32-bit MMIO (2 GiB) windows for all of the PHBs. Each subsequent TiB chunk contains a naturally aligned 64-bit MMIO window for one PHB each. This reduces the number of allowed PHBs (without full manual configuration of all the windows) from 256 to 31, but this should still be plenty in practice. We also change some of the default window sizes for manually configured PHBs to saner values. Finally we adjust some tests and libqos so that it correctly uses the new default locations. Ideally it would parse the device tree given to the guest, but that's a more complex problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
* libqos: Limit spapr-pci to 32-bit MMIO for nowDavid Gibson2016-10-161-17/+15Star
| | | | | | | | | | | | | | | | | | | Currently the functions in pci-spapr.c (like pci-pc.c on which it's based) don't distinguish between 32-bit and 64-bit PCI MMIO. At the moment, the qemu side implementation is a bit weird and has a single MMIO window straddling 32-bit and 64-bit regions, but we're likely to change that in future. In any case, pci-pc.c - and therefore the testcases using PCI - only handle 32-bit MMIOs for now. For spapr despite whatever changes might happen with the MMIO windows, the 32-bit window is likely to remain at 2..4 GiB in PCI space. So, explicitly limit pci-spapr.c to 32-bit MMIOs for now, we can add 64-bit MMIO support back in when and if we need it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
* libqos: Correct error in PCI hole sizing for spaprDavid Gibson2016-10-161-2/+4
| | | | | | | | | | | | | | | | | | | | | | In pci-spapr.c (as in pci-pc.c from which it was derived), the pci_hole_start/pci_hole_size and pci_iohole_start/pci_iohole_size pairs[1] essentially define the region of PCI (not CPU) addresses in which MMIO or PIO BARs respectively will be allocated. The size value is relative to the start value. But in pci-spapr.c it is set to the entire size of the window supported by the (emulated) hardware, but the start values are *not* at the beginning of the emulated windows. That means if you tried to map enough PCI BARs, we'd messily overrun the IO windows, instead of failing in iomap as we should. This patch corrects this by calculating the hole sizes from the location of the window in PCI space and the hole start. [1] Those are bad names, but that's a problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
* libqos: Isolate knowledge of spapr memory map to qpci_init_spapr()David Gibson2016-10-161-49/+64
| | | | | | | | | | | | | | | | | | | | The libqos code for accessing PCI on the spapr machine type uses IOBASE() and MMIOBASE() macros to determine the address in the CPU memory map of the windows to PCI address space. This is a detail of the implementation of PCI in the machine type, it's not specified by the PAPR standard. Real guests would get the addresses of the PCI windows from the device tree. Finding the device tree in libqos would be awkward, but we can at least localize this knowledge of the implementation to the init function, saving it in the QPCIBusSPAPR structure for use by the accessors. That leaves only one place to fix if we alter the location of the PCI windows, as we're planning to do. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
* qtest: ask endianness of the target in qtest_init()Laurent Vivier2016-10-141-1/+1
| | | | | | | | | | | | | | | The target endianness is not deduced anymore from the architecture name but asked directly to the guest, using a new qtest command: "endianness". As it can't change (this is the value of TARGET_WORDS_BIGENDIAN), we store it to not have to ask every time we want to know if we have to byte-swap a value. Signed-off-by: Laurent Vivier <lvivier@redhat.com> CC: Greg Kurz <groug@kaod.org> CC: David Gibson <david@gibson.dropbear.id.au> CC: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos: use generic qtest_shutdown()Laurent Vivier2016-10-064-5/+20
| | | | | | | | | | | | | Machine specific shutdown function can be registered by the machine specific qtest_XXX_boot() if needed. So we will not have to test twice the architecture (on boot and on shutdown) if the test can be run on several architectures. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos: add PCI management in qtest_vboot()/qtest_shutdown()Laurent Vivier2016-10-067-10/+31
| | | | | | | Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos: add PPC64 PCI supportLaurent Vivier2016-10-066-23/+375
| | | | | | Signed-off-by: Laurent Vivier <lvivier@redhat.com> [dwg: Fixed build problem on 32-bit hosts] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos: fix qvring_init()Laurent Vivier2016-09-281-1/+1
| | | | | | | | | | | | | | | | "vq->desc[i].addr" is a 64bit value, so write it with writeq(), not writew(). struct vring_desc { __virtio64 addr; __virtio32 len; __virtio16 flags; __virtio16 next; }; Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-id: 1474903450-9605-1-git-send-email-lvivier@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tests: add RTAS command in the protocolLaurent Vivier2016-09-232-0/+82
| | | | | | | | | | | Add a first test to validate the protocol: - rtas/get-time-of-day compares the time from the guest with the time from the host. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* libqos: define SPAPR libqos functionsLaurent Vivier2016-09-236-1/+97
| | | | | | | | | | | | | | | | | Define spapr_alloc_init()/spapr_alloc_init_flags()/spapr_alloc_uninit() to allocate and use SPAPR guest memory Define qtest_spapr_vboot()/qtest_spapr_boot()/qtest_spapr_shutdown() to start SPAPR guest with QOSState initialized for it (memory management) Move qtest_irq_intercept_in() from generic part to PC part. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* tests: fix qvirtqueue_kickLaurent Vivier2016-09-131-3/+3
| | | | | | | | | | | | | | | | | vq->avail.idx and vq->avail->ring[] are a 16bit values, so read and write them with readw()/writew() instead of readl()/writel(). To read/write a 16bit value with a 32bit accessor works fine on little-endian CPU but not on big endian CPU. [An equivalent patch for the writew() calls was also sent by Zhang Shuai <zhangshuai13@huawei.com>. --Stefan] Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-id: 1472330054-22607-1-git-send-email-lvivier@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Clean up ill-advised or unusual header guardsMarkus Armbruster2016-07-123-6/+6
| | | | | | | Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* libqos: add qvirtqueue_cleanup()Stefan Hajnoczi2016-06-204-0/+29
| | | | | | | | | | qvirtqueue_setup() allocates the vring and virtqueue state. So far there has been no function to free it. Callers have been using guest_free() for the vring but forgot to free the QVirtQueue state. This patch solves the memory leak by introducing qvirtqueue_cleanup(). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* libqos: drop duplicated virtio_pci.h definitionsStefan Hajnoczi2016-06-202-37/+22Star
| | | | | Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-9-git-send-email-stefanha@redhat.com
* libqos: drop duplicated virtio_vring.h structsStefan Hajnoczi2016-06-202-37/+12Star
| | | | | | | | The descriptor element, used, and avail vring structs are defined in virtio_ring.h. There is no need to duplicate them in libqos virtio. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-6-git-send-email-stefanha@redhat.com
* libqos: drop duplicated virtio_ring.h bit definitionsStefan Hajnoczi2016-06-204-24/+13Star
| | | | | | | | | | | | | | | | | | Note that virtio_ring.h defines feature bits using their bit number: #define VIRTIO_RING_F_INDIRECT_DESC 28 On the other hand libqos virtio.h uses the bit mask: #define QVIRTIO_F_RING_INDIRECT_DESC 0x10000000 The patch makes the necessary adjustments. I have used "1u << BITMASK" instead of "1ULL << BITMASK" because the 64-bit feature fields are not implemented in libqos virtio. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-5-git-send-email-stefanha@redhat.com
* libqos: drop duplicated virtio_config.h definitionsStefan Hajnoczi2016-06-202-18/+10Star
| | | | | | | | | Note that VIRTIO_F_ANY_LAYOUT and VIRTIO_F_NOTIFY_ON_EMPTY are bit numbers in virtio_config.h but bit masks in qtest virtio.h. Therefore it's necessary to change users from X to (1u << X). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-4-git-send-email-stefanha@redhat.com
* libqos: drop duplicated PCI vendor ID definitionStefan Hajnoczi2016-06-202-3/+2Star
| | | | | Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-3-git-send-email-stefanha@redhat.com
* libqos: use virtio_ids.h for device ID definitionsStefan Hajnoczi2016-06-201-9/+0Star
| | | | | | | | Avoid redefining device IDs. Use the standard Linux headers that are already in the source tree. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1462798061-30382-2-git-send-email-stefanha@redhat.com
* tests: Remove unnecessary glib.h includesPeter Maydell2016-06-0714-14/+0Star
| | | | | | | | | | | Remove glib.h includes, as it is provided by osdep.h. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* qemu-common: stop including qemu/host-utils.h from qemu-common.hPaolo Bonzini2016-05-191-0/+1
| | | | | | | Move it to the actual users. There are some inclusions of qemu/host-utils.h in headers, but they are all necessary. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-03-241-2/+1Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Log filtering from Alex and Peter * Chardev fix from Marc-André * config.status tweak from David * Header file tweaks from Markus, myself and Veronia (Outreachy candidate) * get_ticks_per_sec() removal from Rutuja (Outreachy candidate) * Coverity fix from myself * PKE implementation from myself, based on rth's XSAVE support # gpg: Signature made Thu 24 Mar 2016 20:15:11 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: (28 commits) target-i386: implement PKE for TCG config.status: Pass extra parameters char: translate from QIOChannel error to errno exec: fix error handling in file_ram_alloc cputlb: modernise the debug support qemu-log: support simple pid substitution for logs target-arm: dfilter support for in_asm qemu-log: dfilter-ise exec, out_asm, op and opt_op qemu-log: new option -dfilter to limit output qemu-log: Improve the "exec" TB execution logging qemu-log: Avoid function call for disabled qemu_log_mask logging qemu-log: correct help text for -d cpu tcg: pass down TranslationBlock to tcg_code_gen util: move declarations out of qemu-common.h Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND hw: explicitly include qemu-common.h and cpu.h include/crypto: Include qapi-types.h or qemu/bswap.h instead of qemu-common.h isa: Move DMA_transfer_handler from qemu-common.h to hw/isa/isa.h Move ParallelIOArg from qemu-common.h to sysemu/char.h Move QEMU_ALIGN_*() from qemu-common.h to qemu/osdep.h ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Conflicts: scripts/clean-includes
| * fw_cfg: Split fw_cfg_keys.h off fw_cfg.hMarkus Armbruster2016-03-221-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of fw_cfg.h's contents is #ifndef NO_QEMU_PROTOS. This lets a few places include it without satisfying the dependencies of the suppressed code. If you somehow include it with NO_QEMU_PROTOS, any future includes are ignored. Unnecessarily unclean. Move the stuff not under NO_QEMU_PROTOS into its own header fw_cfg_keys.h, and include it as appropriate. Tidy up the moved code to please checkpatch. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | tests/libqos/pci-pc: Fix qpci_pc_iomap() to map BARs alignedMarkus Armbruster2016-03-211-2/+6
|/ | | | | | | | | | | | | | | | | qpci_pc_iomap() maps BARs one after the other, without padding. This is wrong. PCI Local Bus Specification Revision 3.0, 6.2.5.1. Address Maps: "all address spaces used are a power of two in size and are naturally aligned". That's because the size of a BAR is given by the number of address bits the device decodes, and the BAR needs to be mapped at a multiple of that size to ensure the address decoding works. Fix qpci_pc_iomap() accordingly. This takes care of a FIXME in ivshmem-test. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <1458066895-20632-7-git-send-email-armbru@redhat.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 21:00:03 +0100