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* | | tests/tcg: target/mips: Add support for MSA big-endian target testingsAleksandar Markovic2019-06-265-633/+1631
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add files for MSA big-endian target testings (copiling and running). Little-endian files are renamed and ammended too. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-6-git-send-email-aleksandar.markovic@rt-rk.com>
* | | tests/tcg: target/mips: Amend tests for MSA int multiply instructionsAleksandar Markovic2019-06-2610-0/+1744
| | | | | | | | | | | | | | | | | | | | | | | | Amend tests for MSA int multiply instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-5-git-send-email-aleksandar.markovic@rt-rk.com>
* | | tests/tcg: target/mips: Amend tests for MSA int dot product instructionsAleksandar Markovic2019-06-2615-0/+2644
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add tests for instructions whose result depends on the value in destination register (prior to instruction execution). Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-4-git-send-email-aleksandar.markovic@rt-rk.com>
* | | tests/tcg: target/mips: Add tests for MSA move instructionsAleksandar Markovic2019-06-264-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | Add tests for MSA move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-3-git-send-email-aleksandar.markovic@rt-rk.com>
* | | tests/tcg: target/mips: Add tests for MSA bit move instructionsAleksandar Markovic2019-06-2614-4/+2415
|/ / | | | | | | | | | | | | | | Add tests for MSA bit move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-2-git-send-email-aleksandar.markovic@rt-rk.com>
* | tests/tcg: target/mips: Amend tests for MSA pack instructionsAleksandar Markovic2019-06-2113-12/+708
| | | | | | | | | | | | | | | | | | Add tests for cases when destination register is the same as one of source registers. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561031359-6727-3-git-send-email-aleksandar.markovic@rt-rk.com>
* | tests/tcg: target/mips: Include isa/ase and group name in test outputAleksandar Markovic2019-06-21260-736/+1492
|/ | | | | | | | | | | | | | | | For better appearance and usefullnes, include ISA/ASE name and instruction group name in the output of tests. For example, all this data will be displayed for FMAX_A.W test: | MSA | Float Max Min | FMAX_A.W | | PASS: 80 | FAIL: 0 | elapsed time: 0.16 ms | (the data will be displayed in one row; they are presented here in two rows not to exceed the width of the commit message) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561031359-6727-2-git-send-email-aleksandar.markovic@rt-rk.com>
* target/arm: Fix output of PAuth AuthRichard Henderson2019-06-132-1/+62
| | | | | | | | | | | | | The ARM pseudocode installs the error_code into the original pointer, not the encrypted pointer. The difference applies within the 7 bits of pac data; the result should be the sign extension of bit 55. Add a testcase to that effect. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/tcg/x86_64: add a PVH crt.o for x86_64 system testsAlex Bennée2019-06-123-0/+311
| | | | | | | Instead of doing the full real to 64 bit dance we are attempting to leverage Xen's PVH boot spec to go from 32 bit to 64 bit. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: clean-up VPATH/TESTS for i386Alex Bennée2019-06-121-7/+2Star
| | | | | | | | Since we only run build the multiarch tests and we use a fully resolved path for the crt object we don't need the wildcard or VPATH messing about. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: better detect truncated readsAlex Bennée2019-06-121-5/+31
| | | | | | | | | If we've truncated a wider read we can detect the condition earlier by looking at the number of zeros we've read. So we don't trip up on cases where we have written zeros to the start of the buffer we also ensure we only start each offset read from the right address. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: target/mips: Add README for MSA testsAleksandar Markovic2019-06-073-0/+904
| | | | | | | | | Add README for MSA tests. This is just to explain how to run tests even without Makefile. Makefile will be provided later on. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-11-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Add tests for MSA FP max/min instructionsAleksandar Markovic2019-06-078-0/+1240
| | | | | | | | | | | | | | | | | | Add tests for MSA FP max/min instructions. This includes following instructions: * FMAX.W - float maximum (words) * FMAX.D - float maximum (doublewords) * FMAX_A.W - float maximum absolute (words) * FMAX_A.D - float maximum absolute (doublewords) * FMIN.W - float minimum (words) * FMIN.D - float minimum (doublewords) * FMIN_A.W - float minimum absolute (words) * FMIN_A.D - float minimum absolute (doublewords) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-10-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Add utility function reset_msa_registers()Aleksandar Markovic2019-06-07227-4/+504
| | | | | | | | | | | | Add function reset_msa_registers() and utilize it in each MSA test. This is needed to ensure independency of test results on the state of MSA registers before test execution. This also allows for correction of tests for VSHF* instructions, that are now independent on the previous state of MSA registers. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-9-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Move four tests to a better locationAleksandar Markovic2019-06-074-0/+0
| | | | | | | | | | Move tests for <MUL|MULR>_Q.<H|B> from "integer multiply" directory to "fixed-point multiply" directory, since they do not operate on integers, but on fixed point numbers. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-8-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Add tests for MSA shift instructionsAleksandar Markovic2019-06-0720-0/+3060
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add tests for MSA shift instructions. This includes following instructions: * SLL.B - shift left logical (bytes) * SLL.H - shift left logical (halfwords) * SLL.W - shift left logical (words) * SLL.D - shift left logical (doublewords) * SRA.B - shift right arithmetic (bytes) * SRA.H - shift right arithmetic (halfwords) * SRA.W - shift right arithmetic (words) * SRA.D - shift right arithmetic (doublewords) * SRAR.B - shift right arithmetic rounded (bytes) * SRAR.H - shift right arithmetic rounded (halfwords) * SRAR.W - shift right arithmetic rounded (words) * SRAR.D - shift right arithmetic rounded (doublewords) * SRL.B - shift right logical (bytes) * SRL.H - shift right logical (halfwords) * SRL.W - shift right logical (words) * SRL.D - shift right logical (doublewords) * SRLR.B - shift right logical rounded (bytes) * SRLR.H - shift right logical rounded (halfwords) * SRLR.W - shift right logical rounded (words) * SRLR.D - shift right logical rounded (doublewords) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-7-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Amend and rearrange MSA wrappersAleksandar Markovic2019-06-071-160/+300
| | | | | | | | | Amend and rearrange MSA wrappers to follow the same organization as in MSA tests. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-6-git-send-email-aleksandar.markovic@rt-rk.com>
* tests/tcg: target/mips: Add tests for MSA bit set instructionsAleksandar Markovic2019-06-0112-0/+1836
| | | | | | | | | | | | | | | | | | | | | | Add tests for MSA bit set instructions. This includes following instructions: * BCLR.B - clear bit (bytes) * BCLR.H - clear bit (halfwords) * BCLR.W - clear bit (words) * BCLR.D - clear bit (doublewords) * BNEG.B - negate bit (bytes) * BNEG.H - negate bit (halfwords) * BNEG.W - negate bit (words) * BNEG.D - negate bit (doublewords) * BSET.B - set bit (bytes) * BSET.H - set bit (halfwords) * BSET.W - set bit (words) * BSET.D - set bit (doublewords) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1555699081-24577-5-git-send-email-aleksandar.markovic@rt-rk.com>
* target/mips: Amend and cleanup MSA TCG testsAleksandar Markovic2019-06-01155-240/+4211
| | | | | | | | | | | | | Add missing bits and peaces of the tests of the emulation of certain MSA (non-immediate variants): some tests were missing two last cases; some instructions were missing wrappers; some test included wrong headers; some tests were missing altogether; updated some copywright preambles; do several other minor cleanups. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1555699081-24577-4-git-send-email-aleksandar.markovic@rt-rk.com>
* tests: Fix up docker cross builds for ppc64 (BE) targetsDavid Gibson2019-05-291-0/+3
| | | | | | | | We currently have docker cross building targets for powerpc (32-bit, BE) and ppc64el (64-bit, LE), but not for pcp64 (64-bit, BE). This is an irritating gap in make check-tcg coverage so correct it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* tests/tcg/alpha: add system boot.SRichard Henderson2019-05-283-0/+575
| | | | | | | | | | This provides the bootstrap and low level helper functions for an alpha kernel. We use direct access to the DP264 serial port for test output, and hard machine halt to exit the emulation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190501184306.15208-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/multiarch: expand system memory test to cover moreAlex Bennée2019-05-283-72/+282
| | | | | | | | | | | | | | Expand the memory test to cover move of the softmmu code. Specifically we: - improve commentary - add some helpers (for later BE support) - reduce boiler plate into helpers - add signed reads at various sizes/offsets - required -DCHECK_UNALIGNED Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/minilib: support %c format charAlex Bennée2019-05-281-0/+3
| | | | | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/multiarch: move the system memory testAlex Bennée2019-05-281-0/+0
| | | | | | | | | There is nothing inherently architecture specific about the memory test although we may have to manage different restrictions of unaligned access across architectures. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/aarch64: add system boot.SAlex Bennée2019-05-283-0/+295
| | | | | | | | | | This provides the bootstrap and low level helper functions for an aarch64 kernel. We use semihosting to handle test output and exiting the emulation. semihosting's parameter passing is a little funky so we end up using the stack and pointing to that as the parameter block. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/multiarch: add hello world system testAlex Bennée2019-05-282-1/+1
| | | | | | | | This is not really i386 only, we can have the same test for all architectures supporting system tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/multiarch: add support for multiarch system testsAlex Bennée2019-05-282-0/+15
| | | | | | | | | | We can certainly support some common tests for system emulation that make use of our minimal defined boot.S support. It will still be up to individual architectures to ensure they build so we provide a MULTIARCH_TESTS variable that they can tack onto TESTS themselves. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* target/xtensa: implement exclusive access optionMax Filippov2019-05-151-0/+48
| | | | | | | | | | | The Exclusive Instructions provide a general-purpose mechanism for atomic updates of memory-based synchronization variables that can be used for exclusion algorithms. Use cmpxchg-based implementation that is sufficient for the typical use of exclusive access in atomic operations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: clean up test setMax Filippov2019-03-233-167/+1Star
| | | | | | | | | | | Drop test_fail: we know that exit simcall works. Now that it's not run automatically there's no point in keeping it. Drop test_pipeline: we're not modeling pipeline, we don't control ccount and there's no plan to do so. Enable test_boolean: it won't break on cores without boolean option, it will do testing on cores with boolean option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: fix break_dependency for repeated resourcesMax Filippov2019-03-221-0/+17
| | | | | | | | | | | | | | | | break_dependency incorrectly handles the case of dependency on an opcode that references the same register multiple times. E.g. the following instruction is translated incorrectly: { or a2, a3, a3 ; or a3, a2, a2 } This happens because resource indices of both dependency graph nodes are incremented, and a copy for the second instance of the same register in the ending node is not done. Only increment resource index of the ending node of the dependency. Add test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/arm: account for pauth randomnessAlex Bennée2019-03-121-6/+20
| | | | | | | | | Pointer authentication isn't guaranteed to always detect a clash between different keys. Take this into account in the test by running several times and checking the percentage hit rate of the test. Cc: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/i386: add memory test to exercise softmmuAlex Bennée2019-03-121-0/+243
| | | | | | | This is a simple test to check various access patterns to memory including unaligned access. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/i386: add system mode Hello World testAlex Bennée2019-03-124-0/+255
| | | | | | | | | | | This introduces the build framework for simple i386 system tests. The first test is the eponymous "Hello World" which simply outputs the text on the serial port and then exits. I've included the framework for x86_64 but it is not in this series as it is a work in progress. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: provide a minilib for system testsAlex Bennée2019-03-124-0/+180
| | | | | | | | | | | | | | | | | We will likely want a few common functions to make up for the fact we don't have a libc and we don't want to feel like we are programming by banging rocks together. I've purloined the printf function from: https://git.virtualopensystems.com/dev/tcg_baremetal_tests Although I have tweaked the names to avoid confusing GCC about clashing with builtins. Cc: Alexander Spyridakis <a.spyridakis@virtualopensystems.com> Cc: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: enable cris base user-mode testsAlex Bennée2019-03-123-168/+64Star
| | | | | | | | | | | | This converts the existing Makefile into a Makefile.target and updates it so it can be called by the tcg build system. The original Makefile didn't set -cpu except for the v17 tests however that has broken (I assume because linux-user is a "max" cpu) so here I force it to be crisv17. I've also replicated the GNU simulator targets (run-FOO-on-sim). Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/cris: align mul operationsAlex Bennée2019-03-121-0/+11
| | | | | | | | To avoid: Error: dangerous MULS/MULU location; give it higher alignment Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/cris: comment out the ccs testAlex Bennée2019-03-121-7/+7
| | | | | | Evidently upstream gcc doesn't like this opcode. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: split cris tests into bare and libc directoriesAlex Bennée2019-03-12102-0/+0
| | | | | | | | | | Bare tests are standalone assembly tests that don't require linking to any libc and hence can be built with kernel only compilers. The libc tests need a compiler capable of building properly linked userspace binaries. As we don't have such a cross compiler at the moment we won't be building those tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/cris: cleanup sys.cAlex Bennée2019-03-121-48/+52
| | | | | | | | | | | | | This is a mini library which provides helper functions to the tests which are all currently written in assembly. A bunch of minor changes: - removed libc related headers (fedora-cris-cross is a system compiler) - re-organised the functions to avoid forward declarations - cleaned up brace usage - restored exit for _fail case - removed tabs and fixed indentation Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/arm: add ARMv6-M UNDEFINED 32-bit instruction testStefan Hajnoczi2019-03-123-0/+204
| | | | | | | | | | | | | Test that 32-bit instructions declared UNDEFINED in the ARMv6-M Reference Manual really do raise an exception. Also test that the 6 32-bit instructions defined in the ARMv6-M Reference Manual do not raise an exception. Based-on: <20181029194519.15628-1-stefanha@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20181129185113.30353-1-stefanha@redhat.com> [AJB: integrated into system tests] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/xtensa: enable system testsAlex Bennée2019-03-122-102/+42Star
| | | | Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/docker: add debian-xtensa-cross imagePhilippe Mathieu-Daudé2019-03-121-0/+11
| | | | | | | | | | Xtensa cpu supported: - dc232b - dc233c - csp Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg/mips: fix hello-mips compilationAlex Bennée2019-03-122-8/+5Star
| | | | | | | The compilation flags for proper building are in the source tree. We also fix exit to 0 so the result is counted as a success. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: add gdb runner variantAlex Bennée2019-03-121-0/+3
| | | | | | | | | With this you can launch a test in gdb with: cd $(BUILD)/tests make -f $(SRC)/tests/tcg/Makefile gdb-$(TEST_NAME) Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: split run-test into user and system variantsAlex Bennée2019-03-121-2/+17
| | | | | | | | | | | | | We can't rely on shell redirect magic to get things right so lets setup a common output chardev that is expecting to write to files. As we have split run-test up we might as well move the default monitor bits into the call. Finally a little make sophistry is required to correctly quote $(COMMA) and as we don't inherit common rules we have our own little copy here. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/tcg: add QEMU_OPT option for test runnerAlex Bennée2019-03-121-1/+4
| | | | | | | | | This will allow tests to modify the QEMU invocation with for example different -cpu stazas without having to define a whole new set of runner types. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg: add softmmu awareness to MakefileAlex Bennée2019-03-122-2/+17
| | | | | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* target/mips: Add tests for a variety of MSA integer subtract instructionsMateja Marjanovic2019-03-1120-0/+3022
| | | | | | | | | Add tests for a variety of MSA integer subtract instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-6-git-send-email-mateja.marjanovic@rt-rk.com>
* target/mips: Add tests for a variety of MSA integer multiply instructionsMateja Marjanovic2019-03-118-0/+1208
| | | | | | | | | Add tests for a variety of MSA integer multiply instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-5-git-send-email-mateja.marjanovic@rt-rk.com>
* target/mips: Add tests for a variety of MSA integer dot product instructionsMateja Marjanovic2019-03-116-0/+906
| | | | | | | | | Add tests for a variety of MSA integer dot product instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-4-git-send-email-mateja.marjanovic@rt-rk.com>
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