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* translate-all: fix watchpoints if retranslation not possibleAurelien Jarno2015-06-171-5/+15
| | | | | | | | | | | | | | | The tb_check_watchpoint function currently assumes that all memory access is done either directly through the TCG code or through an helper which knows its return address. This is obviously wrong as the helpers use cpu_ldxx/stxx_data functions to access the memory. Instead of aborting in that case, don't try to retranslate the code, but assume that the CPU state (and especially the program counter) has been saved before calling the helper. Then invalidate the TB based on this address. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* translate-all: make less of tb_invalidate_phys_page_range depend on ↵Paolo Bonzini2015-06-051-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | is_cpu_write_access is_cpu_write_access is only set if tb_invalidate_phys_page_range is called from tb_invalidate_phys_page_fast, and hence from notdirty_mem_write. However: - the code bitmap can be built directly in tb_invalidate_phys_page_fast (unconditionally, since is_cpu_write_access would always be passed as 1); - the virtual address is not needed to mark the page as "not containing code" (dirty code bitmap = 1), so we can also remove that use of is_cpu_write_access. For calls of tb_invalidate_phys_page_range that do not come from notdirty_mem_write, the next call to notdirty_mem_write will notice that the page does not contain code anymore, and will fix up the TLB entry. The parameter needs to remain in order to guard accesses to cpu->mem_io_pc. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cputlb: remove useless arguments to tlb_unprotect_code_phys, renamePaolo Bonzini2015-06-051-1/+1
| | | | | | | | | | | These days modification of the TLB is done in notdirty_mem_write, so the virtual address and env pointer as unnecessary. The new name of the function, tlb_unprotect_code, is consistent with tlb_protect_code. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate-all: remove unnecessary argument to tb_invalidate_phys_rangePaolo Bonzini2015-06-051-3/+2Star
| | | | | | | The is_cpu_write_access argument is always 0, remove it. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: move rcu_read_lock/unlock to address_space_translate callersPaolo Bonzini2015-04-301-0/+3
| | | | | | | | | Once address_space_translate will be called outside the BQL, the returned MemoryRegion might disappear as soon as the RCU read-side critical section ends. Avoid this by moving the critical section to the callers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1426684909-95030-3-git-send-email-pbonzini@redhat.com>
* translate-all: use bitmap helpers for PageDesc's bitmapEmilio G. Cota2015-04-281-33/+9Star
| | | | | | | | | Here we have an open-coded byte-based bitmap implementation. Get rid of it since there's a ulong-based implementation to be used by all code. Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate-all: use glib for all page descriptor allocationsEmilio G. Cota2015-04-271-16/+2Star
| | | | | | | | | | | | | Since commit b7b5233a "bsd-user/mmap.c: Don't try to override g_malloc/g_free" the exception we make here for usermode has been unnecessary. Get rid of it. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1428610053-26148-1-git-send-email-cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: remove superfluous TARGET_HAS_SMC macroEmilio G. Cota2015-04-041-4/+0Star
| | | | | | Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* translate-all: Use g_try_malloc() for dynamic translator bufferMarkus Armbruster2015-02-101-1/+1
| | | | | | | | | | The USE_MMAP code can fail, and the caller handles the failure already. Let the !USE_MMAP code fail as well, for consistency. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+2
| | | | | | | | | | | | | | The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
* translate-all: Mark map_exec() with the 'unused' attributeSeokYeon Hwang2015-01-151-2/+2
| | | | | | | | | | | | | Mark map_exec() with the 'unused' attribute to avoid '-Wunused-function' warnings on clang 3.4 or later. This means we don't need to mark it 'inline', which is what we were previously using to suppress the warning (a trick which only works with gcc, not clang). Signed-off-by: SeokYeon Hwang <syeon.hwang@samsung.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> [PMM: tweaked comment message a little] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu-exec: add a new CF_USE_ICOUNT cflagPaolo Bonzini2014-12-231-0/+3
| | | | | Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/xtensa/tags/20141217-xtensa' into stagingPeter Maydell2014-12-171-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xtensa updates for 2.3: - fix cross-page opcode handling; - move window overflow exception generation decision to translation phase; - don't generate dead code after privilege, window overflow or coprocessor exception; - add monitor command 'info opcount' for dumping TCG opcode counters. # gpg: Signature made Wed 17 Dec 2014 02:57:01 GMT using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20141217-xtensa: target-xtensa: don't generate dead code target-xtensa: record available window in TB flags target-xtensa: test cross-page opcode target-xtensa: fix translation for opcodes crossing page boundary tcg: add separate monitor command to dump opcode counters Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tcg: add separate monitor command to dump opcode countersMax Filippov2014-12-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | Currently 'info jit' outputs half of the information to monitor and the rest to qemu log. Dumping opcode counts to monitor as a part of 'info jit' command doesn't sound useful. Add new monitor command 'info opcount' that only dumps opcode counters. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
* | target-mips: Correct MIPS16/microMIPS branch size calculationMaciej W. Rozycki2014-12-161-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | Correct MIPS16/microMIPS branch size calculation in PC adjustment needed: - to set the value of CP0.ErrorEPC at the entry to the reset exception, - for the purpose of branch reexecution in the context of device I/O. Follow the approach taken in `exception_resume_pc' for ordinary, Debug and NMI exceptions. MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has to be reflected in calculation. Original MIPS ISA branches, which is where this code originates from, are always 4 bytes long, just as all original MIPS ISA instructions. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* cpu-exec: invalidate nocache translation if they are interruptedPavel Dovgalyuk2014-12-151-0/+6
| | | | | | | | | In this case, QEMU might longjmp out of cpu-exec.c and miss the final cleanup in cpu_exec_nocache. Do this manually through a new compile flag. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate-all.c: memory walker initial address miscalculationMikhail Ilyin2014-10-061-17/+16Star
| | | | | | | | | | | | The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue led to incorrect debug output of memory maps and a mis-formed coredumped file. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* trace: add some tcg tracing supportAlex Bennée2014-08-121-0/+3
| | | | | | | | | | | | | | | | | | | | This adds a couple of tcg specific trace-events which are useful for tracing execution though tcg generated blocks. It's been tested with lttng user space tracing but is generic enough for all systems. The tcg events are: * translate_block - when a subject block is translated * exec_tb - when a translated block is entered * exec_tb_exit - when we exit the translated code * exec_tb_nocache - special case translations Of course we can only trace the entrance to the first block of a chain as each block will jump directly to the next when it can. See the -d nochain patch to allow more complete tracing at the expense of performance. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Fix new typos (found by codespell)Stefan Weil2014-06-241-1/+1
| | | | | | | | | | | | * accomodate -> accommodate * aquiring -> acquiring * beacuse -> because * loosing -> losing * prefering -> preferring * threshhold -> threshold Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* memory: move preallocation code out of exec.cPaolo Bonzini2014-06-191-7/+0Star
| | | | | | | | | | | | So that backends can use it. Since we need the page size for efficiency, move code to compute it out of translate-all.c and into util/oslib-win32.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* tcg-mips: Constrain the code_gen_buffer to be within one 256mb segmentRichard Henderson2014-05-241-5/+85
| | | | | | | | This assures us use of J for exit_tb and goto_tb, and JAL for calling into the generated bswap helpers. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-mips: Layout executable and code_gen_bufferRichard Henderson2014-05-241-0/+13
| | | | | | | Choosing good addresses for them means we can use JAL for helper calls. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Define tcg_insn_unit for code pointersRichard Henderson2014-05-121-7/+6Star
| | | | | | | | | To be defined by the tcg backend based on the elemental unit of the ISA. During the transition, allow TCG_TARGET_INSN_UNIT_SIZE to be undefined, which allows us to default tcg_insn_unit to the current uint8_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* page_check_range: don't bail out early after unprotecting pageAndrei Warkentin2014-04-041-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | When checking a page range, if we found that a page was made read-only by QEMU because it contained translated code, we were incorrectly returning immediately after unprotecting that page, rather than continuing to check the entire range, so we might fail to unprotect pages later in the range, or might incorrectly return a "success" result even if later pages were not writable. In particular, this could cause segfaults in a case where signals are delivered back to back on a target architecture which uses trampoline code in the stack frame (as AArch64 currently does). The second signal causes a segfault because the frame cannot be written to (it was protected because we translated and executed the restorer trampoline, and the unprotect logic did not unprotect the whole range). Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com [PMM: expanded commit message a bit] Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-8/+8
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cputlb: Change tlb_unprotect_code_phys() argument to CPUStateAndreas Färber2014-03-131-3/+3
| | | | | | Note that the argument is unused. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber2014-03-131-3/+3
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change tb_flush_jmp_cache() argument to CPUStateAndreas Färber2014-03-131-2/+1Star
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change tb_gen_code() argument to CPUStateAndreas Färber2014-03-131-4/+5
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change cpu_io_recompile() argument to CPUStateAndreas Färber2014-03-131-2/+2
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change tb_check_watchpoint() argument to CPUStateAndreas Färber2014-03-131-2/+2
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change cpu_restore_state_from_tb() argument to CPUStateAndreas Färber2014-03-131-8/+7Star
| | | | | | And normalize the argument order. Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-1/+2
| | | | | | This lets us drop some local variables in tlb_fill() functions. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move tb_jmp_cache field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-9/+6Star
| | | | | | Clear it on reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move icount_decr field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-7/+8
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move can_do_io field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+3
| | | | | | Rename can_do_io() to cpu_can_do_io() and change argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move mem_io_{pc,vaddr} fields from CPU_COMMON to CPUStateAndreas Färber2014-03-131-7/+8
| | | | | | Reset them. Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias2014-02-111-2/+2
| | | | | | | No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* kvm: initialize qemu_host_page_sizeAlexey Kardashevskiy2014-01-171-6/+8
| | | | | | | | | | | | | There is a HOST_PAGE_ALIGN macro which makes sense for KVM accelerator but it uses qemu_host_page_size/qemu_host_page_mask which initialized for TCG only. This moves qemu_host_page_size/qemu_host_page_mask initialization from TCG's page_init() and adds a call for it from kvm_init(). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
* cputlb: Tidy memset() of arraysRichard Henderson2013-12-231-3/+2Star
| | | | | | | | | Don't duplicate the array length computation in the memset() when plain sizeof() can produce the correct results. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* split definitions for exec.c and translate-all.c radix treesPaolo Bonzini2013-12-101-14/+18
| | | | | | | | | | | | | | | | | | | The exec.c and translate-all.c radix trees are quite different, and the exec.c one in particular is not limited to the CPU---it can be used also by devices that do DMA, and in that case the address space is not limited to TARGET_PHYS_ADDR_SPACE_BITS bits. We want to make exec.c's radix trees 64-bit wide. As a first step, stop sharing the constants between exec.c and translate-all.c. exec.c gets P_L2_* constants, translate-all.c gets V_L2_*, for consistency with the existing V_L1_* symbols. Though actually in the softmmu case translate-all.c is also indexed by physical addresses... This patch has no semantic change. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* exec: Delete is_tcg_gen_code and GETRA_EXTRichard Henderson2013-10-101-12/+0Star
| | | | | | All implementations now boil down to GETRA. Signed-off-by: Richard Henderson <rth@twiddle.net>
* translate-all: Fix formatting of dump outputStefan Weil2013-09-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | The page dump writes a table with 3 abi_ulong values in each row. These values take 8 or 16 characters (depending on sizeof abi_ulong). Fix the table headings to be aligned with the table columns. old: start end size prot 0000000120000000-000000012021e000 000000000021e000 rwx 0000004000000000-0000004000002000 0000000000002000 --- 0000004000002000-0000004000802000 0000000000800000 rw- new: start end size prot 0000000120000000-000000012021e000 000000000021e000 rwx 0000004000000000-0000004000002000 0000000000002000 --- 0000004000002000-0000004000802000 0000000000800000 rw- Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* cpu: Use QTAILQ for CPU listAndreas Färber2013-09-031-2/+2
| | | | | | | Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
* linux-user: Unlock mmap_lock when resuming guest from page_unprotectAlexander Graf2013-07-231-3/+7
| | | | | | | | | | | | | | | | | The page_unprotect() function is running everything locked. Before every potential exit path of the function mmap_unlock() gets called to make sure we don't leak the lock. However, the function calls tb_invalidate_phys_page() which again can exit a signal through longjmp, leaving our mmap_unlock() attempts in vain. Add a hint to tb_invalidate_phys_page() that we need to unlock before we can leave back into guest context, so that we don't leak the lock. This fixes 16-bit i386 wine programs running in linux-user for me. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* cpu: Make first_cpu and next_cpu CPUStateAndreas Färber2013-07-091-4/+8
| | | | | | | | | | | | Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber2013-07-091-8/+12
| | | | | | Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: return MemoryRegion from address_space_translatePaolo Bonzini2013-06-201-5/+5
| | | | | | | | Only address_space_translate_for_iotlb needs to return the section. Every caller of address_space_translate now uses only section->mr, return it directly. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg/aarch64: implement new TCG target for aarch64Claudio Fontana2013-06-121-0/+2
| | | | | | | | | | add preliminary support for TCG target aarch64. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 51A5C596.3090108@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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