From 09fe17125ec9a2166cf9bef360811dde714b3874 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Wed, 16 Dec 2020 10:22:34 -0800 Subject: riscv: virt: Remove target macro conditionals Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com --- hw/riscv/virt.c | 2 +- include/hw/riscv/virt.h | 6 ------ 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 3cc18a76e7..3e41dbfd3c 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -704,7 +704,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) mc->desc = "RISC-V VirtIO board"; mc->init = virt_machine_init; mc->max_cpus = VIRT_CPUS_MAX; - mc->default_cpu_type = VIRT_CPU; + mc->default_cpu_type = TYPE_RISCV_CPU_BASE; mc->pci_allow_0_address = true; mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index b4ed9a32eb..84b7a3848f 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -89,10 +89,4 @@ enum { #define FDT_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + 1 + \ FDT_PLIC_ADDR_CELLS + FDT_PLIC_INT_CELLS) -#if defined(TARGET_RISCV32) -#define VIRT_CPU TYPE_RISCV_CPU_BASE32 -#elif defined(TARGET_RISCV64) -#define VIRT_CPU TYPE_RISCV_CPU_BASE64 -#endif - #endif -- cgit v1.2.3-55-g7522