From 5e02ded157a7db45c3f06bd8c9d60f62d5bdeb1c Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sat, 8 Jan 2022 16:22:16 -0700 Subject: bsd-user/arm/target_arch_cpu.h: Use force_sig_fault for EXCP_UDEF Use force_sig_fault to implement unknown opcode. This just uninlines that function, so simplify things by using it. Fold in EXCP_NOCP and EXCP_INVSTATE, as is done in linux-user. Make a note about slight differences with FreeBSD in case any of them turn out to be important later. Signed-off-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) (limited to 'bsd-user') diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h index 905f13aa1b..9d79017642 100644 --- a/bsd-user/arm/target_arch_cpu.h +++ b/bsd-user/arm/target_arch_cpu.h @@ -51,18 +51,19 @@ static inline void target_cpu_loop(CPUARMState *env) process_queued_cpu_work(cs); switch (trapnr) { case EXCP_UDEF: - { - /* See arm/arm/undefined.c undefinedinstruction(); */ - info.si_addr = env->regs[15]; - - /* illegal instruction */ - info.si_signo = TARGET_SIGILL; - info.si_errno = 0; - info.si_code = TARGET_ILL_ILLOPC; - queue_signal(env, info.si_signo, &info); - - /* TODO: What about instruction emulation? */ - } + case EXCP_NOCP: + case EXCP_INVSTATE: + /* + * See arm/arm/undefined.c undefinedinstruction(); + * + * A number of details aren't emulated (they likely don't matter): + * o Misaligned PC generates ILL_ILLADR (these can't come from qemu) + * o Thumb-2 instructions generate ILLADR + * o Both modes implement coprocessor instructions, which we don't + * do here. FreeBSD just implements them for the VFP coprocessor + * and special kernel breakpoints, trace points, dtrace, etc. + */ + force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]); break; case EXCP_SWI: { -- cgit v1.2.3-55-g7522