From 0af312b6edd231e1c8d0dec12494a80bc39ac761 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 1 Mar 2022 11:59:49 -1000 Subject: target/arm: Implement FEAT_LVA This feature is relatively small, as it applies only to 64k pages and thus requires no additional changes to the table descriptor walking algorithm, only a change to the minimum TSZ (which is the inverse of the maximum virtual address space size). Note that this feature widens VBAR_ELx, but we already treat the register as being 64 bits wide. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20220301215958.157011-10-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'docs/system') diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 144dc491d9..f3eabddfb5 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -27,6 +27,7 @@ the following architecture extensions: - FEAT_LRCPC (Load-acquire RCpc instructions) - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) - FEAT_LSE (Large System Extensions) +- FEAT_LVA (Large Virtual Address space) - FEAT_MTE (Memory Tagging Extension) - FEAT_MTE2 (Memory Tagging Extension) - FEAT_MTE3 (MTE Asymmetric Fault Handling) -- cgit v1.2.3-55-g7522