From ebe15582cafeb944a1c6e99aa526e81a1551c567 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Thu, 12 May 2016 20:43:45 -0500 Subject: pc: Add an SMB0 ACPI device to q35 This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but devices can be easily added now. Adding the devices required some PCI information, and the bus itself to be added to the PCMachineState structure. Note that this only works on Q35, the ACPI for PIIX4 is not capable of handling an SMBus device. Cc: Michael S. Tsirkin Cc: Igor Mammedov Signed-off-by: Corey Minyard Reviewed-by: Paolo Bonzini --- hw/i386/acpi-build.c | 15 +++++++++++++++ hw/i386/pc_piix.c | 12 ++++++------ hw/i386/pc_q35.c | 9 +++++---- 3 files changed, 26 insertions(+), 10 deletions(-) (limited to 'hw/i386') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 8acf12df9a..4e0f9f425a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1809,6 +1809,18 @@ static Aml *build_q35_osc_method(void) return method; } +static void build_smb0(Aml *table, I2CBus *smbus, int devnr, int func) +{ + Aml *scope = aml_scope("_SB.PCI0"); + Aml *dev = aml_device("SMB0"); + + aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0005"))); + aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func))); + build_acpi_ipmi_devices(dev, BUS(smbus), "\\_SB.PCI0.SMB0"); + aml_append(scope, dev); + aml_append(table, scope); +} + static void build_dsdt(GArray *table_data, BIOSLinker *linker, AcpiPmInfo *pm, AcpiMiscInfo *misc, @@ -1862,6 +1874,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_q35_isa_bridge(dsdt); build_isa_devices_aml(dsdt); build_q35_pci0_int(dsdt); + if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { + build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC); + } } if (pcmc->legacy_cpu_hotplug) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2362675149..6824b72124 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -283,15 +283,14 @@ else { if (pcmc->pci_enabled && acpi_enabled) { DeviceState *piix4_pm; - I2CBus *smbus; smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); /* TODO: Populate SPD eeprom data. */ - smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, - pcms->gsi[9], smi_irq, - pc_machine_is_smm_enabled(pcms), - &piix4_pm); - smbus_eeprom_init(smbus, 8, NULL, 0); + pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, + pcms->gsi[9], smi_irq, + pc_machine_is_smm_enabled(pcms), + &piix4_pm); + smbus_eeprom_init(pcms->smbus, 8, NULL, 0); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, @@ -476,6 +475,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m) pc_i440fx_4_0_machine_options(m); m->is_default = 0; + pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d4e8a1cb9f..8fad20f314 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -316,10 +316,10 @@ static void pc_q35_init(MachineState *machine) if (pcms->smbus_enabled) { /* TODO: Populate SPD eeprom data. */ - smbus_eeprom_init(ich9_smb_init(host_bus, - PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), - 0xb100), - 8, NULL, 0); + pcms->smbus = ich9_smb_init(host_bus, + PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), + 0xb100); + smbus_eeprom_init(pcms->smbus, 8, NULL, 0); } pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); @@ -421,6 +421,7 @@ static void pc_q35_3_1_machine_options(MachineClass *m) pc_q35_4_0_machine_options(m); m->default_kernel_irqchip_split = false; + pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; -- cgit v1.2.3-55-g7522