From f999c0de05103ccd91b3efff282eaa1c0ea93015 Mon Sep 17 00:00:00 2001 From: Efimov Vasily Date: Wed, 22 Jun 2016 15:24:54 +0300 Subject: ICH9 LPC: handle GSI as qdev GPIO The ICH9 LPC bridge has 24 output IRQs connected to GSI. Currently the IRQs are referenced by pointers. The pointers are initialized at startup by direct access to the structure fields. This violates Qemu device model. The patch makes the IRQs handling to use GPIO model. Signed-off-by: Efimov Vasily Signed-off-by: Paolo Bonzini --- hw/i386/pc_q35.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'hw/i386') diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6e296c0c32..17634dd5a1 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -60,6 +60,7 @@ static void pc_q35_init(MachineState *machine) PCIHostState *phb; PCIBus *host_bus; PCIDevice *lpc; + DeviceState *lpc_dev; BusState *idebus[MAX_SATA_PORTS]; ISADevice *rtc_state; MemoryRegion *system_io = get_system_io(); @@ -190,7 +191,10 @@ static void pc_q35_init(MachineState *machine) PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); ich9_lpc = ICH9_LPC_DEVICE(lpc); - ich9_lpc->gsi = gsi; + lpc_dev = DEVICE(lpc); + for (i = 0; i < GSI_NUM_PINS; i++) { + qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, gsi[i]); + } pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc, ICH9_LPC_NB_PIRQS); pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); -- cgit v1.2.3-55-g7522