From 2cfc9f1a968f8f832c7bf23f2491b058bdde028b Mon Sep 17 00:00:00 2001 From: Cédric Le Goater Date: Tue, 26 Jan 2021 18:10:53 +0100 Subject: ppc/pnv: Add trace events for PCI event notification On POWER9 systems, PHB controllers signal the XIVE interrupt controller of a source interrupt notification using a store on a MMIO region. Add traces for such events. Signed-off-by: Cédric Le Goater Message-Id: <20210126171059.307867-2-clg@kaod.org> Signed-off-by: David Gibson --- hw/intc/pnv_xive.c | 3 +++ hw/intc/trace-events | 3 +++ 2 files changed, 6 insertions(+) (limited to 'hw/intc') diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 5f69626b3a..ad43483612 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -24,6 +24,7 @@ #include "hw/ppc/xive_regs.h" #include "hw/qdev-properties.h" #include "hw/ppc/ppc.h" +#include "trace.h" #include @@ -1319,6 +1320,8 @@ static void pnv_xive_ic_hw_trigger(PnvXive *xive, hwaddr addr, uint64_t val) uint8_t blk; uint32_t idx; + trace_pnv_xive_ic_hw_trigger(addr, val); + if (val & XIVE_TRIGGER_END) { xive_error(xive, "IC: END trigger at @0x%"HWADDR_PRIx" data 0x%"PRIx64, addr, val); diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 8ed397a0d5..45ddaf48df 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -236,3 +236,6 @@ xive_tctx_tm_write(uint64_t offset, unsigned int size, uint64_t value) "@0x0x%"P xive_tctx_tm_read(uint64_t offset, unsigned int size, uint64_t value) "@0x0x%"PRIx64" sz=%d val=0x%" PRIx64 xive_presenter_notify(uint8_t nvt_blk, uint32_t nvt_idx, uint8_t ring) "found NVT 0x%x/0x%x ring=0x%x" xive_end_source_read(uint8_t end_blk, uint32_t end_idx, uint64_t addr) "END 0x%x/0x%x @0x0x%"PRIx64 + +# pnv_xive.c +pnv_xive_ic_hw_trigger(uint64_t addr, uint64_t val) "@0x%"PRIx64" val=0x%"PRIx64 -- cgit v1.2.3-55-g7522