From 17c2c320f3c216f80c2fad1f0fa9358c2ffbd0d3 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 2 Dec 2020 18:49:00 +0100 Subject: target/mips: Introduce ase_mt_available() helper Instead of accessing CP0_Config3 directly and checking the 'Multi-Threading Present' bit, introduce an helper to simplify code review. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201204222622.2743175-3-f4bug@amsat.org> --- hw/mips/cps.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'hw/mips') diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 962b1b0b87..7a0d289efa 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -58,8 +58,7 @@ static void main_cpu_reset(void *opaque) static bool cpu_mips_itu_supported(CPUMIPSState *env) { - bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || - (env->CP0_Config3 & (1 << CP0C3_MT)); + bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env); return is_mt && !kvm_enabled(); } -- cgit v1.2.3-55-g7522