From 0a73d7ac9a200cdf17562d0a893c1578f3ffa4a4 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:31 +0200 Subject: exec/memory_ldst_cached: Sort declarations To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-2-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_cached.h.inc | 40 +++++++++++++++++------------------ 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'include/exec') diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc index 7bc8790d34..c33449d0cd 100644 --- a/include/exec/memory_ldst_cached.h.inc +++ b/include/exec/memory_ldst_cached.h.inc @@ -24,6 +24,18 @@ #define LD_P(size) \ glue(glue(ld, size), glue(ENDIANNESS, _p)) +static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, + hwaddr addr, MemTxAttrs attrs, MemTxResult *result) +{ + assert(addr < cache->len && 2 <= cache->len - addr); + fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr); + if (likely(cache->ptr)) { + return LD_P(uw)(cache->ptr + addr); + } else { + return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result); + } +} + static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { @@ -48,18 +60,6 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, } } -static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, - hwaddr addr, MemTxAttrs attrs, MemTxResult *result) -{ - assert(addr < cache->len && 2 <= cache->len - addr); - fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr); - if (likely(cache->ptr)) { - return LD_P(uw)(cache->ptr + addr); - } else { - return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result); - } -} - #undef ADDRESS_SPACE_LD_CACHED #undef ADDRESS_SPACE_LD_CACHED_SLOW #undef LD_P @@ -71,25 +71,25 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, #define ST_P(size) \ glue(glue(st, size), glue(ENDIANNESS, _p)) -static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) { - assert(addr < cache->len && 4 <= cache->len - addr); + assert(addr < cache->len && 2 <= cache->len - addr); if (likely(cache->ptr)) { - ST_P(l)(cache->ptr + addr, val); + ST_P(w)(cache->ptr + addr, val); } else { - ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result); + ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result); } } -static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) { - assert(addr < cache->len && 2 <= cache->len - addr); + assert(addr < cache->len && 4 <= cache->len - addr); if (likely(cache->ptr)) { - ST_P(w)(cache->ptr + addr, val); + ST_P(l)(cache->ptr + addr, val); } else { - ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result); + ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result); } } -- cgit v1.2.3-55-g7522 From e1d2dbee5704e4db5dda6cda3da1bbbb4f950f90 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:32 +0200 Subject: exec/memory_ldst_phys: Sort declarations To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-3-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_phys.h.inc | 72 ++++++++++++++++++------------------- 1 file changed, 36 insertions(+), 36 deletions(-) (limited to 'include/exec') diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc index b9dd53c389..4033795add 100644 --- a/include/exec/memory_ldst_phys.h.inc +++ b/include/exec/memory_ldst_phys.h.inc @@ -20,6 +20,12 @@ */ #ifdef TARGET_ENDIANNESS +static inline uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +{ + return glue(address_space_lduw, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NULL); +} + static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldl, SUFFIX)(ARG1, addr, @@ -32,10 +38,10 @@ static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) { - return glue(address_space_lduw, SUFFIX)(ARG1, addr, - MEMTXATTRS_UNSPECIFIED, NULL); + glue(address_space_stw, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); } static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) @@ -44,18 +50,30 @@ static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) -{ - glue(address_space_stw, SUFFIX)(ARG1, addr, val, - MEMTXATTRS_UNSPECIFIED, NULL); -} - static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val) { glue(address_space_stq, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } #else +static inline uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +{ + return glue(address_space_ldub, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NULL); +} + +static inline uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +{ + return glue(address_space_lduw_le, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NULL); +} + +static inline uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +{ + return glue(address_space_lduw_be, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NULL); +} + static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldl_le, SUFFIX)(ARG1, addr, @@ -80,22 +98,22 @@ static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) { - return glue(address_space_ldub, SUFFIX)(ARG1, addr, - MEMTXATTRS_UNSPECIFIED, NULL); + glue(address_space_stb, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) { - return glue(address_space_lduw_le, SUFFIX)(ARG1, addr, - MEMTXATTRS_UNSPECIFIED, NULL); + glue(address_space_stw_le, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) { - return glue(address_space_lduw_be, SUFFIX)(ARG1, addr, - MEMTXATTRS_UNSPECIFIED, NULL); + glue(address_space_stw_be, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); } static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) @@ -110,24 +128,6 @@ static inline void glue(stl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t va MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) -{ - glue(address_space_stb, SUFFIX)(ARG1, addr, val, - MEMTXATTRS_UNSPECIFIED, NULL); -} - -static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) -{ - glue(address_space_stw_le, SUFFIX)(ARG1, addr, val, - MEMTXATTRS_UNSPECIFIED, NULL); -} - -static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) -{ - glue(address_space_stw_be, SUFFIX)(ARG1, addr, val, - MEMTXATTRS_UNSPECIFIED, NULL); -} - static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val) { glue(address_space_stq_le, SUFFIX)(ARG1, addr, val, -- cgit v1.2.3-55-g7522 From f933b02b59f07c17c312185a9ceaefbf9dfbb36e Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:33 +0200 Subject: exec/memory_ldst: Use correct type sizes Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-4-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst.h.inc | 16 ++++++++-------- memory_ldst.c.inc | 20 ++++++++++---------- 2 files changed, 18 insertions(+), 18 deletions(-) (limited to 'include/exec') diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc index 46e6c220d3..7c3a641f7e 100644 --- a/include/exec/memory_ldst.h.inc +++ b/include/exec/memory_ldst.h.inc @@ -20,7 +20,7 @@ */ #ifdef TARGET_ENDIANNESS -extern uint32_t glue(address_space_lduw, SUFFIX)(ARG1_DECL, +extern uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); extern uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); @@ -29,17 +29,17 @@ extern uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL, extern void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stw, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stl, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stq, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result); #else -extern uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, +extern uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); -extern uint32_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL, +extern uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); -extern uint32_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL, +extern uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); extern uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); @@ -50,11 +50,11 @@ extern uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL, extern uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stb, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); + hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stw_le, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stw_be, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stl_le, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); extern void glue(address_space_stl_be, SUFFIX)(ARG1_DECL, diff --git a/memory_ldst.c.inc b/memory_ldst.c.inc index b56e961967..84b868f294 100644 --- a/memory_ldst.c.inc +++ b/memory_ldst.c.inc @@ -157,7 +157,7 @@ uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL, DEVICE_BIG_ENDIAN); } -uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, +uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { uint8_t *ptr; @@ -193,7 +193,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, } /* warning: addr must be aligned */ -static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL, +static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result, enum device_endian endian) { @@ -240,21 +240,21 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL, return val; } -uint32_t glue(address_space_lduw, SUFFIX)(ARG1_DECL, +uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result, DEVICE_NATIVE_ENDIAN); } -uint32_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL, +uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result, DEVICE_LITTLE_ENDIAN); } -uint32_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL, +uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result, @@ -366,7 +366,7 @@ void glue(address_space_stl_be, SUFFIX)(ARG1_DECL, } void glue(address_space_stb, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result) { uint8_t *ptr; MemoryRegion *mr; @@ -398,7 +398,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, /* warning: addr must be aligned */ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result, enum device_endian endian) { uint8_t *ptr; @@ -441,21 +441,21 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL, } void glue(address_space_stw, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result, DEVICE_NATIVE_ENDIAN); } void glue(address_space_stw_le, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result, DEVICE_LITTLE_ENDIAN); } void glue(address_space_stw_be, SUFFIX)(ARG1_DECL, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result, DEVICE_BIG_ENDIAN); -- cgit v1.2.3-55-g7522 From c6fe45b3a66d05d74f919da4226d4737fc3f75c9 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:34 +0200 Subject: exec/memory_ldst_phys: Use correct type sizes Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-5-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_phys.h.inc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include/exec') diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc index 4033795add..ecd678610d 100644 --- a/include/exec/memory_ldst_phys.h.inc +++ b/include/exec/memory_ldst_phys.h.inc @@ -20,7 +20,7 @@ */ #ifdef TARGET_ENDIANNESS -static inline uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_lduw, SUFFIX)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL); @@ -38,7 +38,7 @@ static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) +static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val) { glue(address_space_stw, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); @@ -56,19 +56,19 @@ static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val) MEMTXATTRS_UNSPECIFIED, NULL); } #else -static inline uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldub, SUFFIX)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline uint16_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_lduw_le, SUFFIX)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL); } -static inline uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) +static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_lduw_be, SUFFIX)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL); @@ -98,19 +98,19 @@ static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) +static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val) { glue(address_space_stb, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) +static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val) { glue(address_space_stw_le, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } -static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val) +static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val) { glue(address_space_stw_be, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); -- cgit v1.2.3-55-g7522 From 4045f49cd4bba9c7e1d531cb805177deb5079147 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:35 +0200 Subject: exec/memory_ldst_cached: Use correct type size Use uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-6-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_cached.h.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/exec') diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc index c33449d0cd..d7834f852c 100644 --- a/include/exec/memory_ldst_cached.h.inc +++ b/include/exec/memory_ldst_cached.h.inc @@ -24,7 +24,7 @@ #define LD_P(size) \ glue(glue(ld, size), glue(ENDIANNESS, _p)) -static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, +static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <= cache->len - addr); @@ -72,7 +72,7 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, glue(glue(st, size), glue(ENDIANNESS, _p)) static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <= cache->len - addr); if (likely(cache->ptr)) { -- cgit v1.2.3-55-g7522 From 4121f4b38e976641ee66ad52567f6f178a8f2048 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 18 May 2021 20:36:36 +0200 Subject: exec/memory: Use correct type size Use uint8_t for (unsigned) byte. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-7-philmd@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/exec') diff --git a/include/exec/memory.h b/include/exec/memory.h index c8b9088924..175d7151a5 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2305,7 +2305,7 @@ static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache, } static inline void address_space_stb_cached(MemoryRegionCache *cache, - hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) + hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len); if (likely(cache->ptr)) { -- cgit v1.2.3-55-g7522 From 824f4bac9ffa2757293290c7edd065dc84a6521e Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Mon, 24 May 2021 19:04:52 +0200 Subject: accel/tcg: Reduce 'exec/tb-context.h' inclusion Only 2 headers require "exec/tb-context.h". Instead of having all files including "exec/exec-all.h" also including it, directly include it where it is required: - accel/tcg/cpu-exec.c - accel/tcg/translate-all.c For plugins/plugin.h, we were implicitly relying on exec/exec-all.h -> exec/tb-context.h -> qemu/qht.h which is now included directly. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210524170453.3791436-2-f4bug@amsat.org> [rth: Fix plugins/plugin.h compilation] Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 1 + accel/tcg/translate-all.c | 1 + include/exec/exec-all.h | 1 - include/tcg/tcg.h | 1 - plugins/plugin.h | 1 + 5 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/exec') diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 0dc5271715..10e11f27bb 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -31,6 +31,7 @@ #include "qemu/rcu.h" #include "exec/tb-hash.h" #include "exec/tb-lookup.h" +#include "exec/tb-context.h" #include "exec/log.h" #include "qemu/main-loop.h" #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 640ff6e3e7..e9f4de5190 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -48,6 +48,7 @@ #include "exec/cputlb.h" #include "exec/tb-hash.h" +#include "exec/tb-context.h" #include "exec/translate-all.h" #include "qemu/bitmap.h" #include "qemu/error-report.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 8021adf38f..754f4130c9 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -21,7 +21,6 @@ #define EXEC_ALL_H #include "cpu.h" -#include "exec/tb-context.h" #ifdef CONFIG_TCG #include "exec/cpu_ldst.h" #endif diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 0f0695e90d..74cb345308 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -27,7 +27,6 @@ #include "cpu.h" #include "exec/memop.h" -#include "exec/tb-context.h" #include "qemu/bitops.h" #include "qemu/plugin.h" #include "qemu/queue.h" diff --git a/plugins/plugin.h b/plugins/plugin.h index 1aa29dcadd..55017e3581 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -13,6 +13,7 @@ #define _PLUGIN_INTERNAL_H_ #include +#include "qemu/qht.h" #define QEMU_PLUGIN_MIN_VERSION 0 -- cgit v1.2.3-55-g7522 From e5ceadff47ddec1513a56f96d9df246f62c90875 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Mon, 24 May 2021 19:04:53 +0200 Subject: accel/tcg: Keep TranslationBlock headers local to TCG Only the TCG accelerator uses the TranslationBlock API. Move the tb-context.h / tb-hash.h / tb-lookup.h from the global namespace to the TCG one (in accel/tcg). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210524170453.3791436-3-f4bug@amsat.org> Signed-off-by: Richard Henderson --- MAINTAINERS | 1 - accel/tcg/cpu-exec.c | 6 ++--- accel/tcg/cputlb.c | 2 +- accel/tcg/tb-context.h | 41 ++++++++++++++++++++++++++++ accel/tcg/tb-hash.h | 69 +++++++++++++++++++++++++++++++++++++++++++++++ accel/tcg/tb-lookup.h | 49 +++++++++++++++++++++++++++++++++ accel/tcg/tcg-runtime.c | 2 +- accel/tcg/translate-all.c | 4 +-- include/exec/tb-context.h | 41 ---------------------------- include/exec/tb-hash.h | 69 ----------------------------------------------- include/exec/tb-lookup.h | 49 --------------------------------- 11 files changed, 166 insertions(+), 167 deletions(-) create mode 100644 accel/tcg/tb-context.h create mode 100644 accel/tcg/tb-hash.h create mode 100644 accel/tcg/tb-lookup.h delete mode 100644 include/exec/tb-context.h delete mode 100644 include/exec/tb-hash.h delete mode 100644 include/exec/tb-lookup.h (limited to 'include/exec') diff --git a/MAINTAINERS b/MAINTAINERS index a77f246569..5f55404f2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -128,7 +128,6 @@ F: docs/devel/decodetree.rst F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/helper*.h -F: include/exec/tb-hash.h F: include/sysemu/cpus.h F: include/sysemu/tcg.h F: include/hw/core/tcg-cpu-ops.h diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 10e11f27bb..ad1279d2ed 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -29,9 +29,6 @@ #include "qemu/compiler.h" #include "qemu/timer.h" #include "qemu/rcu.h" -#include "exec/tb-hash.h" -#include "exec/tb-lookup.h" -#include "exec/tb-context.h" #include "exec/log.h" #include "qemu/main-loop.h" #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) @@ -41,6 +38,9 @@ #include "exec/cpu-all.h" #include "sysemu/cpu-timers.h" #include "sysemu/replay.h" +#include "tb-hash.h" +#include "tb-lookup.h" +#include "tb-context.h" #include "internal.h" /* -icount align implementation. */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 2f7088614a..f24348e979 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -24,7 +24,6 @@ #include "exec/memory.h" #include "exec/cpu_ldst.h" #include "exec/cputlb.h" -#include "exec/tb-hash.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" #include "tcg/tcg.h" @@ -36,6 +35,7 @@ #include "exec/translate-all.h" #include "trace/trace-root.h" #include "trace/mem.h" +#include "tb-hash.h" #include "internal.h" #ifdef CONFIG_PLUGIN #include "qemu/plugin-memory.h" diff --git a/accel/tcg/tb-context.h b/accel/tcg/tb-context.h new file mode 100644 index 0000000000..cc33979113 --- /dev/null +++ b/accel/tcg/tb-context.h @@ -0,0 +1,41 @@ +/* + * Internal structs that QEMU exports to TCG + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_TB_CONTEXT_H +#define QEMU_TB_CONTEXT_H + +#include "qemu/thread.h" +#include "qemu/qht.h" + +#define CODE_GEN_HTABLE_BITS 15 +#define CODE_GEN_HTABLE_SIZE (1 << CODE_GEN_HTABLE_BITS) + +typedef struct TBContext TBContext; + +struct TBContext { + + struct qht htable; + + /* statistics */ + unsigned tb_flush_count; +}; + +extern TBContext tb_ctx; + +#endif diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h new file mode 100644 index 0000000000..0a273d9605 --- /dev/null +++ b/accel/tcg/tb-hash.h @@ -0,0 +1,69 @@ +/* + * internal execution defines for qemu + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef EXEC_TB_HASH_H +#define EXEC_TB_HASH_H + +#include "exec/cpu-defs.h" +#include "exec/exec-all.h" +#include "qemu/xxhash.h" + +#ifdef CONFIG_SOFTMMU + +/* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for + addresses on the same page. The top bits are the same. This allows + TLB invalidation to quickly clear a subset of the hash table. */ +#define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2) +#define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS) +#define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1) +#define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE) + +static inline unsigned int tb_jmp_cache_hash_page(target_ulong pc) +{ + target_ulong tmp; + tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)); + return (tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK; +} + +static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) +{ + target_ulong tmp; + tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)); + return (((tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK) + | (tmp & TB_JMP_ADDR_MASK)); +} + +#else + +/* In user-mode we can get better hashing because we do not have a TLB */ +static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) +{ + return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1); +} + +#endif /* CONFIG_SOFTMMU */ + +static inline +uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags, + uint32_t cf_mask, uint32_t trace_vcpu_dstate) +{ + return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate); +} + +#endif diff --git a/accel/tcg/tb-lookup.h b/accel/tcg/tb-lookup.h new file mode 100644 index 0000000000..9c9e0079da --- /dev/null +++ b/accel/tcg/tb-lookup.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2017, Emilio G. Cota + * + * License: GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#ifndef EXEC_TB_LOOKUP_H +#define EXEC_TB_LOOKUP_H + +#ifdef NEED_CPU_H +#include "cpu.h" +#else +#include "exec/poison.h" +#endif + +#include "exec/exec-all.h" +#include "tb-hash.h" + +/* Might cause an exception, so have a longjmp destination ready */ +static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc, + target_ulong cs_base, + uint32_t flags, uint32_t cflags) +{ + TranslationBlock *tb; + uint32_t hash; + + /* we should never be trying to look up an INVALID tb */ + tcg_debug_assert(!(cflags & CF_INVALID)); + + hash = tb_jmp_cache_hash_func(pc); + tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); + + if (likely(tb && + tb->pc == pc && + tb->cs_base == cs_base && + tb->flags == flags && + tb->trace_vcpu_dstate == *cpu->trace_dstate && + tb_cflags(tb) == cflags)) { + return tb; + } + tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); + if (tb == NULL) { + return NULL; + } + qatomic_set(&cpu->tb_jmp_cache[hash], tb); + return tb; +} + +#endif /* EXEC_TB_LOOKUP_H */ diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 49f5de37e8..66ac830e2f 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -30,7 +30,7 @@ #include "disas/disas.h" #include "exec/log.h" #include "tcg/tcg.h" -#include "exec/tb-lookup.h" +#include "tb-lookup.h" /* 32-bit helpers */ diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index e9f4de5190..1eefe6ea8d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -47,8 +47,6 @@ #endif #include "exec/cputlb.h" -#include "exec/tb-hash.h" -#include "exec/tb-context.h" #include "exec/translate-all.h" #include "qemu/bitmap.h" #include "qemu/error-report.h" @@ -61,6 +59,8 @@ #include "sysemu/tcg.h" #include "qapi/error.h" #include "hw/core/tcg-cpu-ops.h" +#include "tb-hash.h" +#include "tb-context.h" #include "internal.h" /* #define DEBUG_TB_INVALIDATE */ diff --git a/include/exec/tb-context.h b/include/exec/tb-context.h deleted file mode 100644 index cc33979113..0000000000 --- a/include/exec/tb-context.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Internal structs that QEMU exports to TCG - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#ifndef QEMU_TB_CONTEXT_H -#define QEMU_TB_CONTEXT_H - -#include "qemu/thread.h" -#include "qemu/qht.h" - -#define CODE_GEN_HTABLE_BITS 15 -#define CODE_GEN_HTABLE_SIZE (1 << CODE_GEN_HTABLE_BITS) - -typedef struct TBContext TBContext; - -struct TBContext { - - struct qht htable; - - /* statistics */ - unsigned tb_flush_count; -}; - -extern TBContext tb_ctx; - -#endif diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h deleted file mode 100644 index 0a273d9605..0000000000 --- a/include/exec/tb-hash.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * internal execution defines for qemu - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#ifndef EXEC_TB_HASH_H -#define EXEC_TB_HASH_H - -#include "exec/cpu-defs.h" -#include "exec/exec-all.h" -#include "qemu/xxhash.h" - -#ifdef CONFIG_SOFTMMU - -/* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for - addresses on the same page. The top bits are the same. This allows - TLB invalidation to quickly clear a subset of the hash table. */ -#define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2) -#define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS) -#define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1) -#define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE) - -static inline unsigned int tb_jmp_cache_hash_page(target_ulong pc) -{ - target_ulong tmp; - tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)); - return (tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK; -} - -static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) -{ - target_ulong tmp; - tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)); - return (((tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK) - | (tmp & TB_JMP_ADDR_MASK)); -} - -#else - -/* In user-mode we can get better hashing because we do not have a TLB */ -static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) -{ - return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1); -} - -#endif /* CONFIG_SOFTMMU */ - -static inline -uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags, - uint32_t cf_mask, uint32_t trace_vcpu_dstate) -{ - return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate); -} - -#endif diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h deleted file mode 100644 index 29d61ceb34..0000000000 --- a/include/exec/tb-lookup.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2017, Emilio G. Cota - * - * License: GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ -#ifndef EXEC_TB_LOOKUP_H -#define EXEC_TB_LOOKUP_H - -#ifdef NEED_CPU_H -#include "cpu.h" -#else -#include "exec/poison.h" -#endif - -#include "exec/exec-all.h" -#include "exec/tb-hash.h" - -/* Might cause an exception, so have a longjmp destination ready */ -static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc, - target_ulong cs_base, - uint32_t flags, uint32_t cflags) -{ - TranslationBlock *tb; - uint32_t hash; - - /* we should never be trying to look up an INVALID tb */ - tcg_debug_assert(!(cflags & CF_INVALID)); - - hash = tb_jmp_cache_hash_func(pc); - tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); - - if (likely(tb && - tb->pc == pc && - tb->cs_base == cs_base && - tb->flags == flags && - tb->trace_vcpu_dstate == *cpu->trace_dstate && - tb_cflags(tb) == cflags)) { - return tb; - } - tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); - if (tb == NULL) { - return NULL; - } - qatomic_set(&cpu->tb_jmp_cache[hash], tb); - return tb; -} - -#endif /* EXEC_TB_LOOKUP_H */ -- cgit v1.2.3-55-g7522