From 33108e9f3388b07b7daa4e46d476ff89ce7dbec5 Mon Sep 17 00:00:00 2001 From: Sai Pavan Boddu Date: Thu, 8 Oct 2015 18:51:03 +0530 Subject: target-arm: xlnx-zynqmp: Add sdhci support. Add two SYSBUS_SDHCI devices for xlnx-zynqmp Signed-off-by: Sai Pavan Boddu Reviewed-by: Peter Crosthwaite Signed-off-by: Stefan Hajnoczi --- include/hw/arm/xlnx-zynqmp.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw/arm') diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 4005a9960b..d1160920cc 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -24,6 +24,7 @@ #include "hw/char/cadence_uart.h" #include "hw/ide/pci.h" #include "hw/ide/ahci.h" +#include "hw/sd/sdhci.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ @@ -33,6 +34,7 @@ #define XLNX_ZYNQMP_NUM_RPU_CPUS 2 #define XLNX_ZYNQMP_NUM_GEMS 4 #define XLNX_ZYNQMP_NUM_UARTS 2 +#define XLNX_ZYNQMP_NUM_SDHCI 2 #define XLNX_ZYNQMP_NUM_OCM_BANKS 4 #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000 @@ -63,6 +65,7 @@ typedef struct XlnxZynqMPState { CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; SysbusAHCIState sata; + SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI]; char *boot_cpu; ARMCPU *boot_cpu_ptr; -- cgit v1.2.3-55-g7522