From 3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Thu, 14 May 2015 19:23:21 -0700 Subject: arm: xlnx-zynqmp: Add UART support There are 2x Cadence UARTs in Zynq MP. Add them. Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Tested-by: Alistair Francis Signed-off-by: Peter Crosthwaite Message-id: e30795536f77599fabc1052278d846ccd52322e2.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-zynqmp.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw/arm') diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index c6ccbd8981..79c2b0b865 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -21,6 +21,7 @@ #include "hw/arm/arm.h" #include "hw/intc/arm_gic.h" #include "hw/net/cadence_gem.h" +#include "hw/char/cadence_uart.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ @@ -28,6 +29,7 @@ #define XLNX_ZYNQMP_NUM_CPUS 4 #define XLNX_ZYNQMP_NUM_GEMS 4 +#define XLNX_ZYNQMP_NUM_UARTS 2 #define XLNX_ZYNQMP_GIC_REGIONS 2 @@ -49,6 +51,7 @@ typedef struct XlnxZynqMPState { GICState gic; MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; + CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; } XlnxZynqMPState; #define XLNX_ZYNQMP_H -- cgit v1.2.3-55-g7522