From d26af5ded95c9fb9031786bf10ab0ad7c0e848e9 Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:42 +0100 Subject: hw/arm/allwinner: add CPU Configuration module Various Allwinner System on Chip designs contain multiple processors that can be configured and reset using the generic CPU Configuration module interface. This commit adds support for the Allwinner CPU configuration interface which emulates the following features: * CPU reset * CPU status Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Message-id: 20200311221854.30370-7-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/allwinner-h3.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw/arm') diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 43500c4262..dc729176ab 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -40,6 +40,7 @@ #include "hw/timer/allwinner-a10-pit.h" #include "hw/intc/arm_gic.h" #include "hw/misc/allwinner-h3-ccu.h" +#include "hw/misc/allwinner-cpucfg.h" #include "hw/misc/allwinner-h3-sysctrl.h" #include "target/arm/cpu.h" @@ -76,6 +77,7 @@ enum { AW_H3_GIC_CPU, AW_H3_GIC_HYP, AW_H3_GIC_VCPU, + AW_H3_CPUCFG, AW_H3_SDRAM }; @@ -110,6 +112,7 @@ typedef struct AwH3State { const hwaddr *memmap; AwA10PITState timer; AwH3ClockCtlState ccu; + AwCpuCfgState cpucfg; AwH3SysCtrlState sysctrl; GICState gic; MemoryRegion sram_a1; -- cgit v1.2.3-55-g7522