From f03d8ea330d69f3a98093dfa2633635dff355f90 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 20 Feb 2017 22:43:10 +0200 Subject: hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities Absence of any Extended Capabilities is required to be indicated by an Extended Capability header with a Capability ID of 0000h, a Capability Version of 0h, and a Next Capability Offset of 000h. Instead of inserting a 'NULL' capability is simpler to mark the start of the Extended Configuration Space as read-only to achieve the same behaviour. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/compat.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/hw/compat.h') diff --git a/include/hw/compat.h b/include/hw/compat.h index b7db43803c..ce3bfe3eea 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -18,6 +18,10 @@ .driver = "pci-bridge",\ .property = "shpc",\ .value = "on",\ + },{\ + .driver = TYPE_PCI_DEVICE,\ + .property = "x-pcie-extcap-init",\ + .value = "off",\ }, #define HW_COMPAT_2_7 \ -- cgit v1.2.3-55-g7522 From c2cabb34220d63f93e4a0162a26535cbd1f30243 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 20 Feb 2017 22:43:11 +0200 Subject: hw/virtio: fix error enabling flags in Device Control register When the virtio devices are PCI Express, make error-enabling flags writable to respect the PCIe spec. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- dtc | 2 +- hw/virtio/virtio-pci.c | 12 ++++++++++++ hw/virtio/virtio-pci.h | 4 ++++ include/hw/compat.h | 4 ++++ 4 files changed, 21 insertions(+), 1 deletion(-) (limited to 'include/hw/compat.h') diff --git a/dtc b/dtc index 558cd81bdd..65cc4d2748 160000 --- a/dtc +++ b/dtc @@ -1 +1 @@ -Subproject commit 558cd81bdd432769b59bff01240c44f82cfb1a9d +Subproject commit 65cc4d2748a2c2e6f27f1cf39e07a5dbabd80ebf diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 69cc471e56..f6de5eeeab 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1819,6 +1819,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) */ pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { + /* Init error enabling flags */ + pcie_cap_deverr_init(pci_dev); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1849,6 +1854,7 @@ static void virtio_pci_reset(DeviceState *qdev) { VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); + PCIDevice *dev = PCI_DEVICE(qdev); int i; virtio_pci_stop_ioeventfd(proxy); @@ -1862,6 +1868,10 @@ static void virtio_pci_reset(DeviceState *qdev) proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; } + + if (pci_is_express(dev)) { + pcie_cap_deverr_reset(dev); + } } static Property virtio_pci_properties[] = { @@ -1882,6 +1892,8 @@ static Property virtio_pci_properties[] = { ignore_backend_features, false), DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_ATS_BIT, false), + DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index d00064cc0c..120661db5a 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -73,6 +73,7 @@ enum { VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, VIRTIO_PCI_FLAG_ATS_BIT, + VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, }; /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -100,6 +101,9 @@ enum { /* address space translation service */ #define VIRTIO_PCI_FLAG_ATS (1 << VIRTIO_PCI_FLAG_ATS_BIT) +/* Init error enabling flags */ +#define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index ce3bfe3eea..c98776a6d6 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -22,6 +22,10 @@ .driver = TYPE_PCI_DEVICE,\ .property = "x-pcie-extcap-init",\ .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-deverr-init",\ + .value = "off",\ }, #define HW_COMPAT_2_7 \ -- cgit v1.2.3-55-g7522 From d584f1b9ca7452ed8d6cd80f7fccd79d667ae49b Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 20 Feb 2017 22:43:12 +0200 Subject: hw/virtio: fix Link Control Register for PCI Express virtio devices Make several Link Control Register flags writable to conform with the PCI Express spec. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci/pcie.c | 14 ++++++++++++++ hw/virtio/virtio-pci.c | 8 ++++++++ hw/virtio/virtio-pci.h | 4 ++++ include/hw/compat.h | 4 ++++ include/hw/pci/pcie.h | 3 +++ 5 files changed, 33 insertions(+) (limited to 'include/hw/compat.h') diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 82a890234f..18e634f577 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -223,6 +223,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev) PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); } +void pcie_cap_lnkctl_init(PCIDevice *dev) +{ + uint32_t pos = dev->exp.exp_cap; + pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + +void pcie_cap_lnkctl_reset(PCIDevice *dev) +{ + uint8_t *lnkctl = dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL; + pci_long_test_and_clear_mask(lnkctl, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + static void hotplug_event_update_event_status(PCIDevice *dev) { uint32_t pos = dev->exp.exp_cap; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index f6de5eeeab..300aa4a7f3 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1824,6 +1824,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pcie_cap_deverr_init(pci_dev); } + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { + /* Init Link Control Register */ + pcie_cap_lnkctl_init(pci_dev); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1871,6 +1876,7 @@ static void virtio_pci_reset(DeviceState *qdev) if (pci_is_express(dev)) { pcie_cap_deverr_reset(dev); + pcie_cap_lnkctl_reset(dev); } } @@ -1894,6 +1900,8 @@ static Property virtio_pci_properties[] = { VIRTIO_PCI_FLAG_ATS_BIT, false), DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), + DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 120661db5a..9b5dd5a752 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -74,6 +74,7 @@ enum { VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, VIRTIO_PCI_FLAG_ATS_BIT, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, }; /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -104,6 +105,9 @@ enum { /* Init error enabling flags */ #define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT) +/* Init Link Control register */ +#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index c98776a6d6..0931aa59c4 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -26,6 +26,10 @@ .driver = "virtio-pci",\ .property = "x-pcie-deverr-init",\ .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-lnkctl-init",\ + .value = "off",\ }, #define HW_COMPAT_2_7 \ diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 163c5195b6..11c6247431 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -96,6 +96,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); void pcie_cap_deverr_init(PCIDevice *dev); void pcie_cap_deverr_reset(PCIDevice *dev); +void pcie_cap_lnkctl_init(PCIDevice *dev); +void pcie_cap_lnkctl_reset(PCIDevice *dev); + void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_write_config(PCIDevice *dev, -- cgit v1.2.3-55-g7522 From 27ce0f3afc9dd25d21b43bbce505157afd93d111 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 20 Feb 2017 22:43:13 +0200 Subject: hw/virtio: fix Power Management Control Register for PCI Express virtio devices Make Power Management State flag writable to conform with the PCI Express spec. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/virtio-pci.c | 11 +++++++++++ hw/virtio/virtio-pci.h | 4 ++++ include/hw/compat.h | 4 ++++ include/hw/pci/pcie.h | 2 ++ 4 files changed, 21 insertions(+) (limited to 'include/hw/compat.h') diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 300aa4a7f3..f9b7244808 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1812,6 +1812,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); assert(pos > 0); + pci_dev->exp.pm_cap = pos; /* * Indicates that this function complies with revision 1.2 of the @@ -1829,6 +1830,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pcie_cap_lnkctl_init(pci_dev); } + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { + /* Init Power Management Control Register */ + pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, + PCI_PM_CTRL_STATE_MASK); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1877,6 +1884,8 @@ static void virtio_pci_reset(DeviceState *qdev) if (pci_is_express(dev)) { pcie_cap_deverr_reset(dev); pcie_cap_lnkctl_reset(dev); + + pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); } } @@ -1902,6 +1911,8 @@ static Property virtio_pci_properties[] = { VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), + DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_PM_BIT, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 9b5dd5a752..b095dfc6d9 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -75,6 +75,7 @@ enum { VIRTIO_PCI_FLAG_ATS_BIT, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, + VIRTIO_PCI_FLAG_INIT_PM_BIT, }; /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -108,6 +109,9 @@ enum { /* Init Link Control register */ #define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT) +/* Init Power Management */ +#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index 0931aa59c4..90606f9fdb 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -30,6 +30,10 @@ .driver = "virtio-pci",\ .property = "x-pcie-lnkctl-init",\ .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-pm-init",\ + .value = "off",\ }, #define HW_COMPAT_2_7 \ diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 11c6247431..3d8f24b007 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -63,6 +63,8 @@ typedef enum { struct PCIExpressDevice { /* Offset of express capability in config space */ uint8_t exp_cap; + /* Offset of Power Management capability in config space */ + uint8_t pm_cap; /* SLOT */ bool hpev_notified; /* Logical AND of conditions for hot plug event. -- cgit v1.2.3-55-g7522