From 5efc9016e52596ec054b19bb0ae1d274f77f2a2b Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 16 Jan 2018 13:28:20 +0000 Subject: sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only running qtests: $ make check-qtest-arm GTESTER check-qtest-arm SDHC rd_4b @0x44 not implemented SDHC wr_4b @0x40 <- 0x89abcdef not implemented SDHC wr_4b @0x44 <- 0x01234567 not implemented Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-12-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/sd/sdhci.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/hw/sd') diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 8041c9629e..442e30aff2 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -72,8 +72,8 @@ typedef struct SDHCIState { uint64_t admasysaddr; /* ADMA System Address Register */ /* Read-only registers */ - uint32_t capareg; /* Capabilities Register */ - uint32_t maxcurr; /* Maximum Current Capabilities Register */ + uint64_t capareg; /* Capabilities Register */ + uint64_t maxcurr; /* Maximum Current Capabilities Register */ uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; -- cgit v1.2.3-55-g7522