From 4af44e1eca3a36cd7a1c68d73692bdd76fb8f7e4 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:01 -0400 Subject: allwinner-h3: Rename memmap enum constants Some of the enum constant names conflict with the QOM type check macros (AW_H3_CCU, AW_H3_SYSCTRL). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to AW_H3_DEV_*, to avoid conflicts. Reviewed-by: Daniel P. Berrangé Reviewed-by: Niek Linnenbank Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/arm/allwinner-h3.h | 62 +++++++++++++++++++++---------------------- 1 file changed, 31 insertions(+), 31 deletions(-) (limited to 'include/hw') diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 82e4e59216..626139dcb3 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -61,37 +61,37 @@ * @see AwH3State */ enum { - AW_H3_SRAM_A1, - AW_H3_SRAM_A2, - AW_H3_SRAM_C, - AW_H3_SYSCTRL, - AW_H3_MMC0, - AW_H3_SID, - AW_H3_EHCI0, - AW_H3_OHCI0, - AW_H3_EHCI1, - AW_H3_OHCI1, - AW_H3_EHCI2, - AW_H3_OHCI2, - AW_H3_EHCI3, - AW_H3_OHCI3, - AW_H3_CCU, - AW_H3_PIT, - AW_H3_UART0, - AW_H3_UART1, - AW_H3_UART2, - AW_H3_UART3, - AW_H3_EMAC, - AW_H3_DRAMCOM, - AW_H3_DRAMCTL, - AW_H3_DRAMPHY, - AW_H3_GIC_DIST, - AW_H3_GIC_CPU, - AW_H3_GIC_HYP, - AW_H3_GIC_VCPU, - AW_H3_RTC, - AW_H3_CPUCFG, - AW_H3_SDRAM + AW_H3_DEV_SRAM_A1, + AW_H3_DEV_SRAM_A2, + AW_H3_DEV_SRAM_C, + AW_H3_DEV_SYSCTRL, + AW_H3_DEV_MMC0, + AW_H3_DEV_SID, + AW_H3_DEV_EHCI0, + AW_H3_DEV_OHCI0, + AW_H3_DEV_EHCI1, + AW_H3_DEV_OHCI1, + AW_H3_DEV_EHCI2, + AW_H3_DEV_OHCI2, + AW_H3_DEV_EHCI3, + AW_H3_DEV_OHCI3, + AW_H3_DEV_CCU, + AW_H3_DEV_PIT, + AW_H3_DEV_UART0, + AW_H3_DEV_UART1, + AW_H3_DEV_UART2, + AW_H3_DEV_UART3, + AW_H3_DEV_EMAC, + AW_H3_DEV_DRAMCOM, + AW_H3_DEV_DRAMCTL, + AW_H3_DEV_DRAMPHY, + AW_H3_DEV_GIC_DIST, + AW_H3_DEV_GIC_CPU, + AW_H3_DEV_GIC_HYP, + AW_H3_DEV_GIC_VCPU, + AW_H3_DEV_RTC, + AW_H3_DEV_CPUCFG, + AW_H3_DEV_SDRAM }; /** Total number of CPU cores in the H3 SoC */ -- cgit v1.2.3-55-g7522 From 347df6f87616fbc496a1fef597dda2ab7b73be36 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:02 -0400 Subject: aspeed_soc: Rename memmap/irqmap enum constants Some of the enum constant names conflict with the QOM type check macros: ASPEED_GPIO ASPEED_I2C ASPEED_RTC ASPEED_SCU ASPEED_SDHCI ASPEED_SDMC ASPEED_VIC ASPEED_WDT ASPEED_XDMA This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to ASPEED_DEV_*, to avoid conflicts. Reviewed-by: Cédric Le Goater Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/arm/aspeed.c | 4 +- hw/arm/aspeed_ast2600.c | 208 ++++++++++++++++++++-------------------- hw/arm/aspeed_soc.c | 228 ++++++++++++++++++++++---------------------- include/hw/arm/aspeed_soc.h | 92 +++++++++--------- 4 files changed, 266 insertions(+), 266 deletions(-) (limited to 'include/hw') diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index fcb1a7cd87..8109cc6d2d 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -309,7 +309,7 @@ static void aspeed_machine_init(MachineState *machine) qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SDRAM], + sc->memmap[ASPEED_DEV_SDRAM], &bmc->ram_container); max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", @@ -360,7 +360,7 @@ static void aspeed_machine_init(MachineState *machine) } aspeed_board_binfo.ram_size = ram_size; - aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM]; + aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM]; aspeed_board_binfo.nb_cpus = sc->num_cpus; if (amc->i2c_init) { diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 3767f7d8d0..9d95e42143 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -24,43 +24,43 @@ #define ASPEED_SOC_IOMEM_SIZE 0x00200000 static const hwaddr aspeed_soc_ast2600_memmap[] = { - [ASPEED_SRAM] = 0x10000000, + [ASPEED_DEV_SRAM] = 0x10000000, /* 0x16000000 0x17FFFFFF : AHB BUS do LPC Bus bridge */ - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_PWM] = 0x1E610000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_SPI2] = 0x1E641000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_EHCI2] = 0x1E6A3000, - [ASPEED_MII1] = 0x1E650000, - [ASPEED_MII2] = 0x1E650008, - [ASPEED_MII3] = 0x1E650010, - [ASPEED_MII4] = 0x1E650018, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH3] = 0x1E670000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_ETH4] = 0x1E690000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_EMMC] = 0x1E750000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_GPIO_1_8V] = 0x1E780800, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x80000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_PWM] = 0x1E610000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_SPI2] = 0x1E641000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_MII1] = 0x1E650000, + [ASPEED_DEV_MII2] = 0x1E650008, + [ASPEED_DEV_MII3] = 0x1E650010, + [ASPEED_DEV_MII4] = 0x1E650018, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH3] = 0x1E670000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_ETH4] = 0x1E690000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_EMMC] = 0x1E750000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_GPIO_1_8V] = 0x1E780800, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x80000000, }; #define ASPEED_A7MPCORE_ADDR 0x40460000 @@ -69,41 +69,41 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { - [ASPEED_UART1] = 47, - [ASPEED_UART2] = 48, - [ASPEED_UART3] = 49, - [ASPEED_UART4] = 50, - [ASPEED_UART5] = 8, - [ASPEED_VUART] = 8, - [ASPEED_FMC] = 39, - [ASPEED_SDMC] = 0, - [ASPEED_SCU] = 12, - [ASPEED_ADC] = 78, - [ASPEED_XDMA] = 6, - [ASPEED_SDHCI] = 43, - [ASPEED_EHCI1] = 5, - [ASPEED_EHCI2] = 9, - [ASPEED_EMMC] = 15, - [ASPEED_GPIO] = 40, - [ASPEED_GPIO_1_8V] = 11, - [ASPEED_RTC] = 13, - [ASPEED_TIMER1] = 16, - [ASPEED_TIMER2] = 17, - [ASPEED_TIMER3] = 18, - [ASPEED_TIMER4] = 19, - [ASPEED_TIMER5] = 20, - [ASPEED_TIMER6] = 21, - [ASPEED_TIMER7] = 22, - [ASPEED_TIMER8] = 23, - [ASPEED_WDT] = 24, - [ASPEED_PWM] = 44, - [ASPEED_LPC] = 35, - [ASPEED_IBT] = 35, /* LPC */ - [ASPEED_I2C] = 110, /* 110 -> 125 */ - [ASPEED_ETH1] = 2, - [ASPEED_ETH2] = 3, - [ASPEED_ETH3] = 32, - [ASPEED_ETH4] = 33, + [ASPEED_DEV_UART1] = 47, + [ASPEED_DEV_UART2] = 48, + [ASPEED_DEV_UART3] = 49, + [ASPEED_DEV_UART4] = 50, + [ASPEED_DEV_UART5] = 8, + [ASPEED_DEV_VUART] = 8, + [ASPEED_DEV_FMC] = 39, + [ASPEED_DEV_SDMC] = 0, + [ASPEED_DEV_SCU] = 12, + [ASPEED_DEV_ADC] = 78, + [ASPEED_DEV_XDMA] = 6, + [ASPEED_DEV_SDHCI] = 43, + [ASPEED_DEV_EHCI1] = 5, + [ASPEED_DEV_EHCI2] = 9, + [ASPEED_DEV_EMMC] = 15, + [ASPEED_DEV_GPIO] = 40, + [ASPEED_DEV_GPIO_1_8V] = 11, + [ASPEED_DEV_RTC] = 13, + [ASPEED_DEV_TIMER1] = 16, + [ASPEED_DEV_TIMER2] = 17, + [ASPEED_DEV_TIMER3] = 18, + [ASPEED_DEV_TIMER4] = 19, + [ASPEED_DEV_TIMER5] = 20, + [ASPEED_DEV_TIMER6] = 21, + [ASPEED_DEV_TIMER7] = 22, + [ASPEED_DEV_TIMER8] = 23, + [ASPEED_DEV_WDT] = 24, + [ASPEED_DEV_PWM] = 44, + [ASPEED_DEV_LPC] = 35, + [ASPEED_DEV_IBT] = 35, /* LPC */ + [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ + [ASPEED_DEV_ETH1] = 2, + [ASPEED_DEV_ETH2] = 3, + [ASPEED_DEV_ETH3] = 32, + [ASPEED_DEV_ETH4] = 33, }; @@ -232,11 +232,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) qemu_irq irq; /* IO space */ - create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM], + create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_DEV_IOMEM], ASPEED_SOC_IOMEM_SIZE); /* Video engine stub */ - create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], + create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_DEV_VIDEO], 0x1000); /* CPU */ @@ -295,21 +295,21 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SRAM], &s->sram); + sc->memmap[ASPEED_DEV_SRAM], &s->sram); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); /* RTC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_RTC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_RTC)); + aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -318,16 +318,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->timerctrl), 0, - sc->memmap[ASPEED_TIMER1]); + sc->memmap[ASPEED_DEV_TIMER1]); for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_TIMER1 + i); + qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_UART5], 2, + qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); } @@ -337,10 +337,10 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_I2C]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) { qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), - sc->irqmap[ASPEED_I2C] + i); + sc->irqmap[ASPEED_DEV_I2C] + i); /* * The AST2600 SoC has one IRQ per I2C bus. Skip the common * IRQ (AST2400 and AST2500) and connect all bussses. @@ -352,17 +352,17 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr), &error_abort); if (!object_property_set_int(OBJECT(&s->fmc), "sdram-base", - sc->memmap[ASPEED_SDRAM], errp)) { + sc->memmap[ASPEED_DEV_SDRAM], errp)) { return; } if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_FMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, s->fmc.ctrl->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_FMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); /* SPI */ for (i = 0; i < sc->spis_num; i++) { @@ -373,7 +373,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, - sc->memmap[ASPEED_SPI1 + i]); + sc->memmap[ASPEED_DEV_SPI1 + i]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 1, s->spi[i].ctrl->flash_window_base); } @@ -384,16 +384,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, - sc->memmap[ASPEED_EHCI1 + i]); + sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_SDMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_DEV_SDMC]); /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { @@ -405,7 +405,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_WDT] + i * awc->offset); + sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); } /* Net */ @@ -416,9 +416,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - sc->memmap[ASPEED_ETH1 + i]); + sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_ETH1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); object_property_set_link(OBJECT(&s->mii[i]), "nic", OBJECT(&s->ftgmac100[i]), &error_abort); @@ -427,7 +427,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } sysbus_mmio_map(SYS_BUS_DEVICE(&s->mii[i]), 0, - sc->memmap[ASPEED_MII1 + i]); + sc->memmap[ASPEED_DEV_MII1 + i]); } /* XDMA */ @@ -435,42 +435,42 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->xdma), 0, - sc->memmap[ASPEED_XDMA]); + sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_XDMA)); + aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_GPIO]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, - sc->memmap[ASPEED_GPIO_1_8V]); + sc->memmap[ASPEED_DEV_GPIO_1_8V]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO_1_8V)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO_1_8V)); /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci), 0, - sc->memmap[ASPEED_SDHCI]); + sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_SDHCI)); + aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_EMMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, - aspeed_soc_get_irq(s, ASPEED_EMMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); } static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index a1a8684216..35be126db6 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -27,97 +27,97 @@ #define ASPEED_SOC_IOMEM_SIZE 0x00200000 static const hwaddr aspeed_soc_ast2400_memmap[] = { - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_SRAM] = 0x1E720000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_PWM] = 0x1E786000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x40000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_SRAM] = 0x1E720000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_PWM] = 0x1E786000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x40000000, }; static const hwaddr aspeed_soc_ast2500_memmap[] = { - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_SPI2] = 0x1E631000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_EHCI2] = 0x1E6A3000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_SRAM] = 0x1E720000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_PWM] = 0x1E786000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x80000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_SPI2] = 0x1E631000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_SRAM] = 0x1E720000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_PWM] = 0x1E786000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x80000000, }; static const int aspeed_soc_ast2400_irqmap[] = { - [ASPEED_UART1] = 9, - [ASPEED_UART2] = 32, - [ASPEED_UART3] = 33, - [ASPEED_UART4] = 34, - [ASPEED_UART5] = 10, - [ASPEED_VUART] = 8, - [ASPEED_FMC] = 19, - [ASPEED_EHCI1] = 5, - [ASPEED_EHCI2] = 13, - [ASPEED_SDMC] = 0, - [ASPEED_SCU] = 21, - [ASPEED_ADC] = 31, - [ASPEED_GPIO] = 20, - [ASPEED_RTC] = 22, - [ASPEED_TIMER1] = 16, - [ASPEED_TIMER2] = 17, - [ASPEED_TIMER3] = 18, - [ASPEED_TIMER4] = 35, - [ASPEED_TIMER5] = 36, - [ASPEED_TIMER6] = 37, - [ASPEED_TIMER7] = 38, - [ASPEED_TIMER8] = 39, - [ASPEED_WDT] = 27, - [ASPEED_PWM] = 28, - [ASPEED_LPC] = 8, - [ASPEED_IBT] = 8, /* LPC */ - [ASPEED_I2C] = 12, - [ASPEED_ETH1] = 2, - [ASPEED_ETH2] = 3, - [ASPEED_XDMA] = 6, - [ASPEED_SDHCI] = 26, + [ASPEED_DEV_UART1] = 9, + [ASPEED_DEV_UART2] = 32, + [ASPEED_DEV_UART3] = 33, + [ASPEED_DEV_UART4] = 34, + [ASPEED_DEV_UART5] = 10, + [ASPEED_DEV_VUART] = 8, + [ASPEED_DEV_FMC] = 19, + [ASPEED_DEV_EHCI1] = 5, + [ASPEED_DEV_EHCI2] = 13, + [ASPEED_DEV_SDMC] = 0, + [ASPEED_DEV_SCU] = 21, + [ASPEED_DEV_ADC] = 31, + [ASPEED_DEV_GPIO] = 20, + [ASPEED_DEV_RTC] = 22, + [ASPEED_DEV_TIMER1] = 16, + [ASPEED_DEV_TIMER2] = 17, + [ASPEED_DEV_TIMER3] = 18, + [ASPEED_DEV_TIMER4] = 35, + [ASPEED_DEV_TIMER5] = 36, + [ASPEED_DEV_TIMER6] = 37, + [ASPEED_DEV_TIMER7] = 38, + [ASPEED_DEV_TIMER8] = 39, + [ASPEED_DEV_WDT] = 27, + [ASPEED_DEV_PWM] = 28, + [ASPEED_DEV_LPC] = 8, + [ASPEED_DEV_IBT] = 8, /* LPC */ + [ASPEED_DEV_I2C] = 12, + [ASPEED_DEV_ETH1] = 2, + [ASPEED_DEV_ETH2] = 3, + [ASPEED_DEV_XDMA] = 6, + [ASPEED_DEV_SDHCI] = 26, }; #define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap @@ -221,11 +221,11 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) Error *err = NULL; /* IO space */ - create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM], + create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_DEV_IOMEM], ASPEED_SOC_IOMEM_SIZE); /* Video engine stub */ - create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], + create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_DEV_VIDEO], 0x1000); /* CPU */ @@ -243,19 +243,19 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SRAM], &s->sram); + sc->memmap[ASPEED_DEV_SRAM], &s->sram); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); /* VIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->vic), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_VIC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_DEV_VIC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0, qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1, @@ -265,9 +265,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_RTC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_RTC)); + aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -276,16 +276,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->timerctrl), 0, - sc->memmap[ASPEED_TIMER1]); + sc->memmap[ASPEED_DEV_TIMER1]); for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_TIMER1 + i); + qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_UART5], 2, + qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); } @@ -295,25 +295,25 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_I2C]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0, - aspeed_soc_get_irq(s, ASPEED_I2C)); + aspeed_soc_get_irq(s, ASPEED_DEV_I2C)); /* FMC, The number of CS is set at the board level */ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr), &error_abort); if (!object_property_set_int(OBJECT(&s->fmc), "sdram-base", - sc->memmap[ASPEED_SDRAM], errp)) { + sc->memmap[ASPEED_DEV_SDRAM], errp)) { return; } if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_FMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, s->fmc.ctrl->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_FMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); /* SPI */ for (i = 0; i < sc->spis_num; i++) { @@ -322,7 +322,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, - sc->memmap[ASPEED_SPI1 + i]); + sc->memmap[ASPEED_DEV_SPI1 + i]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 1, s->spi[i].ctrl->flash_window_base); } @@ -333,16 +333,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, - sc->memmap[ASPEED_EHCI1 + i]); + sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_SDMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_DEV_SDMC]); /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { @@ -354,7 +354,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_WDT] + i * awc->offset); + sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); } /* Net */ @@ -365,9 +365,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - sc->memmap[ASPEED_ETH1 + i]); + sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_ETH1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); } /* XDMA */ @@ -375,26 +375,26 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->xdma), 0, - sc->memmap[ASPEED_XDMA]); + sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_XDMA)); + aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_GPIO]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci), 0, - sc->memmap[ASPEED_SDHCI]); + sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_SDHCI)); + aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); } static Property aspeed_soc_properties[] = { DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION, diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 914115f3ef..d46f197cbe 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -87,52 +87,52 @@ typedef struct AspeedSoCClass { OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC) enum { - ASPEED_IOMEM, - ASPEED_UART1, - ASPEED_UART2, - ASPEED_UART3, - ASPEED_UART4, - ASPEED_UART5, - ASPEED_VUART, - ASPEED_FMC, - ASPEED_SPI1, - ASPEED_SPI2, - ASPEED_EHCI1, - ASPEED_EHCI2, - ASPEED_VIC, - ASPEED_SDMC, - ASPEED_SCU, - ASPEED_ADC, - ASPEED_VIDEO, - ASPEED_SRAM, - ASPEED_SDHCI, - ASPEED_GPIO, - ASPEED_GPIO_1_8V, - ASPEED_RTC, - ASPEED_TIMER1, - ASPEED_TIMER2, - ASPEED_TIMER3, - ASPEED_TIMER4, - ASPEED_TIMER5, - ASPEED_TIMER6, - ASPEED_TIMER7, - ASPEED_TIMER8, - ASPEED_WDT, - ASPEED_PWM, - ASPEED_LPC, - ASPEED_IBT, - ASPEED_I2C, - ASPEED_ETH1, - ASPEED_ETH2, - ASPEED_ETH3, - ASPEED_ETH4, - ASPEED_MII1, - ASPEED_MII2, - ASPEED_MII3, - ASPEED_MII4, - ASPEED_SDRAM, - ASPEED_XDMA, - ASPEED_EMMC, + ASPEED_DEV_IOMEM, + ASPEED_DEV_UART1, + ASPEED_DEV_UART2, + ASPEED_DEV_UART3, + ASPEED_DEV_UART4, + ASPEED_DEV_UART5, + ASPEED_DEV_VUART, + ASPEED_DEV_FMC, + ASPEED_DEV_SPI1, + ASPEED_DEV_SPI2, + ASPEED_DEV_EHCI1, + ASPEED_DEV_EHCI2, + ASPEED_DEV_VIC, + ASPEED_DEV_SDMC, + ASPEED_DEV_SCU, + ASPEED_DEV_ADC, + ASPEED_DEV_VIDEO, + ASPEED_DEV_SRAM, + ASPEED_DEV_SDHCI, + ASPEED_DEV_GPIO, + ASPEED_DEV_GPIO_1_8V, + ASPEED_DEV_RTC, + ASPEED_DEV_TIMER1, + ASPEED_DEV_TIMER2, + ASPEED_DEV_TIMER3, + ASPEED_DEV_TIMER4, + ASPEED_DEV_TIMER5, + ASPEED_DEV_TIMER6, + ASPEED_DEV_TIMER7, + ASPEED_DEV_TIMER8, + ASPEED_DEV_WDT, + ASPEED_DEV_PWM, + ASPEED_DEV_LPC, + ASPEED_DEV_IBT, + ASPEED_DEV_I2C, + ASPEED_DEV_ETH1, + ASPEED_DEV_ETH2, + ASPEED_DEV_ETH3, + ASPEED_DEV_ETH4, + ASPEED_DEV_MII1, + ASPEED_DEV_MII2, + ASPEED_DEV_MII3, + ASPEED_DEV_MII4, + ASPEED_DEV_SDRAM, + ASPEED_DEV_XDMA, + ASPEED_DEV_EMMC, }; #endif /* ASPEED_SOC_H */ -- cgit v1.2.3-55-g7522 From 30c717cb50a6a2b65ffbdb7c95672feb09b26bba Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:03 -0400 Subject: opentitan: Rename memmap enum constants Some of the enum constant names conflict with the QOM type check macros (IBEX_PLIC, IBEX_UART). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to IBEX_DEV_*, to avoid conflicts. Reviewed-by: Alistair Francis Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-8-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/riscv/opentitan.c | 84 ++++++++++++++++++++++---------------------- include/hw/riscv/opentitan.h | 38 ++++++++++---------- 2 files changed, 61 insertions(+), 61 deletions(-) (limited to 'include/hw') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index a8f0039e51..23ba3b4bfc 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -32,25 +32,25 @@ static const struct MemmapEntry { hwaddr base; hwaddr size; } ibex_memmap[] = { - [IBEX_ROM] = { 0x00008000, 16 * KiB }, - [IBEX_RAM] = { 0x10000000, 0x10000 }, - [IBEX_FLASH] = { 0x20000000, 0x80000 }, - [IBEX_UART] = { 0x40000000, 0x10000 }, - [IBEX_GPIO] = { 0x40010000, 0x10000 }, - [IBEX_SPI] = { 0x40020000, 0x10000 }, - [IBEX_FLASH_CTRL] = { 0x40030000, 0x10000 }, - [IBEX_PINMUX] = { 0x40070000, 0x10000 }, - [IBEX_RV_TIMER] = { 0x40080000, 0x10000 }, - [IBEX_PLIC] = { 0x40090000, 0x10000 }, - [IBEX_PWRMGR] = { 0x400A0000, 0x10000 }, - [IBEX_RSTMGR] = { 0x400B0000, 0x10000 }, - [IBEX_CLKMGR] = { 0x400C0000, 0x10000 }, - [IBEX_AES] = { 0x40110000, 0x10000 }, - [IBEX_HMAC] = { 0x40120000, 0x10000 }, - [IBEX_ALERT_HANDLER] = { 0x40130000, 0x10000 }, - [IBEX_NMI_GEN] = { 0x40140000, 0x10000 }, - [IBEX_USBDEV] = { 0x40150000, 0x10000 }, - [IBEX_PADCTRL] = { 0x40160000, 0x10000 } + [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB }, + [IBEX_DEV_RAM] = { 0x10000000, 0x10000 }, + [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 }, + [IBEX_DEV_UART] = { 0x40000000, 0x10000 }, + [IBEX_DEV_GPIO] = { 0x40010000, 0x10000 }, + [IBEX_DEV_SPI] = { 0x40020000, 0x10000 }, + [IBEX_DEV_FLASH_CTRL] = { 0x40030000, 0x10000 }, + [IBEX_DEV_PINMUX] = { 0x40070000, 0x10000 }, + [IBEX_DEV_RV_TIMER] = { 0x40080000, 0x10000 }, + [IBEX_DEV_PLIC] = { 0x40090000, 0x10000 }, + [IBEX_DEV_PWRMGR] = { 0x400A0000, 0x10000 }, + [IBEX_DEV_RSTMGR] = { 0x400B0000, 0x10000 }, + [IBEX_DEV_CLKMGR] = { 0x400C0000, 0x10000 }, + [IBEX_DEV_AES] = { 0x40110000, 0x10000 }, + [IBEX_DEV_HMAC] = { 0x40120000, 0x10000 }, + [IBEX_DEV_ALERT_HANDLER] = { 0x40130000, 0x10000 }, + [IBEX_DEV_NMI_GEN] = { 0x40140000, 0x10000 }, + [IBEX_DEV_USBDEV] = { 0x40150000, 0x10000 }, + [IBEX_DEV_PADCTRL] = { 0x40160000, 0x10000 } }; static void opentitan_board_init(MachineState *machine) @@ -66,12 +66,12 @@ static void opentitan_board_init(MachineState *machine) qdev_realize(DEVICE(&s->soc), NULL, &error_abort); memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram", - memmap[IBEX_RAM].size, &error_fatal); + memmap[IBEX_DEV_RAM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_RAM].base, main_mem); + memmap[IBEX_DEV_RAM].base, main_mem); if (machine->firmware) { - riscv_load_firmware(machine->firmware, memmap[IBEX_RAM].base, NULL); + riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, NULL); } if (machine->kernel_filename) { @@ -115,28 +115,28 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) /* Boot ROM */ memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.rom", - memmap[IBEX_ROM].size, &error_fatal); + memmap[IBEX_DEV_ROM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_ROM].base, &s->rom); + memmap[IBEX_DEV_ROM].base, &s->rom); /* Flash memory */ memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", - memmap[IBEX_FLASH].size, &error_fatal); - memory_region_add_subregion(sys_mem, memmap[IBEX_FLASH].base, + memmap[IBEX_DEV_FLASH].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, &s->flash_mem); /* PLIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_PLIC].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); /* UART */ qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_UART].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0, qdev_get_gpio_in(DEVICE(&s->plic), IBEX_UART_TX_WATERMARK_IRQ)); @@ -151,33 +151,33 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) IBEX_UART_RX_OVERFLOW_IRQ)); create_unimplemented_device("riscv.lowrisc.ibex.gpio", - memmap[IBEX_GPIO].base, memmap[IBEX_GPIO].size); + memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); create_unimplemented_device("riscv.lowrisc.ibex.spi", - memmap[IBEX_SPI].base, memmap[IBEX_SPI].size); + memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size); create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", - memmap[IBEX_FLASH_CTRL].base, memmap[IBEX_FLASH_CTRL].size); + memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size); create_unimplemented_device("riscv.lowrisc.ibex.rv_timer", - memmap[IBEX_RV_TIMER].base, memmap[IBEX_RV_TIMER].size); + memmap[IBEX_DEV_RV_TIMER].base, memmap[IBEX_DEV_RV_TIMER].size); create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", - memmap[IBEX_PWRMGR].base, memmap[IBEX_PWRMGR].size); + memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", - memmap[IBEX_RSTMGR].base, memmap[IBEX_RSTMGR].size); + memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", - memmap[IBEX_CLKMGR].base, memmap[IBEX_CLKMGR].size); + memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.aes", - memmap[IBEX_AES].base, memmap[IBEX_AES].size); + memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); create_unimplemented_device("riscv.lowrisc.ibex.hmac", - memmap[IBEX_HMAC].base, memmap[IBEX_HMAC].size); + memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); create_unimplemented_device("riscv.lowrisc.ibex.pinmux", - memmap[IBEX_PINMUX].base, memmap[IBEX_PINMUX].size); + memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", - memmap[IBEX_ALERT_HANDLER].base, memmap[IBEX_ALERT_HANDLER].size); + memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size); create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", - memmap[IBEX_NMI_GEN].base, memmap[IBEX_NMI_GEN].size); + memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); create_unimplemented_device("riscv.lowrisc.ibex.usbdev", - memmap[IBEX_USBDEV].base, memmap[IBEX_USBDEV].size); + memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); create_unimplemented_device("riscv.lowrisc.ibex.padctrl", - memmap[IBEX_PADCTRL].base, memmap[IBEX_PADCTRL].size); + memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); } static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 8f29b9cbbf..835a80f896 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -49,25 +49,25 @@ typedef struct OpenTitanState { } OpenTitanState; enum { - IBEX_ROM, - IBEX_RAM, - IBEX_FLASH, - IBEX_UART, - IBEX_GPIO, - IBEX_SPI, - IBEX_FLASH_CTRL, - IBEX_RV_TIMER, - IBEX_AES, - IBEX_HMAC, - IBEX_PLIC, - IBEX_PWRMGR, - IBEX_RSTMGR, - IBEX_CLKMGR, - IBEX_PINMUX, - IBEX_ALERT_HANDLER, - IBEX_NMI_GEN, - IBEX_USBDEV, - IBEX_PADCTRL, + IBEX_DEV_ROM, + IBEX_DEV_RAM, + IBEX_DEV_FLASH, + IBEX_DEV_UART, + IBEX_DEV_GPIO, + IBEX_DEV_SPI, + IBEX_DEV_FLASH_CTRL, + IBEX_DEV_RV_TIMER, + IBEX_DEV_AES, + IBEX_DEV_HMAC, + IBEX_DEV_PLIC, + IBEX_DEV_PWRMGR, + IBEX_DEV_RSTMGR, + IBEX_DEV_CLKMGR, + IBEX_DEV_PINMUX, + IBEX_DEV_ALERT_HANDLER, + IBEX_DEV_NMI_GEN, + IBEX_DEV_USBDEV, + IBEX_DEV_PADCTRL, }; enum { -- cgit v1.2.3-55-g7522 From 0a258e94615fccf4faefec17378bcbc9e1f2be9c Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:06 -0400 Subject: aspeed_timer: Fix ASPEED_TIMER macro definition The macro definition had an extra semicolon. This was never noticed because the macro was only being used where it didn't make a difference. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Reviewed-by: Cédric Le Goater Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/timer/aspeed_timer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index 948329893c..d7c7d8ad28 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -26,7 +26,7 @@ #include "hw/misc/aspeed_scu.h" #define ASPEED_TIMER(obj) \ - OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER); + OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER) #define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" -- cgit v1.2.3-55-g7522 From 616bbde34293226e5c957761982ebaf1eff69d90 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:13 -0400 Subject: pci: Move PCIBusClass typedef to pci.h Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-18-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/pci/pci.h | 1 + include/hw/pci/pci_bus.h | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c1bf7d5356..4ca7258b5b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -396,6 +396,7 @@ typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); #define TYPE_PCI_BUS "PCI" +typedef struct PCIBusClass PCIBusClass; #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) #define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass), TYPE_PCI_BUS) #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS) diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index 0714f578af..347440d42c 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -10,14 +10,14 @@ * use accessor functions in pci.h */ -typedef struct PCIBusClass { +struct PCIBusClass { /*< private >*/ BusClass parent_class; /*< public >*/ int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); -} PCIBusClass; +}; enum PCIBusFlags { /* This bus is the root of a PCI domain */ -- cgit v1.2.3-55-g7522 From cc963dcd7248db55b877d2ddd7b20a794d7ec182 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:14 -0400 Subject: i8254: Move PITCommonState/PITCommonClass typedefs to i8254.h Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-19-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/timer/i8254.h | 2 ++ include/hw/timer/i8254_internal.h | 8 ++++---- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'include/hw') diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index e75b4a5a08..206b8f8464 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -39,6 +39,8 @@ typedef struct PITChannelInfo { } PITChannelInfo; #define TYPE_PIT_COMMON "pit-common" +typedef struct PITCommonState PITCommonState; +typedef struct PITCommonClass PITCommonClass; #define PIT_COMMON(obj) \ OBJECT_CHECK(PITCommonState, (obj), TYPE_PIT_COMMON) #define PIT_COMMON_CLASS(klass) \ diff --git a/include/hw/timer/i8254_internal.h b/include/hw/timer/i8254_internal.h index 3db462aecd..a9a600d941 100644 --- a/include/hw/timer/i8254_internal.h +++ b/include/hw/timer/i8254_internal.h @@ -50,14 +50,14 @@ typedef struct PITChannelState { uint32_t irq_disabled; } PITChannelState; -typedef struct PITCommonState { +struct PITCommonState { ISADevice dev; MemoryRegion ioports; uint32_t iobase; PITChannelState channels[3]; -} PITCommonState; +}; -typedef struct PITCommonClass { +struct PITCommonClass { ISADeviceClass parent_class; void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val); @@ -65,7 +65,7 @@ typedef struct PITCommonClass { PITChannelInfo *info); void (*pre_save)(PITCommonState *s); void (*post_load)(PITCommonState *s); -} PITCommonClass; +}; int pit_get_out(PITChannelState *s, int64_t current_time); int64_t pit_get_next_transition_time(PITChannelState *s, int64_t current_time); -- cgit v1.2.3-55-g7522 From 3c03b563706bcf64ad4d8d63bd56e5bfb8141efc Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:16 -0400 Subject: mcf_fec: Move mcf_fec_state typedef to header Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-21-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/net/mcf_fec.c | 4 ++-- include/hw/m68k/mcf_fec.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 281345862c..25e3e453ab 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -32,7 +32,7 @@ do { printf("mcf_fec: " fmt , ## __VA_ARGS__); } while (0) #define FEC_MAX_FRAME_SIZE 2032 #define FEC_MIB_SIZE 64 -typedef struct { +struct mcf_fec_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +56,7 @@ typedef struct { uint32_t etdsr; uint32_t emrbr; uint32_t mib[FEC_MIB_SIZE]; -} mcf_fec_state; +}; #define FEC_INT_HB 0x80000000 #define FEC_INT_BABR 0x40000000 diff --git a/include/hw/m68k/mcf_fec.h b/include/hw/m68k/mcf_fec.h index eeb471f9c9..c09e33a57c 100644 --- a/include/hw/m68k/mcf_fec.h +++ b/include/hw/m68k/mcf_fec.h @@ -11,6 +11,7 @@ #define HW_M68K_MCF_FEC_H #define TYPE_MCF_FEC_NET "mcf-fec" +typedef struct mcf_fec_state mcf_fec_state; #define MCF_FEC_NET(obj) OBJECT_CHECK(mcf_fec_state, (obj), TYPE_MCF_FEC_NET) #define FEC_NUM_IRQ 13 -- cgit v1.2.3-55-g7522 From b13f9bdf318ddfe2e15ea619aadf71bed18bd555 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:17 -0400 Subject: s390_flic: Move KVMS390FLICState typedef to header Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Acked-by: Cornelia Huck Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Reviewed-by: Thomas Huth Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-22-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/intc/s390_flic_kvm.c | 4 ++-- include/hw/s390x/s390_flic.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c index a306b26faa..dbd4e682ce 100644 --- a/hw/intc/s390_flic_kvm.c +++ b/hw/intc/s390_flic_kvm.c @@ -29,12 +29,12 @@ #define FLIC_FAILED (-1UL) #define FLIC_SAVEVM_VERSION 1 -typedef struct KVMS390FLICState { +struct KVMS390FLICState{ S390FLICState parent_obj; uint32_t fd; bool clear_io_supported; -} KVMS390FLICState; +}; static KVMS390FLICState *s390_get_kvm_flic(S390FLICState *fs) { diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h index 4687ecfe83..df11de9b20 100644 --- a/include/hw/s390x/s390_flic.h +++ b/include/hw/s390x/s390_flic.h @@ -75,6 +75,7 @@ typedef struct S390FLICStateClass { } S390FLICStateClass; #define TYPE_KVM_S390_FLIC "s390-flic-kvm" +typedef struct KVMS390FLICState KVMS390FLICState; #define KVM_S390_FLIC(obj) \ OBJECT_CHECK(KVMS390FLICState, (obj), TYPE_KVM_S390_FLIC) -- cgit v1.2.3-55-g7522 From 6a567fbcf0b81b7e78bed9ef8397e4398c0cf059 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:19 -0400 Subject: nubus: Delete unused NUBUS_BRIDGE macro The macro never worked because the NubusBridge typedef doesn't exist. Delete it. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Acked-by: Laurent Vivier Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-24-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/nubus/nubus.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h index a8634e54c5..c350948262 100644 --- a/include/hw/nubus/nubus.h +++ b/include/hw/nubus/nubus.h @@ -29,7 +29,6 @@ #define NUBUS_BUS(obj) OBJECT_CHECK(NubusBus, (obj), TYPE_NUBUS_BUS) #define TYPE_NUBUS_BRIDGE "nubus-bridge" -#define NUBUS_BRIDGE(obj) OBJECT_CHECK(NubusBridge, (obj), TYPE_NUBUS_BRIDGE) typedef struct NubusBus { BusState qbus; -- cgit v1.2.3-55-g7522 From 08e14bb7e060daa4415e52c85047b9332db0c9b0 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:20 -0400 Subject: platform-bus: Delete macros for non-existing typedef PlatformBusDeviceClass doesn't exist. This will break when we automatically convert the code to use OBJECT_DEFINE_TYPE(). Delete the macros that reference the non-existing typedef. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-25-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/platform-bus.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/hw') diff --git a/include/hw/platform-bus.h b/include/hw/platform-bus.h index 19e20c57ce..33745a418e 100644 --- a/include/hw/platform-bus.h +++ b/include/hw/platform-bus.h @@ -29,10 +29,6 @@ typedef struct PlatformBusDevice PlatformBusDevice; #define TYPE_PLATFORM_BUS_DEVICE "platform-bus-device" #define PLATFORM_BUS_DEVICE(obj) \ OBJECT_CHECK(PlatformBusDevice, (obj), TYPE_PLATFORM_BUS_DEVICE) -#define PLATFORM_BUS_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PlatformBusDeviceClass, (klass), TYPE_PLATFORM_BUS_DEVICE) -#define PLATFORM_BUS_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PlatformBusDeviceClass, (obj), TYPE_PLATFORM_BUS_DEVICE) struct PlatformBusDevice { /*< private >*/ -- cgit v1.2.3-55-g7522 From 8055340fa5ec84640d6f9b3b9f427e9a4132011d Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:21 -0400 Subject: armsse: Rename QOM macros to avoid conflicts Rename TYPE_ARMSSE to TYPE_ARM_SSE, and ARMSSE*() type checking macros to ARM_SSE*(). This will avoid a future conflict between an ARM_SSE() type checking macro and the ARMSSE typedef name. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-26-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/arm/armsse.c | 24 ++++++++++++------------ include/hw/arm/armsse.h | 12 ++++++------ 2 files changed, 18 insertions(+), 18 deletions(-) (limited to 'include/hw') diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index dcbff9bd8f..6264eab16b 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -167,7 +167,7 @@ static void irq_status_forwarder(void *opaque, int n, int level) static void nsccfg_handler(void *opaque, int n, int level) { - ARMSSE *s = ARMSSE(opaque); + ARMSSE *s = ARM_SSE(opaque); s->nsccfg = level; } @@ -233,8 +233,8 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s) static void armsse_init(Object *obj) { - ARMSSE *s = ARMSSE(obj); - ARMSSEClass *asc = ARMSSE_GET_CLASS(obj); + ARMSSE *s = ARM_SSE(obj); + ARMSSEClass *asc = ARM_SSE_GET_CLASS(obj); const ARMSSEInfo *info = asc->info; int i; @@ -391,7 +391,7 @@ static void armsse_exp_irq(void *opaque, int n, int level) static void armsse_mpcexp_status(void *opaque, int n, int level) { - ARMSSE *s = ARMSSE(opaque); + ARMSSE *s = ARM_SSE(opaque); qemu_set_irq(s->mpcexp_status_in[n], level); } @@ -401,7 +401,7 @@ static qemu_irq armsse_get_common_irq_in(ARMSSE *s, int irqno) * Return a qemu_irq which can be used to signal IRQ n to * all CPUs in the SSE. */ - ARMSSEClass *asc = ARMSSE_GET_CLASS(s); + ARMSSEClass *asc = ARM_SSE_GET_CLASS(s); const ARMSSEInfo *info = asc->info; assert(irq_is_common[irqno]); @@ -428,8 +428,8 @@ static void map_ppu(ARMSSE *s, int ppuidx, const char *name, hwaddr addr) static void armsse_realize(DeviceState *dev, Error **errp) { - ARMSSE *s = ARMSSE(dev); - ARMSSEClass *asc = ARMSSE_GET_CLASS(dev); + ARMSSE *s = ARM_SSE(dev); + ARMSSEClass *asc = ARM_SSE_GET_CLASS(dev); const ARMSSEInfo *info = asc->info; int i; MemoryRegion *mr; @@ -1114,7 +1114,7 @@ static void armsse_idau_check(IDAUInterface *ii, uint32_t address, * of the address bits. The NSC attribute is guest-adjustable via the * NSCCFG register in the security controller. */ - ARMSSE *s = ARMSSE(ii); + ARMSSE *s = ARM_SSE(ii); int region = extract32(address, 28, 4); *ns = !(region & 1); @@ -1136,7 +1136,7 @@ static const VMStateDescription armsse_vmstate = { static void armsse_reset(DeviceState *dev) { - ARMSSE *s = ARMSSE(dev); + ARMSSE *s = ARM_SSE(dev); s->nsccfg = 0; } @@ -1145,7 +1145,7 @@ static void armsse_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); IDAUInterfaceClass *iic = IDAU_INTERFACE_CLASS(klass); - ARMSSEClass *asc = ARMSSE_CLASS(klass); + ARMSSEClass *asc = ARM_SSE_CLASS(klass); const ARMSSEInfo *info = data; dc->realize = armsse_realize; @@ -1157,7 +1157,7 @@ static void armsse_class_init(ObjectClass *klass, void *data) } static const TypeInfo armsse_info = { - .name = TYPE_ARMSSE, + .name = TYPE_ARM_SSE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(ARMSSE), .instance_init = armsse_init, @@ -1177,7 +1177,7 @@ static void armsse_register_types(void) for (i = 0; i < ARRAY_SIZE(armsse_variants); i++) { TypeInfo ti = { .name = armsse_variants[i].name, - .parent = TYPE_ARMSSE, + .parent = TYPE_ARM_SSE, .class_init = armsse_class_init, .class_data = (void *)&armsse_variants[i], }; diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 84080c2299..529816286d 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -106,8 +106,8 @@ #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" -#define TYPE_ARMSSE "arm-sse" -#define ARMSSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARMSSE) +#define TYPE_ARM_SSE "arm-sse" +#define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE) /* * These type names are for specific IoTKit subsystems; other than @@ -224,9 +224,9 @@ typedef struct ARMSSEClass { const ARMSSEInfo *info; } ARMSSEClass; -#define ARMSSE_CLASS(klass) \ - OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARMSSE) -#define ARMSSE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARMSSE) +#define ARM_SSE_CLASS(klass) \ + OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE) +#define ARM_SSE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARM_SSE) #endif -- cgit v1.2.3-55-g7522 From 694b3d28975d53c6c6ac444a6a896ce0d195c7d9 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:22 -0400 Subject: xen-legacy-backend: Add missing typedef XenLegacyDevice The typedef was used in the XENBACKEND_DEVICE macro, but it was never defined. Define the typedef close to the type checking macro. Acked-by: Anthony PERARD Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-27-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/xen/xen-legacy-backend.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/hw') diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legacy-backend.h index 5e6c56c4d6..704bc7852b 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -9,6 +9,7 @@ #define TYPE_XENSYSBUS "xen-sysbus" #define TYPE_XENBACKEND "xen-backend" +typedef struct XenLegacyDevice XenLegacyDevice; #define XENBACKEND_DEVICE(obj) \ OBJECT_CHECK(XenLegacyDevice, (obj), TYPE_XENBACKEND) -- cgit v1.2.3-55-g7522 From 82d1e74f1befb888b308ec9bce4ebce843b11a47 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:23 -0400 Subject: spapr: Move typedef SpaprMachineState to spapr.h Move the typedef from spapr_irq.h to spapr.h, and use "struct SpaprMachineState" in the spapr_*.h headers (to avoid circular header dependencies). This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-28-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_irq.h | 36 ++++++++++++++++++------------------ include/hw/ppc/spapr_xive.h | 3 ++- 3 files changed, 21 insertions(+), 19 deletions(-) (limited to 'include/hw') diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3134d339e8..a1e230ad39 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -41,6 +41,7 @@ typedef struct SpaprDimmState SpaprDimmState; typedef struct SpaprMachineClass SpaprMachineClass; #define TYPE_SPAPR_MACHINE "spapr-machine" +typedef struct SpaprMachineState SpaprMachineState; #define SPAPR_MACHINE(obj) \ OBJECT_CHECK(SpaprMachineState, (obj), TYPE_SPAPR_MACHINE) #define SPAPR_MACHINE_GET_CLASS(obj) \ diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index ca8cb44213..b161ccebc2 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -28,7 +28,7 @@ #define SPAPR_NR_XIRQS 0x1000 -typedef struct SpaprMachineState SpaprMachineState; +struct SpaprMachineState; typedef struct SpaprInterruptController SpaprInterruptController; @@ -67,20 +67,20 @@ typedef struct SpaprInterruptControllerClass { int (*post_load)(SpaprInterruptController *intc, int version_id); } SpaprInterruptControllerClass; -void spapr_irq_update_active_intc(SpaprMachineState *spapr); +void spapr_irq_update_active_intc(struct SpaprMachineState *spapr); -int spapr_irq_cpu_intc_create(SpaprMachineState *spapr, +int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr, PowerPCCPU *cpu, Error **errp); -void spapr_irq_cpu_intc_reset(SpaprMachineState *spapr, PowerPCCPU *cpu); -void spapr_irq_cpu_intc_destroy(SpaprMachineState *spapr, PowerPCCPU *cpu); -void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon); -void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers, +void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU *cpu); +void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU *cpu); +void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon); +void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); -uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr); -int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align, +uint32_t spapr_irq_nr_msis(struct SpaprMachineState *spapr); +int spapr_irq_msi_alloc(struct SpaprMachineState *spapr, uint32_t num, bool align, Error **errp); -void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num); +void spapr_irq_msi_free(struct SpaprMachineState *spapr, int irq, uint32_t num); typedef struct SpaprIrq { bool xics; @@ -92,13 +92,13 @@ extern SpaprIrq spapr_irq_xics_legacy; extern SpaprIrq spapr_irq_xive; extern SpaprIrq spapr_irq_dual; -void spapr_irq_init(SpaprMachineState *spapr, Error **errp); -int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); -void spapr_irq_free(SpaprMachineState *spapr, int irq, int num); -qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); -int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); -void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); -int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); +void spapr_irq_init(struct SpaprMachineState *spapr, Error **errp); +int spapr_irq_claim(struct SpaprMachineState *spapr, int irq, bool lsi, Error **errp); +void spapr_irq_free(struct SpaprMachineState *spapr, int irq, int num); +qemu_irq spapr_qirq(struct SpaprMachineState *spapr, int irq); +int spapr_irq_post_load(struct SpaprMachineState *spapr, int version_id); +void spapr_irq_reset(struct SpaprMachineState *spapr, Error **errp); +int spapr_irq_get_phandle(struct SpaprMachineState *spapr, void *fdt, Error **errp); typedef int (*SpaprInterruptControllerInitKvm)(SpaprInterruptController *, uint32_t, Error **); @@ -111,7 +111,7 @@ int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn, /* * XICS legacy routines */ -int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp); +int spapr_irq_find(struct SpaprMachineState *spapr, int num, bool align, Error **errp); #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp) #endif diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 0ffbe0be02..a1c8540ab4 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -66,7 +66,8 @@ typedef struct SpaprXiveClass { void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); -void spapr_xive_hcall_init(SpaprMachineState *spapr); +struct SpaprMachineState; +void spapr_xive_hcall_init(struct SpaprMachineState *spapr); void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); void spapr_xive_map_mmio(SpaprXive *xive); -- cgit v1.2.3-55-g7522 From 43f014407b83857aa7adb0b0becf76bedf35bc6f Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:24 -0400 Subject: s390x: Move typedef SCLPEventFacility to event-facility.h This will make future conversion to OBJECT_DECLARE* easier. In sclp.h, use "struct SCLPEventFacility" to avoid introducing unnecessary header dependencies. Acked-by: Cornelia Huck Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Reviewed-by: Thomas Huth Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-29-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/s390x/event-facility.h | 1 + include/hw/s390x/sclp.h | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/include/hw/s390x/event-facility.h b/include/hw/s390x/event-facility.h index 700a610f33..e61c4651d7 100644 --- a/include/hw/s390x/event-facility.h +++ b/include/hw/s390x/event-facility.h @@ -195,6 +195,7 @@ typedef struct SCLPEventClass { } SCLPEventClass; #define TYPE_SCLP_EVENT_FACILITY "s390-sclp-event-facility" +typedef struct SCLPEventFacility SCLPEventFacility; #define EVENT_FACILITY(obj) \ OBJECT_CHECK(SCLPEventFacility, (obj), TYPE_SCLP_EVENT_FACILITY) #define EVENT_FACILITY_CLASS(klass) \ diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index 822eff4396..a87ed2a0ab 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -185,12 +185,12 @@ typedef struct SCCB { #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP) #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP) -typedef struct SCLPEventFacility SCLPEventFacility; +struct SCLPEventFacility; typedef struct SCLPDevice { /* private */ DeviceState parent_obj; - SCLPEventFacility *event_facility; + struct SCLPEventFacility *event_facility; int increment_size; /* public */ -- cgit v1.2.3-55-g7522 From 2504f868f3e69ce923bf9997ca1051ab053859fa Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:25 -0400 Subject: vhost-user-gpu: Move QOM macro to header Move the VHOST_USER_GPU type checking macro to virtio-gpu.h, close to the TYPE_VHOST_USER_GPU #define. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Gerd Hoffmann Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-30-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/display/vhost-user-gpu.c | 3 --- include/hw/virtio/virtio-gpu.h | 2 ++ 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'include/hw') diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 4cdaee1bde..51f1747c4a 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -17,9 +17,6 @@ #include "qapi/error.h" #include "migration/blocker.h" -#define VHOST_USER_GPU(obj) \ - OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU) - typedef enum VhostUserGpuRequest { VHOST_USER_GPU_NONE = 0, VHOST_USER_GPU_GET_PROTOCOL_FEATURES, diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 6dd57f2025..7517438e10 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -36,6 +36,8 @@ OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU) #define TYPE_VHOST_USER_GPU "vhost-user-gpu" +#define VHOST_USER_GPU(obj) \ + OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU) #define VIRTIO_ID_GPU 16 -- cgit v1.2.3-55-g7522 From 5e748ffbbf027ad1a8fcc41a24376d63d48992ac Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:26 -0400 Subject: ahci: Move QOM macros to header The TYPE_* constants and the typedefs are defined in ahci.h, so we can move the type checking macros there too. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-31-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/ide/ahci_internal.h | 5 ----- include/hw/ide/ahci.h | 3 +++ 2 files changed, 3 insertions(+), 5 deletions(-) (limited to 'include/hw') diff --git a/hw/ide/ahci_internal.h b/hw/ide/ahci_internal.h index bab0459774..ac9bdead7b 100644 --- a/hw/ide/ahci_internal.h +++ b/hw/ide/ahci_internal.h @@ -332,9 +332,6 @@ struct AHCIPCIState { AHCIState ahci; }; -#define ICH_AHCI(obj) \ - OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI) - extern const VMStateDescription vmstate_ahci; #define VMSTATE_AHCI(_field, _state) { \ @@ -394,6 +391,4 @@ void ahci_uninit(AHCIState *s); void ahci_reset(AHCIState *s); -#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) - #endif /* HW_IDE_AHCI_INTERNAL_H */ diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index b44e3000cf..ce2bf8a5f8 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -53,11 +53,14 @@ typedef struct AHCIState { typedef struct AHCIPCIState AHCIPCIState; #define TYPE_ICH9_AHCI "ich9-ahci" +#define ICH_AHCI(obj) \ + OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI) int32_t ahci_get_num_ports(PCIDevice *dev); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); #define TYPE_SYSBUS_AHCI "sysbus-ahci" +#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) typedef struct SysbusAHCIState { /*< private >*/ -- cgit v1.2.3-55-g7522 From e6fcd78008e2ba757e1577c6d67520d6be62c96c Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:27 -0400 Subject: i8257: Move QOM macro to header Move the I8257 macro to i8257.h, close to the TYPE_I8257 define. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-32-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/dma/i8257.c | 2 -- include/hw/dma/i8257.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index db808029b0..de5f696919 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -33,8 +33,6 @@ #include "qemu/log.h" #include "trace.h" -#define I8257(obj) \ - OBJECT_CHECK(I8257State, (obj), TYPE_I8257) /* #define DEBUG_DMA */ diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index 03e2c166be..ee06371699 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -5,6 +5,8 @@ #include "exec/ioport.h" #define TYPE_I8257 "i8257" +#define I8257(obj) \ + OBJECT_CHECK(I8257State, (obj), TYPE_I8257) typedef struct I8257Regs { int now[2]; -- cgit v1.2.3-55-g7522 From dc15d9eb419c9c27e3c76741320b5134b15f4d57 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:28 -0400 Subject: ahci: Move QOM macro to header Move the ALLWINNER_AHCI macro close to the TYPE_ALLWINNER_AHCI define. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-33-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/ide/ahci-allwinner.c | 3 --- include/hw/ide/ahci.h | 2 ++ 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'include/hw') diff --git a/hw/ide/ahci-allwinner.c b/hw/ide/ahci-allwinner.c index 8536b9eb5a..227e747ba7 100644 --- a/hw/ide/ahci-allwinner.c +++ b/hw/ide/ahci-allwinner.c @@ -25,9 +25,6 @@ #include "trace.h" -#define ALLWINNER_AHCI(obj) \ - OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI) - #define ALLWINNER_AHCI_BISTAFR ((0xa0 - ALLWINNER_AHCI_MMIO_OFF) / 4) #define ALLWINNER_AHCI_BISTCR ((0xa4 - ALLWINNER_AHCI_MMIO_OFF) / 4) #define ALLWINNER_AHCI_BISTFCTR ((0xa8 - ALLWINNER_AHCI_MMIO_OFF) / 4) diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index ce2bf8a5f8..41bb517047 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -72,6 +72,8 @@ typedef struct SysbusAHCIState { } SysbusAHCIState; #define TYPE_ALLWINNER_AHCI "allwinner-ahci" +#define ALLWINNER_AHCI(obj) \ + OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI) #define ALLWINNER_AHCI_MMIO_OFF 0x80 #define ALLWINNER_AHCI_MMIO_SIZE 0x80 -- cgit v1.2.3-55-g7522 From 41ea82055c7cd5dbcdeb61236eae4272a64bb5f6 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:29 -0400 Subject: pckbd: Move QOM macro to header Move the I8042 macro close to the TYPE_I8042 define. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-34-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/input/pckbd.c | 2 -- include/hw/input/i8042.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'include/hw') diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 29d633ca94..dde85ba6c6 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -481,8 +481,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, qemu_register_reset(kbd_reset, s); } -#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) - struct ISAKBDState { ISADevice parent_obj; diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 8eaebf50ce..4569dfddd9 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -11,6 +11,7 @@ #include "hw/isa/isa.h" #define TYPE_I8042 "i8042" +#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) #define I8042_A20_LINE "a20" -- cgit v1.2.3-55-g7522 From 240b6cd71798e423f55b347bba6bf05da2da7e18 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:30 -0400 Subject: vmbus: Move QOM macros to vmbus.h Move all declarations related to TYPE_VMBUS to the same place in vmbus.h. This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-35-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/hyperv/vmbus.c | 3 --- include/hw/hyperv/vmbus-bridge.h | 3 +-- include/hw/hyperv/vmbus.h | 4 ++++ 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include/hw') diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index 34392e892a..75af6b83dd 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -20,9 +20,6 @@ #include "cpu.h" #include "trace.h" -#define TYPE_VMBUS "vmbus" -#define VMBUS(obj) OBJECT_CHECK(VMBus, (obj), TYPE_VMBUS) - enum { VMGPADL_INIT, VMGPADL_ALIVE, diff --git a/include/hw/hyperv/vmbus-bridge.h b/include/hw/hyperv/vmbus-bridge.h index 33f93de64d..fe90bda01b 100644 --- a/include/hw/hyperv/vmbus-bridge.h +++ b/include/hw/hyperv/vmbus-bridge.h @@ -11,11 +11,10 @@ #define HW_HYPERV_VMBUS_BRIDGE_H #include "hw/sysbus.h" +#include "hw/hyperv/vmbus.h" #define TYPE_VMBUS_BRIDGE "vmbus-bridge" -typedef struct VMBus VMBus; - typedef struct VMBusBridge { SysBusDevice parent_obj; diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h index 40e8417eec..cd98ec24e7 100644 --- a/include/hw/hyperv/vmbus.h +++ b/include/hw/hyperv/vmbus.h @@ -26,6 +26,10 @@ #define VMBUS_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(VMBusDeviceClass, (obj), TYPE_VMBUS_DEVICE) +#define TYPE_VMBUS "vmbus" +typedef struct VMBus VMBus; +#define VMBUS(obj) OBJECT_CHECK(VMBus, (obj), TYPE_VMBUS) + /* * Object wrapping a GPADL -- GPA Descriptor List -- an array of guest physical * pages, to be used for various buffers shared between the host and the guest. -- cgit v1.2.3-55-g7522 From b28b80376bdea1c73f6ab398fd44ebd30e91f2f9 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:31 -0400 Subject: virtio-serial-bus: Move QOM macros to header This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-36-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/char/virtio-serial-bus.c | 4 ---- include/hw/virtio/virtio-serial.h | 5 +++++ 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'include/hw') diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index f9a4428bd6..cf08ef9728 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -843,10 +843,6 @@ static Property virtser_props[] = { DEFINE_PROP_END_OF_LIST() }; -#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus" -#define VIRTIO_SERIAL_BUS(obj) \ - OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) - static void virtser_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-serial.h index ed3e916b68..448615a6b3 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -33,7 +33,12 @@ struct virtio_serial_conf { OBJECT_GET_CLASS(VirtIOSerialPortClass, (obj), TYPE_VIRTIO_SERIAL_PORT) typedef struct VirtIOSerial VirtIOSerial; + +#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus" typedef struct VirtIOSerialBus VirtIOSerialBus; +#define VIRTIO_SERIAL_BUS(obj) \ + OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) + typedef struct VirtIOSerialPort VirtIOSerialPort; typedef struct VirtIOSerialPortClass { -- cgit v1.2.3-55-g7522 From fe47ad3aa98b7741b3749fbd60205b39b444d05a Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:32 -0400 Subject: piix: Move QOM macros to header This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-37-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/isa/piix3.c | 4 ---- include/hw/southbridge/piix.h | 4 ++++ 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include/hw') diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 1a5267e19f..587850b888 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -36,10 +36,6 @@ #define XEN_PIIX_NUM_PIRQS 128ULL -#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -#define PIIX3_PCI_DEVICE(obj) \ - OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) - #define TYPE_PIIX3_DEVICE "PIIX3" #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 02bd741209..ac1d04ddc2 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -64,6 +64,10 @@ typedef struct PIIXState { MemoryRegion rcr_mem; } PIIX3State; +#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" +#define PIIX3_PCI_DEVICE(obj) \ + OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) + extern PCIDevice *piix4_dev; PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); -- cgit v1.2.3-55-g7522 From cb8cf86b3e4a9384f847c05e3825a20a0786efd0 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:33 -0400 Subject: auxbus: Move QOM macros to header This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-38-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/misc/auxbus.c | 2 -- include/hw/misc/auxbus.h | 3 +++ 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include/hw') diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index da361baa32..6c099ae2a2 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -45,8 +45,6 @@ } \ } while (0) -#define TYPE_AUXTOI2C "aux-to-i2c-bridge" -#define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C) static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent); static inline I2CBus *aux_bridge_get_i2c_bus(AUXTOI2CState *bridge); diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 15a8973517..041edfc9e9 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -32,7 +32,10 @@ typedef struct AUXBus AUXBus; typedef struct AUXSlave AUXSlave; typedef enum AUXCommand AUXCommand; typedef enum AUXReply AUXReply; + +#define TYPE_AUXTOI2C "aux-to-i2c-bridge" typedef struct AUXTOI2CState AUXTOI2CState; +#define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C) enum AUXCommand { WRITE_I2C = 0, -- cgit v1.2.3-55-g7522 From 2d8eb5f85f054cbde8786dc7db56eb2c6feb0db3 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:35 -0400 Subject: pxa2xx: Move QOM macros to header This will make future conversion to OBJECT_DECLARE* easier. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-40-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/arm/pxa2xx.c | 7 ------- hw/pcmcia/pxa2xx.c | 4 ---- hw/sd/pxa2xx_mmci.c | 3 --- include/hw/arm/pxa.h | 13 +++++++++++++ 4 files changed, 13 insertions(+), 14 deletions(-) (limited to 'include/hw') diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 20fa201dd5..76975d17a4 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1251,10 +1251,6 @@ typedef struct PXA2xxI2CSlaveState { PXA2xxI2CState *host; } PXA2xxI2CSlaveState; -#define TYPE_PXA2XX_I2C "pxa2xx_i2c" -#define PXA2XX_I2C(obj) \ - OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C) - struct PXA2xxI2CState { /*< private >*/ SysBusDevice parent_obj; @@ -1787,9 +1783,6 @@ static PXA2xxI2SState *pxa2xx_i2s_init(MemoryRegion *sysmem, } /* PXA Fast Infra-red Communications Port */ -#define TYPE_PXA2XX_FIR "pxa2xx-fir" -#define PXA2XX_FIR(obj) OBJECT_CHECK(PXA2xxFIrState, (obj), TYPE_PXA2XX_FIR) - struct PXA2xxFIrState { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 5f4bf22a90..fcca7e571b 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -18,10 +18,6 @@ #include "hw/pcmcia.h" #include "hw/arm/pxa.h" -#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia" -#define PXA2XX_PCMCIA(obj) \ - OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA) - struct PXA2xxPCMCIAState { SysBusDevice parent_obj; diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index 04f0a98f81..3a47b380dd 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -22,9 +22,6 @@ #include "qemu/module.h" #include "trace.h" -#define TYPE_PXA2XX_MMCI "pxa2xx-mmci" -#define PXA2XX_MMCI(obj) OBJECT_CHECK(PXA2xxMMCIState, (obj), TYPE_PXA2XX_MMCI) - #define TYPE_PXA2XX_MMCI_BUS "pxa2xx-mmci-bus" #define PXA2XX_MMCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_PXA2XX_MMCI_BUS) diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index d99b6192da..09c1336071 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -86,7 +86,10 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem, void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler); /* pxa2xx_mmci.c */ +#define TYPE_PXA2XX_MMCI "pxa2xx-mmci" typedef struct PXA2xxMMCIState PXA2xxMMCIState; +#define PXA2XX_MMCI(obj) OBJECT_CHECK(PXA2xxMMCIState, (obj), TYPE_PXA2XX_MMCI) + PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem, hwaddr base, qemu_irq irq, qemu_irq rx_dma, qemu_irq tx_dma); @@ -94,7 +97,11 @@ void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly, qemu_irq coverswitch); /* pxa2xx_pcmcia.c */ +#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia" typedef struct PXA2xxPCMCIAState PXA2xxPCMCIAState; +#define PXA2XX_PCMCIA(obj) \ + OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA) + PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, hwaddr base); int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card); @@ -119,8 +126,14 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, qemu_irq irq, uint32_t page_size); I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s); +#define TYPE_PXA2XX_I2C "pxa2xx_i2c" typedef struct PXA2xxI2SState PXA2xxI2SState; +#define PXA2XX_I2C(obj) \ + OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C) + +#define TYPE_PXA2XX_FIR "pxa2xx-fir" typedef struct PXA2xxFIrState PXA2xxFIrState; +#define PXA2XX_FIR(obj) OBJECT_CHECK(PXA2xxFIrState, (obj), TYPE_PXA2XX_FIR) typedef struct { ARMCPU *cpu; -- cgit v1.2.3-55-g7522 From 001040158d5d46cc111dd9382a4a61153296b611 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:39 -0400 Subject: nubus: Rename class type checking macros Rename the existing class type checking macros to be consistent with the type name and instance type checking macro. Use a NUBUS_MACFB prefix instead of MACFB_NUBUS. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Acked-by: Laurent Vivier Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-44-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/display/macfb.c | 4 ++-- include/hw/display/macfb.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include/hw') diff --git a/hw/display/macfb.c b/hw/display/macfb.c index b68faff4bb..ff8bdb846b 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -391,7 +391,7 @@ static void macfb_nubus_realize(DeviceState *dev, Error **errp) { NubusDevice *nd = NUBUS_DEVICE(dev); MacfbNubusState *s = NUBUS_MACFB(dev); - MacfbNubusDeviceClass *ndc = MACFB_NUBUS_GET_CLASS(dev); + MacfbNubusDeviceClass *ndc = NUBUS_MACFB_GET_CLASS(dev); MacfbState *ms = &s->macfb; ndc->parent_realize(dev, errp); @@ -443,7 +443,7 @@ static void macfb_sysbus_class_init(ObjectClass *klass, void *data) static void macfb_nubus_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - MacfbNubusDeviceClass *ndc = MACFB_NUBUS_DEVICE_CLASS(klass); + MacfbNubusDeviceClass *ndc = NUBUS_MACFB_CLASS(klass); device_class_set_parent_realize(dc, macfb_nubus_realize, &ndc->parent_realize); diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h index 26367ae2c4..347871b623 100644 --- a/include/hw/display/macfb.h +++ b/include/hw/display/macfb.h @@ -40,9 +40,9 @@ typedef struct { MacfbState macfb; } MacfbSysBusState; -#define MACFB_NUBUS_DEVICE_CLASS(class) \ +#define NUBUS_MACFB_CLASS(class) \ OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB) -#define MACFB_NUBUS_GET_CLASS(obj) \ +#define NUBUS_MACFB_GET_CLASS(obj) \ OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB) typedef struct MacfbNubusDeviceClass { -- cgit v1.2.3-55-g7522 From b1af5872ff02e5793a94973960d2a68eb6812f94 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:44 -0400 Subject: s390-virtio-ccw: Rename S390_MACHINE_CLASS macro Rename it to be consistent with S390_CCW_MACHINE and TYPE_S390_CCW_MACHINE. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Acked-by: Cornelia Huck Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-49-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/s390x/s390-virtio-ccw.c | 14 +++++++------- include/hw/s390x/s390-virtio-ccw.h | 2 +- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'include/hw') diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index f4ea6a9545..3106bbea33 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -596,7 +596,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data) MachineClass *mc = MACHINE_CLASS(oc); NMIClass *nc = NMI_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); + S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc); s390mc->ri_allowed = true; s390mc->cpu_model_allowed = true; @@ -677,7 +677,7 @@ static S390CcwMachineClass *get_machine_class(void) * be called for the 'none' machine. The properties will * have their after-initialization values. */ - current_mc = S390_MACHINE_CLASS( + current_mc = S390_CCW_MACHINE_CLASS( object_class_by_name(TYPE_S390_CCW_MACHINE)); } return current_mc; @@ -786,7 +786,7 @@ bool css_migration_enabled(void) static void ccw_machine_##suffix##_instance_init(Object *obj) \ { \ MachineState *machine = MACHINE(obj); \ - current_mc = S390_MACHINE_CLASS(MACHINE_GET_CLASS(machine)); \ + current_mc = S390_CCW_MACHINE_CLASS(MACHINE_GET_CLASS(machine)); \ ccw_machine_##suffix##_instance_options(machine); \ } \ static const TypeInfo ccw_machine_##suffix##_info = { \ @@ -898,7 +898,7 @@ static void ccw_machine_3_0_instance_options(MachineState *machine) static void ccw_machine_3_0_class_options(MachineClass *mc) { - S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); + S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc); s390mc->hpage_1m_allowed = false; ccw_machine_3_1_class_options(mc); @@ -965,7 +965,7 @@ static void ccw_machine_2_9_instance_options(MachineState *machine) static void ccw_machine_2_9_class_options(MachineClass *mc) { - S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); + S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc); static GlobalProperty compat[] = { { TYPE_S390_STATTRIB, "migration-enabled", "off", }, }; @@ -1001,7 +1001,7 @@ static void ccw_machine_2_7_instance_options(MachineState *machine) static void ccw_machine_2_7_class_options(MachineClass *mc) { - S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); + S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc); s390mc->cpu_model_allowed = false; ccw_machine_2_8_class_options(mc); @@ -1016,7 +1016,7 @@ static void ccw_machine_2_6_instance_options(MachineState *machine) static void ccw_machine_2_6_class_options(MachineClass *mc) { - S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); + S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc); static GlobalProperty compat[] = { { TYPE_S390_IPL, "iplbext_migration", "off", }, { TYPE_VIRTUAL_CSS_BRIDGE, "css_dev_path", "off", }, diff --git a/include/hw/s390x/s390-virtio-ccw.h b/include/hw/s390x/s390-virtio-ccw.h index cd1dccc6e3..caf4962d29 100644 --- a/include/hw/s390x/s390-virtio-ccw.h +++ b/include/hw/s390x/s390-virtio-ccw.h @@ -18,7 +18,7 @@ #define S390_CCW_MACHINE(obj) \ OBJECT_CHECK(S390CcwMachineState, (obj), TYPE_S390_CCW_MACHINE) -#define S390_MACHINE_CLASS(klass) \ +#define S390_CCW_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(S390CcwMachineClass, (klass), TYPE_S390_CCW_MACHINE) typedef struct S390CcwMachineState { -- cgit v1.2.3-55-g7522 From b694ed1f56ade7e2fa0951718c9cdce78b892ddf Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 25 Aug 2020 15:20:45 -0400 Subject: swim: Rename struct SWIM to Swim Currently we have a SWIM typedef and a SWIM type checking macro, but OBJECT_DECLARE* would transform the SWIM macro into a function, and the function name would conflict with the SWIM typedef name. Rename the struct and typedef to "Swim". This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Acked-by: Laurent Vivier Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-50-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- hw/block/swim.c | 10 +++++----- include/hw/block/swim.h | 6 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'include/hw') diff --git a/hw/block/swim.c b/hw/block/swim.c index 74f56e8f46..20133a814c 100644 --- a/hw/block/swim.c +++ b/hw/block/swim.c @@ -387,7 +387,7 @@ static const MemoryRegionOps swimctrl_mem_ops = { static void sysbus_swim_reset(DeviceState *d) { - SWIM *sys = SWIM(d); + Swim *sys = SWIM(d); SWIMCtrl *ctrl = &sys->ctrl; int i; @@ -408,7 +408,7 @@ static void sysbus_swim_reset(DeviceState *d) static void sysbus_swim_init(Object *obj) { SysBusDevice *sbd = SYS_BUS_DEVICE(obj); - SWIM *sbs = SWIM(obj); + Swim *sbs = SWIM(obj); SWIMCtrl *swimctrl = &sbs->ctrl; memory_region_init_io(&swimctrl->iomem, obj, &swimctrl_mem_ops, swimctrl, @@ -418,7 +418,7 @@ static void sysbus_swim_init(Object *obj) static void sysbus_swim_realize(DeviceState *dev, Error **errp) { - SWIM *sys = SWIM(dev); + Swim *sys = SWIM(dev); SWIMCtrl *swimctrl = &sys->ctrl; qbus_create_inplace(&swimctrl->bus, sizeof(SWIMBus), TYPE_SWIM_BUS, dev, @@ -460,7 +460,7 @@ static const VMStateDescription vmstate_sysbus_swim = { .name = "SWIM", .version_id = 1, .fields = (VMStateField[]) { - VMSTATE_STRUCT(ctrl, SWIM, 0, vmstate_swim, SWIMCtrl), + VMSTATE_STRUCT(ctrl, Swim, 0, vmstate_swim, SWIMCtrl), VMSTATE_END_OF_LIST() } }; @@ -477,7 +477,7 @@ static void sysbus_swim_class_init(ObjectClass *oc, void *data) static const TypeInfo sysbus_swim_info = { .name = TYPE_SWIM, .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(SWIM), + .instance_size = sizeof(Swim), .instance_init = sysbus_swim_init, .class_init = sysbus_swim_class_init, }; diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h index 6add3499d0..9d8b65c561 100644 --- a/include/hw/block/swim.h +++ b/include/hw/block/swim.h @@ -67,10 +67,10 @@ struct SWIMCtrl { }; #define TYPE_SWIM "swim" -#define SWIM(obj) OBJECT_CHECK(SWIM, (obj), TYPE_SWIM) +#define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM) -typedef struct SWIM { +typedef struct Swim { SysBusDevice parent_obj; SWIMCtrl ctrl; -} SWIM; +} Swim; #endif -- cgit v1.2.3-55-g7522