From 89ece6f76f089bc415fc4b8c78f7dbe74113380c Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 3 Sep 2020 18:40:12 +0800 Subject: hw/riscv: Move sifive_e_prci model to hw/misc This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_e_prci model to hw/misc directory. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-Id: <1599129623-68957-2-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis --- include/hw/misc/sifive_e_prci.h | 71 ++++++++++++++++++++++++++++++++++++++++ include/hw/riscv/sifive_e_prci.h | 71 ---------------------------------------- 2 files changed, 71 insertions(+), 71 deletions(-) create mode 100644 include/hw/misc/sifive_e_prci.h delete mode 100644 include/hw/riscv/sifive_e_prci.h (limited to 'include/hw') diff --git a/include/hw/misc/sifive_e_prci.h b/include/hw/misc/sifive_e_prci.h new file mode 100644 index 0000000000..698b0b451c --- /dev/null +++ b/include/hw/misc/sifive_e_prci.h @@ -0,0 +1,71 @@ +/* + * QEMU SiFive E PRCI (Power, Reset, Clock, Interrupt) interface + * + * Copyright (c) 2017 SiFive, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#ifndef HW_SIFIVE_E_PRCI_H +#define HW_SIFIVE_E_PRCI_H + +enum { + SIFIVE_E_PRCI_HFROSCCFG = 0x0, + SIFIVE_E_PRCI_HFXOSCCFG = 0x4, + SIFIVE_E_PRCI_PLLCFG = 0x8, + SIFIVE_E_PRCI_PLLOUTDIV = 0xC +}; + +enum { + SIFIVE_E_PRCI_HFROSCCFG_RDY = (1 << 31), + SIFIVE_E_PRCI_HFROSCCFG_EN = (1 << 30) +}; + +enum { + SIFIVE_E_PRCI_HFXOSCCFG_RDY = (1 << 31), + SIFIVE_E_PRCI_HFXOSCCFG_EN = (1 << 30) +}; + +enum { + SIFIVE_E_PRCI_PLLCFG_PLLSEL = (1 << 16), + SIFIVE_E_PRCI_PLLCFG_REFSEL = (1 << 17), + SIFIVE_E_PRCI_PLLCFG_BYPASS = (1 << 18), + SIFIVE_E_PRCI_PLLCFG_LOCK = (1 << 31) +}; + +enum { + SIFIVE_E_PRCI_PLLOUTDIV_DIV1 = (1 << 8) +}; + +#define SIFIVE_E_PRCI_REG_SIZE 0x1000 + +#define TYPE_SIFIVE_E_PRCI "riscv.sifive.e.prci" + +#define SIFIVE_E_PRCI(obj) \ + OBJECT_CHECK(SiFiveEPRCIState, (obj), TYPE_SIFIVE_E_PRCI) + +typedef struct SiFiveEPRCIState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion mmio; + uint32_t hfrosccfg; + uint32_t hfxosccfg; + uint32_t pllcfg; + uint32_t plloutdiv; +} SiFiveEPRCIState; + +DeviceState *sifive_e_prci_create(hwaddr addr); + +#endif diff --git a/include/hw/riscv/sifive_e_prci.h b/include/hw/riscv/sifive_e_prci.h deleted file mode 100644 index 698b0b451c..0000000000 --- a/include/hw/riscv/sifive_e_prci.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * QEMU SiFive E PRCI (Power, Reset, Clock, Interrupt) interface - * - * Copyright (c) 2017 SiFive, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2 or later, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see . - */ - -#ifndef HW_SIFIVE_E_PRCI_H -#define HW_SIFIVE_E_PRCI_H - -enum { - SIFIVE_E_PRCI_HFROSCCFG = 0x0, - SIFIVE_E_PRCI_HFXOSCCFG = 0x4, - SIFIVE_E_PRCI_PLLCFG = 0x8, - SIFIVE_E_PRCI_PLLOUTDIV = 0xC -}; - -enum { - SIFIVE_E_PRCI_HFROSCCFG_RDY = (1 << 31), - SIFIVE_E_PRCI_HFROSCCFG_EN = (1 << 30) -}; - -enum { - SIFIVE_E_PRCI_HFXOSCCFG_RDY = (1 << 31), - SIFIVE_E_PRCI_HFXOSCCFG_EN = (1 << 30) -}; - -enum { - SIFIVE_E_PRCI_PLLCFG_PLLSEL = (1 << 16), - SIFIVE_E_PRCI_PLLCFG_REFSEL = (1 << 17), - SIFIVE_E_PRCI_PLLCFG_BYPASS = (1 << 18), - SIFIVE_E_PRCI_PLLCFG_LOCK = (1 << 31) -}; - -enum { - SIFIVE_E_PRCI_PLLOUTDIV_DIV1 = (1 << 8) -}; - -#define SIFIVE_E_PRCI_REG_SIZE 0x1000 - -#define TYPE_SIFIVE_E_PRCI "riscv.sifive.e.prci" - -#define SIFIVE_E_PRCI(obj) \ - OBJECT_CHECK(SiFiveEPRCIState, (obj), TYPE_SIFIVE_E_PRCI) - -typedef struct SiFiveEPRCIState { - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - MemoryRegion mmio; - uint32_t hfrosccfg; - uint32_t hfxosccfg; - uint32_t pllcfg; - uint32_t plloutdiv; -} SiFiveEPRCIState; - -DeviceState *sifive_e_prci_create(hwaddr addr); - -#endif -- cgit v1.2.3-55-g7522